74ALVCH16600DGGY [NXP]
74ALVCH16600 - 18-bit universal bus transceiver (3-State) TSSOP 56-Pin;
| 型号： | 74ALVCH16600DGGY |
| 厂家： | 
NXP |
| 描述： | 74ALVCH16600 - 18-bit universal bus transceiver (3-State) TSSOP 56-Pin 总线收发器 |
| 文件： | 总14页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ALVCH16600
18-bit universal bus transceiver (3-State)
Product specification
1998 Sep 24
Supersedes data of 1998 Aug
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
FEATURES
• Complies with JEDEC standard no. 8-1A.
DESCRIPTION
The 74ALVCH16600 is an 18-bit universal transceiver featuring
non-inverting 3-State bus compatible outputs in both send and
receive directions. Data flow in each direction is controlled by output
• CMOS low power consumption
enable (OE and OE ), latch enable (LE and LE ), and clock
AB
BA
AB
BA
• Direct interface with TTL levels
(CP and CP ) inputs. For A-to-B data flow, the device operates
AB
BA
in the transparent mode when LE is High. When LE is Low, the
• Current drive ± 24 mA at 3.0 V
AB
AB
A data is latched if CP is held at a High or Low logic level. If LE
AB
AB
• All inputs have bus hold circuitry
is Low, the A-bus data is stored in the latch/flip-flop on the
High-to-Low transition of CP . When OE is Low, the outputs are
AB
AB
• Output drive capability 50Ω transmission lines @ 85°C
active. When OE is High, the outputs are in the high-impedance
AB
TM
• MULTIBYTE flow-through standard pin-out architecture
state. The High clock can be controlled with the clock-enable inputs
(CE /CE ).
BA
AB
• Low inductance multiple V and ground pins for minimum noise
CC
and ground bounce
Data flow for B-to-A is similar to that of A-to-B but uses OE , LE
BA
BA
and CP
.
BA
To ensure the high impedance state during power up or power
down, OE and OE should be tied to V through a pullup
BA
AB
CC
resistor; the minimum value of the resistor is determined by the
current-sinking/current-sourcing capability of the driver.
Active bus hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t = t = 2.5ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
= 2.5V, C = 30pF
TYPICAL
UNIT
Propagation delay
An, Bn to Bn, An
V
CC
V
CC
3.1
2.8
t
/t
ns
L
PHL PLH
= 3.3V, C = 50pF
L
C
C
Input/Output capacitance
Input capacitance
8.0
4.0
21
3
pF
pF
I/O
I
Outputs enabled
Outputs disabled
1
C
Power dissipation capacitance per latch
V = GND to V
I CC
pF
PD
NOTES:
1.
C
is used to determine the dynamic power dissipation (P in mW):
D
PD
2
2
P
D
= C × V
× f + S (C × V × f ) where:
CC o
PD
CC
i
L
f = input frequency in MHz; C = output load capacitance in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
S (C × V
× f ) = sum of outputs.
L
CC
o
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
DWG NUMBER
56-Pin Plastic TSSOP Type II
–40°C to +85°C
74ALVCH16600 DGG
SOT364-1
2
1998 Sep 24
853-2123 20077
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
Output enable A-to-B
Latch enable A-to-B
OE
1
2
3
4
5
6
7
8
9
56 CE
AB
AB
1
2
OE
AB
AB
LE
55 CP
54 B0
AB
AB
LE
A0
GND
A1
53 GND
52 B1
51 B2
3, 5, 6, 8, 9,
10, 12, 13, 14,
15, 16, 17, 19,
20, 21, 23, 24,
26
A0 to A17
GND
Data inputs/outputs
A2
50
V
V
CC
CC
A3
49 B3
48 B4
47 B5
4, 11, 18, 25,
32, 39, 46, 53
Ground (0V)
A4
A5 10
GND 11
A6 12
7, 22, 35, 50
V
CC
Positive supply voltage
Output enable B-to-A
Latch enable B-to-A
Clock enable B-to-A
Clock input B-to-A
GND
46
27
28
29
30
OE
BA
BA
45 B6
LE
A7 13
B7
43 B8
B9
44
CE
CP
A8 14
A9 15
BA
42
41 B10
B11
BA
A10 16
A11 17
54, 52, 51, 49,
48, 47, 45, 44,
43, 42, 41, 40,
38, 37, 36, 34,
33, 31
40
39 GND
B12
B0 to B17
Data inputs/outputs
GND 18
A12 19
38
37 B13
A13 20
A14 21
55
56
CP
Clock input A-to-B
AB
36
35
34
B14
V
CE
Clock enable A-to-B
AB
22
V
CC
CC
A15 23
A16 24
GND 25
A17 26
B15
33 B16
32 GND
31 B17
30
OE
BA
LE
BA
27
28
CP
BA
BA
29 CE
SW00124
LOGIC SYMBOL
3
5
A0
B0
B1
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
A1
6
A2
B2
8
A3
B3
9
A4
B4
10
12
13
14
15
16
17
19
20
21
23
24
26
A5
B5
A6
B6
A7
B7
A8
B8
A9
B9
A10
A11
A12
A13
A14
A15
A16
A17
B10
B11
B12
B13
B14
B15
B16
B17
OE
OE
LE
1
2
27
28
AB
BA
LE
AB
BA
CP
CP
55
56
30
29
AB
BA
BA
CE
CE
AB
SW00125
3
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
LOGIC DIAGRAM (one section)
OE
CE
AB
AB
AB
LE
CP
AB
CP
LE
BA
BA
BA
BA
CE
OE
CE
C1
CP
1D
B1
A1
CE
C1
CP
1D
18 IDENTICAL CHANNELS
SW00131
FUNCTION TABLE
INPUTS
OUTPUTS
STATUS
CE
OE
LE
CP
XX
DATA
XX
XX
XX
X
H
X
X
X
Z
Disabled
X
X
L
L
H
H
X
X
H
L
H
L
Transparent
Hold
H
L
L
X
X
NC
L
L
L
L
L
L
↓
↓
h
l
H
L
Clock + display
L
L
L
L
L
L
H
L
X
X
NC
Hold
XX
H
L
h
l
X
↓
NC
Z
=
=
=
=
=
=
=
=
=
AB for A-to-B direction, BA for B-to-A direction
HIGH voltage level
LOW voltage level
HIGH state must be present one setup time before the LOW-to-HIGH transition of CP
LOW state must be present one setup time before the LOW-to-HIGH transition of CP
Don’t care
HIGH-to-LOW level transition
No change
XX
XX
High impedance “off” state
4
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
LOGIC SYMBOL (IEEE/IEC)
BUSHOLD CIRCUIT
1
V
EN1
CC
OE
AB
AB
AB
56
G2
2C3
CE
55
2
CP
LE
C3
AB
G2
27
29
30
28
EN4
G5
OE
BA
Data Input
To internal circuit
CE
BA
5C6
CP
LE
BA
C6
G5
BA
3
54
A0
B0
3D
4
1
6D
5
6
8
52
51
49
SW00050
B1
B2
B3
A1
A2
A3
9
48
47
A4
A5
B4
B5
10
12
13
14
45
44
43
A6
A7
A8
B6
B7
B8
15
16
42
41
A9
B9
A10
B10
17
19
40
38
A11
A12
B11
B12
20
21
23
37
36
34
A13
A14
A15
B13
B14
B15
24
26
33
31
A16
A17
B16
B17
SW00126
5
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
MIN
MAX
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
2.3
2.7
V
CC
V
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
3.0
3.6
V
DC Input voltage range
0
0
V
V
V
V
I
CC
V
O
DC output voltage range
CC
T
amb
Operating free-air temperature range
–40
+85
°C
V
CC
V
CC
= 2.3 to 3.0V
= 3.0 to 3.6V
0
0
20
10
t , t
r
Input rise and fall times
ns/V
f
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC input diode current
V t0
I
mA
1
For control pins
–0.5 to +4.6
V
DC input voltage
V
I
1
For data inputs
uV or V t 0
–0.5 to V +0.5
CC
I
DC output diode current
DC output voltage
V
O
"50
mA
V
OK
CC
O
V
O
Note 1
= 0 to V
CC
–0.5 to V +0.5
CC
I
O
DC output source or sink current
V
O
"50
"100
mA
mA
°C
I
, I
DC V or GND current
GND CC
CC
T
stg
Storage temperature range
–65 to +150
Power dissipation per package
–plastic thin-medium-shrink (TSSOP) above +55°C derate linearly with 8 mW/K
For temperature range: –40 to +125 °C
P
TOT
mW
600
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
6
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
1.7
TYP
1.2
1.5
1.2
1.5
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.3 to 2.7V
V
HIGH level Input voltage
LOW level Input voltage
V
V
IH
= 2.7 to 3.6V
= 2.3 to 2.7V
= 2.7 to 3.6V
2.0
0.7
0.8
V
IL
= 2.3 to 3.6V; V = V or V ; I = –100µA
V
*0.2
V
CC
I
IH
IL
O
CC
= 2.3V; V = V or V ; I = –6mA
V
V
V
V
V
0.3
0.6
0.5
0.6
V
V
V
V
V
0.08
0.26
0.14
0.09
0.28
*
*
*
*
*
I
IH
IL
O
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.3V; V = V or V ; I = –12mA
*
*
*
*
I
IH
IL
O
V
OH
HIGH level output voltage
V
= 2.7V; V = V or V ; I = –12mA
I
IH
IL
O
= 3.0V; V = V or V ; I = –12mA
I
IH
IL
O
= 3.0V; V = V or V
I
= –24mA
*1.0
CC
I
IH
IL; O
= 2.3 to 3.6V; V = V or V ; I = 100µA
GND
0.07
0.15
0.14
0.27
0.20
0.40
0.70
0.40
0.55
V
V
I
IH
IL
O
= 2.3V; V = V or V ; I = 6mA
I
IH
IL
O
= 2.3V; V = V or V ; I = 12mA
V
OL
LOW level output voltage
I
IH
IL
O
= 2.7V; V = V or V ; I = 12mA
V
I
IH
IL
O
= 3.0V; V = V or V
I = 24mA
IL; O
I
IH
V
= 2.3 to 3.6V;
CC
CC
I
Input leakage current
0.1
0.1
5
µA
µA
I
V = V or GND
I
V
V
= 2.7 to 3.6V; V = V or V ;
I IH IL
CC
O
I
3-State output OFF-state current
10
OZ
= V or GND
CC
I
Quiescent supply current
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.3 to 3.6V; V = V or GND; I = 0
0.2
150
–
40
µA
µA
CC
I
CC
O
∆I
Additional quiescent supply current
= 2.3V to 3.6V; V = V – 0.6V; I = 0
750
CC
I
CC
O
2
= 2.3V; V = 0.7V
45
I
I
Bus hold LOW sustaining current
Bus hold HIGH sustaining current
µA
µA
BHL
2
2
2
= 3.0V; V = 0.8V
75
–45
–75
500
–500
150
I
= 2.3V; V = 1.7V
I
I
BHH
= 3.0V; V = 2.0V
–175
I
2
I
Bus hold LOW overdrive current
Bus hold HIGH overdrive current
= 3.6V
µA
µA
BHLO
2
I
= 3.6V
BHHO
NOTES:
1. All typical values are at T
= 25°C.
amb
2. Valid for data inputs of bus hold parts.
7
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
AC CHARACTERISTICS FOR V = 2.3V TO 2.7V RANGE
CC
GND = 0V; t = t ≤ 2.0ns; C = 30pF
r
f
L
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 2.5V ± 0.2V
UNIT
1
MIN
TYP
MAX
Propagation delay
An, Bn to Bn, An
1.0
3.1
3.6
3.8
3.1
2.8
1.6
2.0
–0.1
0.1
–0.4
0.6
0.6
5.2
Propagation delay
t
/t
1, 2
ns
1.0
1.0
1.0
1.0
3.3
3.3
1.3
1.2
0.7
1.5
1.2
6.2
7.3
6.5
5.1
–
PHL PLH
LE
AB,
LE to Bn, An
BA
Propagation delay
CP CP to Bn, An
AB,
BA
3-State output enable time
OE , OE to An, Bn
t
t
/t
3
3
ns
ns
PZH PZL
BA
AB
3-State output enable time
OE , OE to An, Bn
/t
PHZ PLZ
BA
AB
Pulse width HIGH
LE , LE
AB
BA
t
2
ns
ns
W
Pulse width HIGH or LOW
CP , CP
–
AB
BA
Set-up time
4
4
4
–
An Bn to CP , CP
,
AB
BA
Set-up time
An, Bn to LE
t
–
SU
LE
AB,
BA
Set-up time
–
CE
CE to CP , CP
AB,
BA AB BA
Hold time
–
An, Bn to CP , CP
AB
BA
4
4
Hold time
t
h
ns
–
An, Bn to LE , LE
AB
BA
Hold time
1.4
2.0
–
–
CE
CE to CP , CP
AB,
BA AB BA
f
Maximum clock frequency
150
335
MHz
MAX
NOTE:
1. All typical values are at V = 2.5V and T
= 25°C.
amb
CC
8
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
AC CHARACTERISTICS FOR V = 3.0V TO 3.6V RANGE AND V = 2.7V
CC
CC
GND = 0V; t = t = 2.5ns; C = 50pF
r
f
L
LIMITS
SYMBOL
PARAMETER
WAVEFORM
V
CC
= 3.3V ±0.3V
V
CC
= 2.7V
UNIT
1
MIN
TYP
MAX
4.2
MIN
TYP
MAX
Propagation delay
An, Bn to Bn, An
1.0
2.8
3.1
3.4
3.8
3.3
3.3
1.0
1.4
4.7
Propagation delay
t
/t
1, 2
ns
1.0
1.3
1.1
1.2
3.3
3.3
1.2
1.1
0.8
1.5
1.3
3.1
2.9
2.8
3.2
1.0
1.1
–0.1
0.3
–0.2
0.4
0.1
4.9
5.7
5.2
4.4
5.5
6.8
6.3
4.7
PHL PLH
LE , LE to Bn, An
AB
BA
Propagation delay
CP , CP to Bn, An
AB
BA
3-State output enable time
t
t
/t
3
3
ns
ns
PZH PZL
OE to An
BA
3-State output disable time
/t
PHZ PLZ
OE to An
BA
LE pulse width
3.3
3.3
1.3
1.1
0.7
1.8
1.6
LE , LE to CP , CP
AB
BA
AB
BA
t
2
ns
ns
W
LE pulse width HIGH or LOW
CP , CP
AB
BA
Set-up time
4
4
4
–0.4
–0.2
–0.7
0.4
An, Bn to CP , CP
AB
BA
Set-up time
t
SU
An, Bn to LE , LE
AB
BA
Set-up time
CE , CE to CP , CP
AB
BA
AB
BA
Hold time
An, Bn to CP , CP
AB
BA
4
4
Hold time
t
h
ns
0.1
An, Bn to LE , LE
AB
BA
Hold time
1.4
0.4
1.7
0.6
CE , CE to CP , CP
AB
BA
AB
BA
f
Maximum clock frequency
150
362
150
350
MHz
MAX
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
9
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
AC WAVEFORMS
V
CC
= 2.3 TO 2.7 V RANGE
1. V = 0.5 V
V
M
I
2. V = V + 0.15V
X
OL
3. V = V – 0.15V
V
OE INPUT
XX
M
Y
OH
4. V = V
I
CC
GND
5. V and V are the typical output voltage drop that occur with
OL
OH
the output load.
t
t
V
CC
= 3.0 TO 3.6 V RANGE AND V = 2.7 V
PLZ
PZL
CC
1. V = 1.5 V
V
M
CC
2. V = V + 0.3V
OUTPUT
LOW-to-OFF
OFF-to-LOW
X
OL
V
M
3. V = V – 0.3V
Y
OH
4. V = 2.7 V
V
I
X
V
OL
5. V and V are the typical output voltage drop that occur with
OL
OH
the output load.
t
t
PZH
PHZ
V
OH
V
I
V
OUTPUT
Y
V
HIGH-to-OFF
OFF-to-HIGH
M
An, Bn
INPUT
V
M
GND
outputs
en-
outputs
dis-
outputs
en-
GND
t
t
PLH
abled
abled
abled
PHL
V
OH
SW00127
Waveform 3. 3-State enable and disable times
Bn, An
OUTPUT
V
M
V
OL
V
I
SW00083
An, Bn
INPUT
V
M
Waveform 1. Input (An, Bn) to output (Bn, An) propagation
delay times
GND
t
h
t
h
t
t
SU
SU
V
I
V
I
CP , LE
XX
INPUT
XX
V
M
CP
INPUT
XX
GND
V
M
LE
XX
INPUT
NOTE: The unshaded areas indicate when the input is permitted to change for
predictable output performance.
GND
t
W
SW00093
t
PHL
t
PLH
V
OH
Waveform 4. Data set-up and hold times for the An and Bn
inputs to the LE , LE , CP and CP inputs
AB
BA
AB
BA
An, Bn
OUTPUT
V
M
V
OL
SW00084
Waveform 2. Latch enable input (LE , LE ) and clock pulse
AB
BA
input (CP , CP ) to output (An, Bn) propagation delays and
AB
BA
latch enable pulse width
10
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
TEST CIRCUIT
S
1
V
2<V
CC
CC
Open
GND
R =500 Ω
L
V
V
OUT
IN
PULSE
GENERATOR
D.U.T.
R =500 Ω
L
R
C
T
L
Test Circuit for 3-State Outputs
SWITCH POSITION
V
V
IN
TEST
SWITCH
Open
CC
t 2.7V
2.7 – 3.6V 2.7V
V
CC
t
/t
PLH PHL
t
/t
2<V
CC
PLZ PZL
t
/t
GND
PHZ PZH
DEFINITIONS
R = Load resistor
L
C = Load capacitance includes jig and probe capacitance
L
R = Termination resistance should be equal to Z
T
OUT
of pulse generators.
SW00047
Load circuitry for switching times
11
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
SOT364-1
12
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
NOTES
13
1998 Sep 24
Philips Semiconductors
Product specification
18-bit universal bus transceiver (3-State)
74ALVCH16600
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-98
Document order number:
9397–750–04799
Philips
Semiconductors
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