74AVC16245DGG-Q100_技术文档

74AVC16245-Q100

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

Rev. 1 — 20 March 2013

Product data sheet

1. General description

The 74AVC16245-Q100 is a 16-bit transceiver featuring non-inverting 3-state bus

compatible outputs in both send and receive directions. The device features two output

enable inputs (nOE) for easy cascading and two send/receive inputs (nDIR) for direction

control. Inputs nOE control the outputs so that the buses are effectively isolated. This

device can be used as two 8-bit transceivers or one 16-bit transceiver.

The 74AVC16245-Q100 is designed to have an extremely fast propagation delay and a

minimum amount of power consumption.

To ensure the high-impedance output state during power-up or power-down, tie pins nOE

to V_CCthrough a pull-up resistor (Live Insertion).

A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line

drive during transient (see Figure 4 and Figure 5)

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 3) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 3)

 Specified from 40 C to +85 C

 Wide supply voltage range from 1.2 V to 3.6 V

 Complies with JEDEC standards:

 JESD8-7 (1.2 V to 1.95 V)

 JESD8-5 (1.8 V to 2.7 V)

 JESD8-1A (2.7 V to 3.6 V)

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

 CMOS low power consumption

 Input/output tolerant up to 3.6 V

 Dynamic Controlled Output (DCO) circuit dynamically changes output impedance,

resulting in noise reduction without speed degradation

 Low inductance multiple VCC and GND pins to minimize noise and ground bounce

 Supports Live Insertion

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

3. Ordering information

Table 1.

Ordering information

Type number

Package

Temperature range Name

Description

Version

74AVC16245DGG-Q100 40 C to +85 C

TSSOP48

plastic thin shrink small outline package;

48 leads; body width 6.1 mm

SOT362-1

4. Functional diagram

2DIR

1DIR

2OE

1OE

2A0

2B0

2A1

2B1

2A2

2B2

1A0

1A1

1A2

1A3

1A4

1A5

1A6

1A7

1B0

1B1

1B2

1B3

1B4

1B5

1B6

1B7

2A3

2B3

2A4

2B4

2A5

2B5

2A6

2B6

2A7

2B7

001aaa789

Fig 1. Logic symbol

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

2 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

1OE

G3

1DIR

3EN1[BA]

3EN2[AB]

G6

2OE

6EN1[BA]

6EN2[AB]

2DIR

1A0

1B0

1

2

1B1

1B2

1B3

1B4

1B5

1B6

1B7

1A1

1A2

1A3

1A4

1A5

1A6

1A7

2B0

2A0

4

5

2A1

2A2

2A3

2A4

2A5

2A6

2A7

2B1

2B2

2B3

2B4

2B5

2B6

2B7

001aaa790

Fig 2. IEC logic symbol

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

3 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

5. Pinning information

5.1 Pinning

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Fig 3. Pin configuration

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

4 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

5.2 Pin description

Table 2.

Pin description

Symbol

Description

1DIR, 2DIR

1B0 to 1B7

2B0 to 2B7

GND

1, 24

direction control input

data input/output

ground (0 V)

2, 3, 5, 6, 8, 9, 11, 12

13, 14, 16, 17, 19, 20, 22, 23

4, 10, 15, 21, 28, 34, 39, 45

7, 18, 31, 42

V_CC

supply voltage

1OE, 2OE

1A0 to 1A7

2A0 to 2A7

48, 25

output enable input (active LOW)

data input/output

47, 46, 44, 43, 41, 40, 38, 37

36, 35, 33, 32, 30, 29, 27, 26

6. Functional description

Table 3.

Function table^[1]

Inputs

Outputs

nOE

L

nDIR

nAn

A = B

inputs

Z

nBn

inputs

B = A

Z

L

H

X

H

[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.

7. Limiting values

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

V_CC

I_IK

Parameter

Conditions

Min

0.5

50

0.5

50

0.5

-

Max

+4.6

-

Unit

V

supply voltage

input clamping current

input voltage

V_I< 0 V

mA

V

[1]

V_I

+4.6

-

I_OK

output clamping current

output voltage

V_O< 0 V

mA

V

[1]

V_O

output HIGH or LOW

output 3-state

V_O= 0 V to V_CC

V_CC+ 0.5

+4.6

50

100

-

V

I_O

output current

mA

C

I_CC

I_GND

T_stg

P_tot

supply current

-

ground current

100

65

-

storage temperature

total power dissipation

+150

500

[2]

T_amb= 40 C to +125 C

mW

[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

[2] Above 60 C the value of P_totderates linearly with 5.5 mW/K.

74AVC16245_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 20 March 2013

5 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

8. Recommended operating conditions

Table 5.

Recommended operating conditions

Symbol Parameter

Conditions

Min

1.4

1.65

2.3

3.0

1.2

0

Typ

Max

1.6

1.95

2.7

3.6

V_CC

3.6

+85

40

Unit

V

V_CC

supply voltage

according to JEDEC Low Voltage Standards

-

V

for low-voltage applications

V

V_I

input voltage

V

V_O

output voltage

output HIGH or LOW

output 3-state

0

V

0

V

T_amb

ambient temperature

in free air

40

0

C

ns/V

t/V

input transition rise and fall

rate

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 3.0 V

V_CC= 3.0 V to 3.6 V

0

30

0

20

0

10

9. Static characteristics

Table 6.

Static characteristics

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Typ^[1]

Max

Unit

T_amb= 40 C to +85 C

V_IH

HIGH-level input voltage

V_CC= 1.2 V

V_CC

-

V

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

V_CC= 1.2 V

0.65  V_CC

0.9

1.2

1.5

-

0.65  V_CC

-

1.7

-

2.0

V_IL

LOW-level input voltage

-

GND

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

0.9

1.2

1.5

0.35  V_CC

0.7

0.8

V_OH

HIGH-level output voltage V_I= V_IHor V_IL

I_O= 100 A; V_CC= 1.65 V to 3.6 V V_CC 0.20

V_CC

-

V

I_O= 3 mA; V_CC= 1.4 V

I_O= 4 mA; V_CC= 1.65 V

I_O= 8 mA; V_CC= 2.3 V

I_O= 12 mA; V_CC= 3.0 V

V_CC 0.35 V_CC 0.21

V_CC 0.45 V_CC 0.25

V_CC 0.55 V_CC 0.37

V_CC 0.70 V_CC 0.47

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

6 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

Table 6.

Static characteristics …continued

At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Typ^[1]

Max

Unit

V_OL

LOW-level output voltage

V_I= V_IHor V_IL

I_O= 100 A; V_CC= 1.65 V to 3.6 V

I_O= 3 mA; V_CC= 1.4 V

I_O= 4 mA; V_CC= 1.65 V

I_O= 8 mA; V_CC= 2.3 V

I_O= 12 mA; V_CC= 3.0 V

V_I= V_CCor GND; V_CC= 1.4 V to 3.6 V

V_Ior V_O= 3.6 V; V_CC= 0.0 V

V_I= V_IHor V_IL; V_O= V_CCor GND

V_CC= 1.4 V to 2.7 V

-

GND

0.22

0.24

0.38

0.53

0.1

0.20

0.35

0.45

0.55

0.70

2.5

V

I_I

input leakage current

A

I_OFF

I_OZ

power-off leakage current

OFF-state output current

0.1

10

-

0.1

5

A

V_CC= 3.0 V to 3.6 V

10

I_CC

supply current

V_I= V_CCor GND; I_O= 0 A

V_CC= 1.4 V to 2.7 V

-

0.1

0.2

5.0

20

40

-

A

pF

V_CC= 3.0 V to 3.6 V

C_I

input capacitance

[1] All typical values are measured at T_amb= 25 C.

9.1 Graphs

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Fig 4. Output voltage as a function of the HIGH-level

output current.

Fig 5. Output voltage as a function of the LOW-level

output current.

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

7 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

10. Dynamic characteristics

Table 7.

Dynamic characteristics

Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.

Symbol Parameter

Conditions

40 C to +85 C

Unit

Min

Typ^[2]

Max

[1]

[3]

t_pd

propagation delay

nAn to nBn; nBn to nAn; see Figure 6

V_CC= 1.2 V

-

2.8

1.8

1.3

1.1

-

ns

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

nOE to nAn, nBn; see Figure 7

V_CC= 1.2 V

-

0.7

0.6

0.5

3.0

1.9

1.7

t_en

enable time

-

5.9

3.9

3.3

2.4

2.0

-

ns

V_CC= 1.4 V to 1.6 V

V_CC= 1.65 V to 1.95 V

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

nOE to nAn, nBn; see Figure 7

V_CC= 1.2 V

-

1.4

1.0

0.7

6.5

4.5

3.7

t_dis

disable time

-

6.9

4.8

3.7

2.0

2.2

-

ns

V_CC= 1.4 V to 1.6 V

-

V_CC= 1.65 V to 1.95 V

2.2

1.1

1.2

6.0

4.2

3.7

V_CC= 2.3 V to 2.7 V

V_CC= 3.0 V to 3.6 V

per input; V_I= GND to V_CC

outputs enabled

C_PD

power dissipation

capacitance

-

42

2

-

pF

outputs disabled

[1] t_pdis the same as t_PLHand t_PHL

t_enis the same as t_PZLand t_PZH

t_disis the same as t_PLZand t_PHZ

.

[2] Typical values are measured at T_amb= 25 C and V_CC= 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V respectively.

[3] C_PDis used to determine the dynamic power dissipation (P_Din W).

P_D= C_PD V_CC² f_i N + (C_L V_CC² f_o) where:

f_i= input frequency in MHz; f_o= output frequency in MHz

C_L= output load capacitance in pF

V_CC= supply voltage in Volts

N = number of inputs switching

(C_L V_CC² f_o) = sum of the outputs.

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

8 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

11. Waveforms

V

I

nAn, nBn

input

V

M

GND

t

PHL

PLH

V

OH

nBn, nAn

output

V

M

mna477

V

OL

Measurement points are given in Table 8.

Logic levels: V_OLand V_OHare typical output voltage levels that occur with the output load.

Fig 6. The input (nAn, nBn) to output (nBn, nAn) propagation delays

V

I

nOE input

GND

V

M

t

PZL

PLZ

V

CC

output

LOW-to-OFF

OFF-to-LOW

V

M

V

X

V

OL

t

PHZ

PZH

V

OH

V

Y

output

HIGH-to-OFF

OFF-to-HIGH

V

M

GND

outputs

enabled

outputs

enabled

outputs

disabled

mna362

Measurement points are given in Table 8.

Logic levels: V_OLand V_OHare typical output voltage levels that occur with the output load.

Fig 7. 3-state enable and disable times

Table 8.

Measurement points

Supply voltage

V_CC

V_M

Input

V_I

t_r= t_f

V_X

V_Y

1.2 V

0.5  V_CC

V_CC

 2 ns

V_OL+ 0.15 V

V_OL+ 0.3 V

V_OH 0.15 V

V_OH 0.3 V

1.4 V to 1.6 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3.0 V to 3.6 V

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

9 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

t

W

V

I

90 %

negative

pulse

V

M

10 %

0 V

t

r

f

t

f

r

V

I

90 %

positive

pulse

V

M

10 %

0 V

t

W

V

EXT

R

V

CC

L

V

O

I

G

DUT

R

T

C

L

R

L

001aae331

Test data is given in Table 9.

Definitions for test circuit:

R_L= Load resistance.

C_L= Load capacitance including jig and probe capacitance.

R_T= Termination resistance should be equal to output impedance Z_oof the pulse generator.

V_EXT= External voltage for measuring switching times.

Fig 8. Test circuit for measuring switching times

Table 9.

Test data

Supply voltage

Input

V_I

Load

C_L

V_EXT

t_r, t_f

R_L

t_PLH, t_PHL

open

t_PLZ, t_PZL

2  V_CC

t_PHZ, t_PZH

GND

1.2 V

V_CC

 2 ns

15 pF

30 pF

2 k

1 k

500 

1.4 V to 1.6 V

1.65 V to 1.95 V

2.3 V to 2.7 V

3.0 V to 3.6 V

open

GND

open

GND

open

GND

open

GND

74AVC16245_Q100

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Product data sheet

Rev. 1 — 20 March 2013

10 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

12. Package outline

TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm

SOT362-1

E

D

A

X

c

H

v

M

A

y

E

Z

48

25

Q

A

2

(A )

3

A

1

pin 1 index

θ

L

p

L

detail X

1

24

w

M

b

e

p

0

2.5

5 mm

scale

DIMENSIONS (mm are the original dimensions).

A

(1)

(2)

UNIT

A

b

c

D

E

e

H

L

p

Q

v

w

y

Z

θ

1

2

3

p

E

max.

8^o

0^o

0.15

0.05

1.05

0.85

0.28

0.17

0.2

0.1

12.6

12.4

6.2

6.0

8.3

7.9

0.8

0.4

0.50

0.35

0.8

0.4

mm

1.2

0.5

1

0.25

0.08

0.1

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

REFERENCES

OUTLINE

EUROPEAN

PROJECTION

ISSUE DATE

VERSION

IEC

JEDEC

JEITA

99-12-27

03-02-19

SOT362-1

MO-153

Fig 9. Package outline SOT362-1 (TSSOP48)

74AVC16245_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 20 March 2013

11 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

13. Abbreviations

Table 10. Abbreviations

Acronym

CMOS

DUT

Description

Complementary Metal-Oxide Semiconductor

Device Under Test

Military

MIL

TTL

Transistor-Transistor Logic

14. Revision history

Table 11. Revision history

Document ID

Release date Data sheet status

20130320 Product data sheet

Change notice Order number Supersedes

74AVC16245_Q100 v.1

-

74AVC16245_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 20 March 2013

12 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

15. Legal information

15.1 Data sheet status

Document status^[1][2]

Product status^[3]

Development

Definition

Objective [short] data sheet

This document contains data from the objective specification for product development.

This document contains data from the preliminary specification.

This document contains the product specification.

Preliminary [short] data sheet Qualification

Product [short] data sheet Production

[1]

[2]

[3]

Please consult the most recently issued document before initiating or completing a design.

The term ‘short data sheet’ is explained in section “Definitions”.

The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

Suitability for use in automotive applications — This NXP

15.2 Definitions

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

office. In case of any inconsistency or conflict with the short data sheet, the

full data sheet shall prevail.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

specified use without further testing or modification.

Customers are responsible for the design and operation of their applications

and products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications and

products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with their

applications and products.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product is

deemed to offer functions and qualities beyond those described in the

Product data sheet.

NXP Semiconductors does not accept any liability related to any default,

damage, costs or problem which is based on any weakness or default in the

customer’s applications or products, or the application or use by customer’s

third party customer(s). Customer is responsible for doing all necessary

testing for the customer’s applications and products using NXP

Semiconductors products in order to avoid a default of the applications and

the products or of the application or use by customer’s third party

customer(s). NXP does not accept any liability in this respect.

15.3 Disclaimers

Limited warranty and liability — Information in this document is believed to

be accurate and reliable. However, NXP Semiconductors does not give any

representations or warranties, expressed or implied, as to the accuracy or

completeness of such information and shall have no liability for the

consequences of use of such information. NXP Semiconductors takes no

responsibility for the content in this document if provided by an information

source outside of NXP Semiconductors.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those given in

the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

In no event shall NXP Semiconductors be liable for any indirect, incidental,

punitive, special or consequential damages (including - without limitation - lost

profits, lost savings, business interruption, costs related to the removal or

replacement of any products or rework charges) whether or not such

damages are based on tort (including negligence), warranty, breach of

contract or any other legal theory.

Notwithstanding any damages that customer might incur for any reason

whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards

customer for the products described herein shall be limited in accordance

with the Terms and conditions of commercial sale of NXP Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

74AVC16245_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 20 March 2013

13 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

No offer to sell or license — Nothing in this document may be interpreted or

construed as an offer to sell products that is open for acceptance or the grant,

conveyance or implication of any license under any copyrights, patents or

other industrial or intellectual property rights.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

15.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

16. Contact information

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

74AVC16245_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1 — 20 March 2013

14 of 15

74AVC16245-Q100

NXP Semiconductors

16-bit transceiver with direction pin; 3.6 V tolerant; 3-state

17. Contents

1

2

3

4

General description. . . . . . . . . . . . . . . . . . . . . . 1

Features and benefits . . . . . . . . . . . . . . . . . . . . 1

Ordering information. . . . . . . . . . . . . . . . . . . . . 2

Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5

5.1

5.2

Pinning information. . . . . . . . . . . . . . . . . . . . . . 4

Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5

6

Functional description . . . . . . . . . . . . . . . . . . . 5

Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5

Recommended operating conditions. . . . . . . . 6

Static characteristics. . . . . . . . . . . . . . . . . . . . . 6

Graphs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Dynamic characteristics . . . . . . . . . . . . . . . . . . 8

Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11

Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12

Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12

7

8

9

9.1

10

11

12

13

14

15

Legal information. . . . . . . . . . . . . . . . . . . . . . . 13

Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13

Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

15.1

15.2

15.3

15.4

16

17

Contact information. . . . . . . . . . . . . . . . . . . . . 14

Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 20 March 2013

Document identifier: 74AVC16245_Q100


型号：	74AVC16245DGG-Q100
厂家：	NXP
描述：	AVC SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48 光电二极管输出元件逻辑集成电路
文件：	总15页 (文件大小：130K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

74AVC16245DGG-Q100 [NXP]

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