74F2244 [NXP]

Octal buffer with 30ohm equivalent output termination 3-State; 与30ohm相当于输出端接三态八路缓冲器
74F2244
型号: 74F2244
厂家: NXP    NXP
描述:

Octal buffer with 30ohm equivalent output termination 3-State
与30ohm相当于输出端接三态八路缓冲器

文件: 总10页 (文件大小:97K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
74F2244  
Octal buffer with 30equivalent output  
termination (3-State)  
Product specification  
IC15 Data Handbook  
1994 Dec 5  
Philip s Se m ic ond uc tors  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination  
(3-State)  
74F2244  
FEATURES  
Octal bus interface  
DESCRIPTION  
The 74F2244 is an octal buffer that is ideal for driving dynamic  
DRAM with matching impedance. The outputs are all capable of  
sinking 5mA and sourcing up to 15mA. The device features two  
output enables, OEa and OEb, each controlling four of the 3–state  
outputs.  
30output termination ideal for driving DRAM  
15mA source current  
SSOP Type II Package  
TYPICAL  
PROPAGATION  
DELAY  
TYPICAL  
SUPPLY CURRENT  
(TOTAL)  
TYPE  
74F2244  
4.0ns  
30mA  
ORDERING INFORMATION  
ORDER CODE  
COMMERCIAL RANGE  
= 5V ±10%, T = 0°C to +70°C  
DESCRIPTION  
DRAWING NUMBER  
V
CC  
amb  
20-pin plastic DIP  
20-pin plastic SOL  
N74F2244N  
N74F2244D  
N74F2244DB  
SOT146-1  
SOT163-1  
SOT339-1  
20-pin plastic SSOP Type II  
INPUT AND OUTPUT LOADING AND FAN OUT TABLE  
74F (U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
DESCRIPTION  
Ian, Ibn  
Data inputs  
1.0/0.33  
20µA/0.2mA  
20µA/0.2mA  
OEa, OEb  
Yan, Ybn  
Output enable inputs (active low)  
Data outputs  
1.0/0.33  
750/8.33  
15mA/5mA  
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.  
PIN CONFIGURATION  
LOGIC SYMBOL  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OEa  
Ia0  
V
CC  
2
4
6
8
17 15 13 11  
OEb  
Ya0  
Yb0  
Ia1  
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3  
Ib0  
Yb1  
Ia2  
Ya1  
1
OEa  
OEb  
19  
Ib1  
Yb2  
Ia3  
Ya2  
Ib2  
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3  
Yb3  
Ya3  
Ib3  
18  
16 14 12  
3
5
7
9
GND 10  
V
= Pin 20  
GND = Pin 10  
CC  
SF00228  
SF00227  
2
1994 Dec 05  
853-1525 14380  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination  
(3-State)  
74F2244  
IEC/IEEE SYMBOL  
LOGIC DIAGRAM  
1
EN1  
EN2  
17  
15  
2
2
4
18  
16  
Ib0  
Ib1  
Ib2  
Ib3  
OEb  
Yb0  
Ia0  
Ia1  
Ya0  
Ya1  
Ya2  
Ya3  
19  
5
Yb1  
2
4
18  
2D  
1
16  
14  
13  
7
6
8
14  
12  
Yb2  
6
Ia2  
12  
3
8
11  
10  
9
Yb3  
17  
2
Ia3  
5
15  
13  
11  
1
7
OEa  
9
V
= Pin 20  
CC  
GND = Pin 10  
SF00229  
SF00236  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
OEa  
L
Ia  
L
OEb  
Ib  
L
Ya  
Yb  
L
L
L
L
H
Z
L
H
X
H
X
H
Z
H
H
Notes to function table  
H = High voltage level  
L
X
Z
=
=
=
Low voltage level  
Don’t care  
High impedance ”off” state  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the  
operating free air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5  
UNIT  
V
V
CC  
V
IN  
Supply voltage  
Input voltage  
Input current  
V
I
IN  
mA  
V
I
Voltage applied to output in high output state  
Current applied to output in low output state  
–0.5 to V  
V
OUT  
CC  
10  
mA  
°C  
°C  
OUT  
T
amb  
Operating free air temperature range  
Storage temperature range  
0 to +70  
T
stg  
–65 to +150  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
UNIT  
SYMBOL  
PARAMETER  
PARAMETER  
MIN  
4.5  
NOM  
MAX  
V
Supply voltage  
5.0  
5.5  
V
V
CC  
IH  
IL  
V
V
High–level input voltage  
Low–level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–15  
5
V
I
I
I
mA  
mA  
mA  
Ik  
High–level output current  
Low–level output current  
OH  
OL  
T
amb  
Operating free air temperature range  
0
+70  
°C  
3
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination  
(3-State)  
74F2244  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
TEST  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
1
2
CONDITIONS  
= –3mA  
MIN TYP  
MAX  
±10%V  
V
V
V
= MIN,  
I
2.5  
V
V
V
V
C
CC  
OH  
C
V
OH  
High-level output voltage  
±5%V  
= MAX,  
= MIN  
2.7  
2.0  
2.0  
3.4  
CC  
IL  
±10%V  
I
=
C
IH  
OH  
–15mA  
C
±5%V  
CC  
V
V
= MIN,  
= MAX,  
±10%V  
CC  
IL  
C
V
V
Low-level output voltage  
I
OL  
= MAX  
0.50  
0.50  
V
OL  
C
V
V
V
V
V
= MIN,  
±5%V  
0.42  
V
V
IH  
CC  
Input clamp voltage  
= MIN, I = I  
IK  
–0.73 -1.2  
IK  
CC  
CC  
CC  
CC  
I
I
I
I
Input current at maximum input voltage  
High–level input current  
= MAX, V = 7.0V  
100  
20  
µA  
µA  
mA  
I
I
= MAX, V = 2.7V  
IH  
IL  
I
Low–level input current  
= MAX, V = 0.5V  
–0.2  
I
Off–state output current,  
high–level voltage applied  
µA  
µA  
I
V
= MAX, V = 2.7V  
50  
OZH  
CC  
O
Off–state output current,  
low–level voltage applied  
I
I
V
V
= MAX, V = 0.5V  
–50  
OZL  
CC  
O
3
Short–circuit output current  
= MAX  
= MAX  
-60  
-150  
mA  
mA  
mA  
mA  
OS  
CC  
I
I
20  
45  
26  
30  
65  
40  
CCH  
I
Supply current (total)  
I
V
CC  
CC  
CCL  
CCZ  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T  
= 25°C.  
amb  
CC  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
T
= +25°C  
= +5.0V  
= 0°C to +70°C  
= +5.0V ± 10%  
amb  
amb  
V
SYMBOL  
PARAMETER  
TEST  
V
UNIT  
CC  
CC  
CONDITION  
C
= 50pF, R = 500Ω  
C
= 50pF,  
R = 500Ω  
L
L
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t
t
Propagation delay  
Ian, Ibn to Yn  
3.0  
2.5  
4.5  
4.5  
7.0  
7.0  
2.5  
2.5  
8.0  
7.5  
PLH  
PHL  
Waveform 1  
ns  
ns  
ns  
t
t
Output enable time  
to high or low level  
Waveform 2  
Waveform 3  
2.5  
3.0  
4.5  
5.0  
7.5  
8.0  
2.0  
3.0  
8.0  
8.5  
PZH  
PZL  
t
t
Output disable time  
from high or low level  
Waveform 2  
Waveform 3  
1.5  
1.5  
3.5  
2.5  
6.0  
5.5  
1.0  
1.0  
6.0  
5.5  
PHZ  
PLZ  
4
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination  
(3-State)  
74F2244  
AC WAVEFORMS  
For all waveforms, V = 1.5V.  
M
Ian, Ibn  
OEn  
Yn  
V
V
M
M
V
M
V
M
t
t
PLZ  
PZL  
t
t
PHL  
PLH  
3.5V  
V
M
Yn  
V
V
M
M
V
+0.3V  
OL  
SF00234  
SF00231  
Waveform 3. 3-State output enable time to low level  
and output disable time from low level  
Waveform 1. Propagation delay for data to outputs  
V
V
M
M
t
OEn  
Yn  
t
PZH  
PHZ  
V
–0.3V  
OH  
V
M
0V  
SF00233  
Waveform 2. 3-State output enable time to high level  
and output disable time from high level  
TEST CIRCUIT AND WAVEFORMS  
SWITCH POSITION  
t
w
AMP (V)  
0V  
TEST  
SWITCH  
closed  
open  
90%  
90%  
7.0V  
V
CC  
NEGATIVE  
PULSE  
t
, t  
PLZ PZL  
V
V
M
M
All other  
10%  
10%  
R
L
V
V
OUT  
IN  
t
t
)
)
t
t )  
THL ( f  
TLH ( r  
PULSE  
GENERATOR  
D.U.T.  
t
t
t
t )  
TLH ( r  
THL ( f  
R
C
R
L
AMP (V)  
0V  
T
L
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test circuit for 3-State outputs  
DEFINITIONS:  
10%  
10%  
t
w
R
=
Load resistor; see AC electrical characteristics for  
value.  
Load capacitance includes jig and probe  
capacitance; see AC electrical characteristics for  
value  
Input pulse definition  
INPUT PULSE REQUIREMENTS  
L
C
=
L
family  
V
M
rep. rate  
t
t
t
THL  
amplitude  
w
TLH  
R
T
=
Termination resistance should be equal to Z  
pulse generators.  
of  
OUT  
74F  
3.0V  
1.5V  
1MHz  
500ns 2.5ns  
2.5ns  
SF000235  
5
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination (3-State)  
74F2244  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
6
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination (3-State)  
74F2244  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
7
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination (3-State)  
74F2244  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
8
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination (3-State)  
74F2244  
NOTES  
9
1994 Dec 05  
Philips Semiconductors  
Product specification  
Octal buffer with 30equivalent output termination (3-State)  
74F2244  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
Preproduction Product  
Full Production  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Philips Semiconductors and Philips Electronics North America Corporation  
register eligible circuits under the Semiconductor Chip Protection Act.  
Copyright Philips Electronics North America Corporation 1994  
All rights reserved. Printed in U.S.A.  
(print code)  
Date of release: July 1994  
9397-750-05198  
Document order number:  

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