74F595 [NXP]
8-bit shift register with output laches 3-State; 8位的移位寄存器，输出懈怠三态
| 型号： | 74F595 |
| 厂家： | 
NXP |
| 描述： | 8-bit shift register with output laches 3-State |
| 文件： | 总13页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F595
8-bit shift register with output laches
(3-State)
Product specification
IC15 Data Handbook
1990 Apr 18
Philips
Semiconductors
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
FEATURES
PIN CONFIGURATION
• Low noise, now switching feedthrough current
Q1
Q2
Q3
Q4
Q5
1
2
3
4
5
16
V
CC
• Controlled output edge rates
15 Q0
• High impedance PNP base inputs for reduced loading
(20µA in High and Low states)
14 DS
13 OE
• 8-bit serial-in, parallel-out shift register with storage
• 3-state outputs
12 STCP
11 SHCP
10 SHR
Q6
6
• Shift register has direct clear
Q7
7
8
GND
9
QS
• Guaranteed shift frequency-DC to 100MHz
SF01096
DESCRIPTION
The 74F595 contains an 8-bit serial-in, parallel-out shift register that
feeds an 8-bit D-type storage register. The storage register has
parallel 3-State outputs. Separate clocks are provided for both the
shift register and the storage register. The shift register has a direct
overriding clear, serial input and serial output pins for cascading.
Both the shift register and storage register clocks are positive
edge-triggered. If the user wishes to connect both clocks together,
the shift register state will always be one clock pulse ahead of the
storage register.
TYPICAL SUPPLY CURRENT
(TOTAL)
TYPE
TYPICAL f
MAX
74F595
130MHz
65mA
ORDERING INFORMATION
COMMERCIAL RANGE
= 5V ±10%,
V
CC
DESCRIPTION
PKG DWG #
T
amb
= 0°C to +70°C
This device uses patented circuitry to control system noise and
internal ground bounce. This is done by eliminating switching
feedthrough current and controlling both Low-to-High and
High-to-Low slew rates.
16-pin plastic DIP
16-pin plastic SO
N74F595N
SOT38-4
N74F595D
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
LOAD VALUE
74F (U.L.)
HIGH/LOW
PINS
DESCRIPTION
HIGH/LOW
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
20µA/20µA
1.0mA/20mA
3.0mA/24mA
Ds
SHCP
STCP
SHR
OE
Serial data input
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
1.0/0.033
50/33
Shift register clock pulse input (active rising edge)
Storage register clock pulse input (active rising edge)
Shift register reset input (active Low)
Output Enable input (active Low)
Serial expansion output
Qs
Q0–Q7
Data outputs
150/40
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
2
1990 Apr 18
853–1096 99392
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
LOGIC SYMBOL
IEC/IEEE SYMBOL (IEEE/IEC)
13
12
EN3
C2
14
Ds
SRG8
10
11
R
13
OE
C1/ !
1D
12
11
STCP
SHCP
14
Qs
9
3
2D
15
1
10
SHR
2
Q0
15
Q1
1
Q2
2
Q3 Q4 Q5
Q6
6
Q7
7
3
4
5
3
4
5
6
V
=
=
Pin 16
Pin 8
CC
GND
SF01097
7
9
3
2D
SF01098
MODE SELECT – FUNCTION TABLE
INTERNAL SHIFT
REGISTERS
INTERNAL STORAGE
REGISTER
INPUTS
OUTPUTS
OPERATING
MODES
OE
H
H
L
SHR
H
SHCP STCP
Dn
X
O0
O0
L0
O1–O7
O1–O7
L
Q0–Q7
Q0–Q7
Q0–Q7
Q0–Q7
Q0–Q7
Q0–Q7
o0–o7
Q0–Q7
QS
Q7
L
↑
X
X
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Z
Z
No Change
L
X
Clear shift
register, hold latch
L
X
L0
L
Q0–Q7
Z
L
H
L
H
ds
ds
X
Ds
Ds
O0
O0
Ds
Ds
o0–o6
o0–o6
O1–O7
O1–O7
o0–o6
o0–o6
o6
o6
Q7
Q7
o6
o6
Shift
Store
H
Q0–Q7
Z
H
L
H
H
X
o0–o7
o0–o7
Z
H
L
H
ds
ds
o0–o7*
o0–o7*
Store, then Shift
H
o0–o*
H = High voltage level
L
X
Z
=
=
=
Low voltage level
Don’t care
High impedance
dn (on)=Lower case letters indicate the state of the referenced input (or output) one setup time prior to the Low-to-High clock transition
↑
↑
=
=
Low-to-High clock transition
Not a Low-to-High clock transition
*
=
When clocking both SHCP and STCP simultaneously the Shift Register state will always be one clock pulse ahead of the Storage
Register
3
1990 Apr 18
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
LOGIC DIAGRAM
13
OE
12
STCP
11
SHCP
10
SHR
14
15
D
Q
Q
R
Q
Q
Q
Q
Q
Q
Q
Q
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Ds
CP
CP
CLR
S
1
S
R
Q
Q
R
CP
CP
CLR
S
2
S
R
Q
Q
R
CP
CP
CLR
S
3
S
R
Q
Q
R
CP
CP
CLR
S
4
S
R
Q
Q
R
CP
CP
CLR
S
5
S
R
Q
Q
R
CP
CP
CLR
S
6
S
R
Q
Q
R
CP
CP
CLR
S
7
9
S
R
Q7
Qs
Q
Q
R
CP
CP
CLR
S
V
= Pin 16
CC
SF01099
GND = Pin 8
4
1990 Apr 18
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
V
IN
V
OUT
Voltage applied to output in High output state
–0.5 to +V
CC
Qs
40
48
mA
mA
°C
°C
I
Current applied to output in Low output state
OUT
Q0–Q7
T
Operating free-air temperature range
Storage temperature range
0 to +70
amb
T
–65 to +150
stg
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
2.0
V
0.8
–18
–1
V
I
mA
mA
mA
mA
mA
°C
IK
Qs
I
High-level output current
Low-level output current
OH
OL
Q0–Q7
Qs
–3
20
I
Q0–Q7
24
T
amb
Operating free-air temperature range
0
70
5
1990 Apr 18
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
NO TAG
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MAX
TYP
MIN
NO TAG
±10%V
2.5
2.7
2.4
2.7
V
V
V
V
CC
Qs
I
=–1mA
=–3mA
= 20mA
= 24mA
OH
V
V
V
= MIN,
= MAX,
=MIN
CC
±5%V
3.4
CC
V
OH
High-level output voltage
IL
±10%V
CC
CC
IH
Q0–Q7
Qs
I
OH
±5%V
3.3
0.30
0.30
0.35
0.35
–0.73
±10%V
0.50
0.50
0.50
0.50
–1.2
100
20
V
V
CC
CC
I
OL
I
OL
V
CC
= MIN,
= MAX,
= MIN,
±5%V
V
V
V
V
Low-level output voltage
Input clamp voltage
IL
OL
±10%V
V
CC
CC
IH
Q0–Q7
±5%V
V
V
= MIN, I = I
IK
V
IK
CC
CC
CC
CC
I
I
I
I
Input current at maximum input voltage
High-level input current
V
V
V
= MAX, V = 7.0V
µA
µA
mA
I
I
= MAX, V = 2.7V
IH
IL
I
Low-level input current
= MAX, V = 0.5V
–20
I
Off-state output current,
High level of voltage applied
Q0–Q7
only
I
V
= MAX, V = 2.7V
50
µA
µA
OZH
CC
O
Off-state output current,
Low level of voltage applied
Q0–Q7
only
I
I
V
V
= MAX, V = 0.5V
–50
OZL
CC
O
NO TAG
Short-circuit output current
= MAX
–60
–150
80
mA
mA
mA
mA
OS
CC
I
55
70
65
CCH
I
100
95
I
Supply current (total)
V
CC
= MAX
CCL
CC
I
CCZ
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold
OS
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I tests should be performed last.
OS
6
1990 Apr 18
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
AC ELECTRICAL CHARACTERISTICS
LIMITS
V
amb
= +5V
= +25°C
V
amb
= +5V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
T
T
SYMBOL
PARAMETER
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
Waveform
NO TAG
f
Maximum clock frequency–SHCP to Qs
115
135
90
MHz
ns
MAX
t
t
Propagation delay
SHCP to Qs
Waveform
NO TAG
6.0
2.5
8.0
4.5
10.5
7.5
5.0
2.5
12.5
7.5
PLH
PHL
t
t
Propagation delay
STCP to Q0–Q7
Waveform
NO TAG
5.5
3.0
8.0
5.0
10.0
8.0
4.5
3.0
13.0
8.5
PLH
PHL
ns
ns
ns
ns
Propagation delay
SHR to Qs
Waveform
NO TAG
t
3.5
5.5
8.0
3.0
8.5
PHL
t
t
Output Enable time
OE to Q0–Q7
Waveform 5
Waveform 6
3.5
3.0
5.5
5.5
9.0
8.5
2.5
2.5
10.5
10.5
PZH
PZL
t
t
Output Disable time
OE to Q0–Q7
Waveform 5
Waveform 6
2.0
4.0
4.0
6.0
7.0
9.0
1.5
3.0
8.5
10.5
PHZ
PLZ
AC SETUP REQUIREMENTS
LIMITS
V
amb
= +5V
= +25°C
V
amb
= +5V ± 10%
= 0°C to +70°C
CC
CC
TEST
CONDITION
T
T
SYMBOL
PARAMETER
UNIT
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
t (H)
t (L)
s
Setup time, High or Low
Ds to SHCP
2.0
2.0
2.5
2.5
s
Waveform 3
Waveform 3
Waveform 3
Waveform 4
ns
ns
ns
ns
ns
ns
ns
ns
t (H)
Hold time, High or Low
Ds to SHCP
0
0
0
0
h
t (L)
h
Setup time, Low
SHR to STCP
t (L)
s
4.5
4.5
5.0
5.0
Setup time, High
SHCP to STCP
t (H)
s
t (H)
SHCP Pulse width,
High or Low
Waveform
NO TAG
3.5
4.0
4.0
4.0
W
t (L)
W
t (H)
STCP Pulse width,
High or Low
Waveform
NO TAG
4.0
3.0
4.0
3.5
W
t (L)
W
Waveform
NO TAG
t (L)
W
SHR Pulse width, Low
3.0
3.0
3.0
3.0
Recovery time,
SHR to SHCP
Waveform
NO TAG
t
REC
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
7
1990 Apr 18
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
1/f
MAX
SHR
V
V
M
M
SHCP,
STCP
V
t
V
t
M
M
t
(L)
t
REC
w
t
(H)
t (L)
w
w
V
SHCP
Qs
M
PHL
PLH
t
PHL
V
V
V
M
M
M
QS, Q0–Q7
SF01100
SF01101
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Widths, and Maximum Clock Frequency
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay, and Master Reset to Clock Recovery Time
Ds
V
V
V
V
SHR
SHCP
V
V
M
M
M
M
M
M
t (H) t (H)=0
t (L) t (L)=0
t (H)
s
t (L)
s
s
h
s
h
SHCP
V
V
STCP
V
V
M
M
M
M
SF01103
SF01102
Waveform 3. Data Setup and Hold Times
Waveform 4. Setup and Hold Times
8
1990 Apr 18
Philips Semiconductors
Product specification
8-bit shift register with output latches (3-State)
74F595
AC WAVEFORMS (Continued)
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
V
V
M
M
OE
V
V
M
M
OE
t
t
PLZ
V
-0.3V
0V
PZL
OH
t
t
PHZ
PZH
V
Q0–Q7
M
Q0–Q7
V
M
V
+0.3V
OL
SF01105
SF01104
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORMS
V
CC
t
w
AMP (V)
0V
7.0V
90%
90%
NEGATIVE
PULSE
V
V
M
R
L
M
V
V
OUT
IN
10%
10%
PULSE
GENERATOR
D.U.T.
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
T
L
t
t )
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
Test Circuit for 3-State Outputs
10%
10%
t
w
SWITCH POSITION
TEST
SWITCH
closed
closed
open
Input Pulse Definition
t
t
PLZ
PZL
All other
DEFINITIONS:
R
L
C
L
R
T
=
=
=
Load resistor;
INPUT PULSE REQUIREMENTS
see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
Termination resistance should be equal to Z
pulse generators.
family
V
M
rep. rate
t
w
t
t
THL
amplitude
TLH
of
OUT
2.5ns
2.5ns
74F
3.0V
1.5V
1MHz
500ns
SF00777
9
1990 Apr 18
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
10
1990 Apr 18
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
11
1990 Apr 18
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
NOTES
12
1990 Apr 18
Philips Semiconductors
Product specification
74F595
8-bit shift register with output latches (3-State)
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 10-98
9397-750-05143
Document order number:
Philips
Semiconductors
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