74HC1G125GW [NXP]
Bus buffer/line driver; 3-state; 总线缓冲器/线路驱动器;三态
| 型号： | 74HC1G125GW |
| 厂家： | 
NXP |
| 描述： | Bus buffer/line driver; 3-state |
| 文件： | 总13页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74HC1G125; 74HCT1G125
Bus buffer/line drivers; 3-state
Product specification
2004 Jul 27
Supersedes data of 2002 May 17
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
FEATURES
DESCRIPTION
• Wide supply voltage range from 2.0 to 6.0 V
• Symmetrical output impedance
• High noise immunity
The 74HC1G/HCT1G125 is a high-speed Si-gate CMOS
device.
The 74HC1G/HCT1G125 provides one non-inverting
buffer/line driver with 3-state output. The 3-state output is
controlled by the output enable input pin (OE). A HIGH at
pin OE causes the output as assume a high-impedance
OFF-state.
• Low power dissipation
• Balanced propagation delays
• Very small 5 pins package
• Output capability: bus driver.
The bus driver output currents are equal compared to the
74HC/HCT125.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns.
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
ns
HC1G
HCT1G
10
tPHL/tPLH propagation delay A to Y
CL = 15 pF; VCC = 5 V
9
CI
input capacitance
1.5
30
1.5
27
pF
pF
CPD
power dissipation capacitance
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
∑ (CL × VCC2 × fo) = sum of outputs.
2. For HC1G the condition is VI = GND to VCC
.
For HCT1G the condition is VI = GND to VCC − 1.5 V.
FUNCTION TABLE
See note 1.
INPUTS
OUTPUT
Y
OE
A
L
L
L
H
X
L
H
Z
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
2004 Jul 27
2
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
ORDERING INFORMATION
PACKAGE
PACKAGE MATERIAL
TYPE NUMBER
TEMPERATURE
PINS
CODE
MARKING
RANGE
74HC1G125GW
74HCT1G125GW
74HC1G125GV
74HCT1G125GV
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
5
5
5
5
SC-88A
SC-88A
SC-74A
SC-74A
plastic
plastic
plastic
plastic
SOT353
SOT353
SOT753
SOT753
HM
TM
H25
T25
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
3
4
5
OE
A
output enable input
data input A
GND
Y
ground (0 V)
data output Y
supply voltage
VCC
handbook, halfpage
handbook, halfpage
OE
1
2
3
5
4
V
Y
A
2
Y
4
CC
A
125
1
OE
GND
MNA118
MNA117
Fig.1 Pin configuration.
Fig.2 Logic symbol.
handbook, halfpage
Y
A
2
handbook, halfpage
4
1
OE
OE
MNA119
MNA120
Fig.3 IEC logic symbol.
Fig.4 Logic diagram.
2004 Jul 27
3
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
RECOMMENDED OPERATING CONDITIONS
74HC1G125
MIN. TYP. MAX. MIN.
2.0
74HCT1G125
SYMBOL
PARAMETER
supply voltage
CONDITIONS
UNIT
TYP. MAX.
VCC
VI
5.0
−
6.0
4.5
0
5.0
−
5.5
V
input voltage
0
VCC
VCC
VCC
VCC
V
V
VO
output voltage
0
−
0
−
Tamb
operating ambient
temperature
see DC and AC
characteristics per
device
−40
+25
+125 −40
+25
+125 °C
tr, tf
input rise and fall times
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
−
−
−
−
−
−
1000
500
−
−
−
−
−
−
−
ns
ns
ns
500
−
400
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
VCC
IIK
PARAMETER
supply voltage
CONDITIONS
MIN. MAX. UNIT
−0.5
−
+7.0
±20
±20
V
input diode current
VI < −0.5 V or VI > VCC + 0.5 V; note 1
VO < −0.5 V or VO > VCC + 0.5 V; note 1
−0.5 V < VO < VCC + 0.5 V; note 1
note 1
mA
mA
IOK
output diode current
−
IO
output source or sink current
VCC or GND current
−
±12.5 mA
±25 mA
+150 °C
200 mW
ICC
−
Tstg
PD
storage temperature
−65
−
power dissipation per package
for temperature range from −40 to +125 °C;
note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
2004 Jul 27
4
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
DC CHARACTERISTICS
Family 74HC1G
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS Tamb (°C)
SYMBOL
PARAMETER
−40 to +85
−40 to +125
MIN. MAX.
1.5
UNIT
OTHER
VCC (V)
MIN. TYP.(1) MAX.
VIH
HIGH-level input voltage
2.0
4.5
6.0
2.0
4.5
6.0
2.0
1.5
3.15
4.2
−
1.2
2.4
3.2
0.8
2.1
2.8
2.0
−
−
V
V
V
V
V
V
V
−
3.15
4.2
−
−
−
−
VIL
LOW-level input voltage
0.5
1.35
1.8
−
0.5
1.35
1.8
−
−
−
−
−
VOH
HIGH-level output
voltage
VI = VIH or VIL;
IO = −20 µA
1.9
1.9
VI = VIH or VIL;
IO = −20 µA
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
4.4
5.9
4.13
5.63
−
4.5
6.0
4.32
5.81
0
−
4.4
5.9
3.7
5.2
−
−
V
V
V
V
V
V
V
V
V
VI = VIH or VIL;
IO = −20 µA
−
−
VI = VIH or VIL;
IO = −2.0 mA
−
−
VI = VIH or VIL;
IO = −2.6 mA
−
−
VOL
LOW-level output
voltage
VI = VIH or VIL;
IO = 20 µA
0.1
0.1
0.1
0.33
0.33
0.1
0.1
0.1
0.4
0.4
VI = VIH or VIL;
IO = 20 µA
−
0
−
VI = VIH or VIL;
IO = 20 µA
−
0
−
VI = VIH or VIL;
IO = 2.0 mA
−
0.15
0.16
−
VI = VIH or VIL;
IO = 2.6 mA
−
−
ILI
input leakage current
VI = VCC or GND 6.0
−
−
−
−
1.0
5
−
−
1.0
10
µA
µA
IOZ
3-state output current
OFF-state
VI = VIH or VIL;
6.0
VO = VCC or GND
ICC
quiescent supply
current
VI = VCC or GND; 6.0
IO = 0
−
−
10
−
20
µA
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Jul 27
5
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
Family 74HCT1G
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS Tamb (°C)
SYMBOL
PARAMETER
−40 to +85
−40 to +125
MIN. MAX.
2.0
UNIT
OTHER
VCC (V)
MIN. TYP.(1) MAX.
VIH
VIL
HIGH-level input
voltage
4.5 to 5.5 2.0
1.6
1.2
4.5
4.32
0
−
−
V
V
V
V
V
V
LOW-level input
voltage
4.5 to 5.5
4.5
−
0.8
−
−
0.8
−
VOH
HIGH-level output
voltage
VI = VIH or VIL;
IO = −20 µA
4.4
4.13
−
4.4
3.7
−
VI = VIH or VIL;
IO = −2.0 mA
4.5
−
−
VOL
LOW-level output
voltage
VI = VIH or VIL;
IO = 20 µA
4.5
0.1
0.33
0.1
0.4
VI = VIH or VIL;
IO = 2.0 mA
4.5
−
0.15
−
ILI
input leakage current VI = VCC or GND 5.5
−
−
−
−
1.0
5
−
−
1.0
10
µA
µA
IOZ
3-state output
VI = VIH or VIL;
5.5
current OFF-state
VO = VCC or GND
ICC
quiescent supply
current
VI = VCC or GND; 5.5
IO = 0
−
−
−
−
10
−
−
20
µA
µA
∆ICC
additional supply
current per input
VI = VCC − 2.1 V; 4.5 to 5.5
IO = 0
500
850
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Jul 27
6
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
AC CHARACTERISTICS
Type 74HC1G125
GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF.
TEST CONDITIONS
WAVEFORMS VCC (V)
Tamb (°C)
SYMBOL
PARAMETER
−40 to +85
−40 to +125
UNIT
MIN. TYP.(1) MAX.
MIN.
MAX.
150
30
t
PHL/tPLH
propagation delay see Figs 5 and 7
A to Y
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
−
−
−
−
−
−
−
−
−
24
10
8
125
25
−
ns
−
−
−
−
−
−
−
−
ns
ns
ns
ns
ns
ns
ns
ns
21
26
tPZH/tPZL
3-state output
enable time
OE to Y
see Figs 6 and 7
see Figs 6 and 7
19
9
155
31
190
38
7
26
32
tPHZ/tPLZ
3-state output
disable time
OE to Y
18
12
11
155
31
190
38
26
32
Note
1. All typical values are measured at Tamb = 25 °C.
Type 74HCT1G125
GND = 0 V; tr = tf ≤ 6.0 ns; CL = 50 pF.
TEST CONDITIONS
WAVEFORMS VCC (V)
Tamb (°C)
SYMBOL
PARAMETER
−40 to +85
MIN. TYP.(1) MAX.
−40 to +125
UNIT
MIN.
MAX.
36
tPHL/tPLH
tPZH/tPZL
propagation delay see Figs 5 and 7
A to Y
4.5
4.5
−
11
30
−
ns
ns
3-state output
enable time
OE to Y
see Figs 6 and 7
−
10
35
−
42
38
tPHZ/tPLZ
3-state output
disable time
OE to Y
see Figs 6 and 7
4.5
−
11
31
−
ns
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Jul 27
7
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
AC WAVEFORMS
V
handbook, halfpage
A input
I
V
M
GND
t
t
PHL
PLH
V
Y output
M
MNA121
For HC1G: VM = 50%; VI = GND to VCC
.
For HCT1G: VM = 1.3 V; VI = GND to 3.0 V.
Fig.5 The input (A) to output (Y) propagation delays.
V
I
V
OE input
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
+0.3 V
OL
V
t
t
PHZ
PZH
−0.3 V
OH
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
output
enabled
output
enabled
output
disabled
MNA122
For HC1G: VM = 50%; VI = GND to VCC
.
For HCT1G: VM = 1.3 V; VI = GND to 3.0 V.
Fig.6 The 3-state enable and disable times.
8
2004 Jul 27
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
V
handbook, halfpage
CC
S
V
V
O
1
V
R
= 1 kΩ
I
CC
open
L
PULSE
GENERATOR
D.U.T.
C
L
R
T
50 pF
MNA123
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
open
VCC
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance (see “AC characteristics”).
GND
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.7 Load circuitry for switching times.
2004 Jul 27
9
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
PACKAGE OUTLINES
Plastic surface mounted package; 5 leads
SOT353
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
1
2
3
c
e
1
b
p
L
p
w
M B
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
(2)
UNIT
A
b
c
D
E
e
e
H
L
Q
v
w
y
p
p
1
E
max
0.30
0.20
1.1
0.8
0.25
0.10
2.2
1.8
1.35
1.15
2.2
2.0
0.45
0.15
0.25
0.15
mm
0.1
1.3
0.65
0.2
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
SC-88A
97-02-28
SOT353
2004 Jul 27
10
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
Plastic surface mounted package; 5 leads
SOT753
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
p
1
2
3
detail X
e
b
p
w
M B
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A
1
b
c
D
E
e
H
L
Q
v
w
y
p
p
E
0.100
0.013
0.40
0.25
1.1
0.9
0.26
0.10
3.1
2.7
1.7
1.3
3.0
2.5
0.6
0.2
0.33
0.23
mm
0.95
0.2
0.2
0.1
REFERENCES
JEDEC JEITA
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
SOT753
SC-74A
02-04-16
2004 Jul 27
11
Philips Semiconductors
Product specification
Bus buffer/line drivers; 3-state
74HC1G125; 74HCT1G125
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Jul 27
12
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R44/04/pp13
Date of release: 2004 Jul 27
Document order number: 9397 750 13725
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