74HC221DB [NXP]

IC HC/UH SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16, SOT-338-1, SSOP-16, Prescaler/Multivibrator;
74HC221DB
型号: 74HC221DB
厂家: NXP    NXP
描述:

IC HC/UH SERIES, DUAL MONOSTABLE MULTIVIBRATOR, PDSO16, SOT-338-1, SSOP-16, Prescaler/Multivibrator

时钟 输入元件 光电二极管 逻辑集成电路
文件: 总19页 (文件大小:332K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
DATA SHEET  
For a complete data sheet, please also download:  
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications  
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information  
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines  
74HC/HCT221  
Dual non-retriggerable monostable  
multivibrator with reset  
December 1990  
Product specification  
Supersedes data of April 1988  
File under Integrated Circuits, IC06  
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
jitter-free triggering from inputs with slow transition rates,  
providing the circuit with excellent noise immunity.  
FEATURES  
Pulse width variance is typically less than ± 5%  
Pin-out identical to “123”  
Once triggered, the outputs (nQ, nQ) are independent of  
further transitions of nA and nB inputs and are a function  
of the timing components. The output pulses can be  
terminated by the overriding active LOW reset inputs  
(nRD). Input pulses may be of any duration relative to the  
output pulse.  
Overriding reset terminates output pulse  
nB inputs have hysteresis for improved noise immunity  
Output capability: standard (except for nREXT/CEXT  
ICC category: MSI  
)
Pulse width stability is achieved through internal  
compensation and is virtually independent of VCC and  
temperature. In most applications pulse stability will only  
be limited by the accuracy of the external timing  
components.  
GENERAL DESCRIPTION  
The 74HC/HCT221 are high-speed Si-gate CMOS devices  
and are pin compatible with low power Schottky TTL  
(LSTTL). They are specified in compliance with JEDEC  
standard no. 7A.  
The output pulse width is defined by the following  
relationship:  
The 74HC/HCT221 are dual non-retriggerable monostable  
multivibrators. Each multivibrator features an active  
LOW-going edge input (nA) and an active HIGH-going  
edge input (nB), either of which can be used as an enable  
input.  
tW = CEXTREXTIn2  
tW = 0.7CEXTREXT  
Pin assignments for the “221” are identical to those of the  
“123” so that the “221” can be substituted for those  
products in systems not using the retrigger by merely  
Pulse triggering occurs at a particular voltage level and is  
not directly related to the transition time of the input pulse.  
Schmitt-trigger input circuitry for the nB inputs allow  
changing the value of REXT and/or CEXT  
.
QUICK REFERENCE DATA  
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns  
TYPICAL  
HC HCT  
SYMBOL PARAMETER  
CONDITIONS  
UNIT  
propagation delay  
CL = 15 pF; VCC = 5 V;  
REXT = 5 k; CEXT = 0 pF  
tPHL  
tPLH  
CI  
nA, nB, nRD to nQ, nQ  
nA, nB, nRD to nQ, nQ  
input capacitance  
29  
35  
3.5  
90  
32  
36  
3.5  
96  
ns  
ns  
pF  
pF  
CPD  
power dissipation capacitance per package notes 1 and 2  
Notes  
1. CPD is used to determine the dynamic power dissipation (PD in µW):  
2
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) + 0.33 × CEXT × VCC × fo + D × 28 × VCC where:  
fi = input frequency in MHz; fo = output frequency in MHz  
(CL × VCC2 × fo) = sum of outputs  
CEXT = timing capacitance in pF; CL = output load capacitance in pF  
VCC = supply voltage in V; D = duty factor in %  
2. For HC the condition is VI = GND to VCC  
For HCT the condition is VI = GND to VCC 1.5 V  
December 1990  
2
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
ORDERING INFORMATION  
See “74HC/HCT/HCU/HCMOS Logic Package Information”.  
PIN DESCRIPTION  
PIN NO.  
SYMBOL  
NAME AND FUNCTION  
1, 9  
2, 10  
3, 11  
4, 12  
7
1A, 2A  
trigger inputs (negative-edge triggered)  
trigger inputs (positive-edge triggered)  
direct reset inputs (active LOW)  
outputs (active LOW)  
1B, 2B  
1RD, 2RD  
1Q, 2Q  
2REXT/CEXT  
GND  
external resistor/capacitor connection  
ground (0 V)  
8
13, 5  
14, 6  
15  
1Q, 2Q  
outputs (active HIGH)  
1CEXT, 2CEXT  
1REXT/CEXT  
VCC  
external capacitor connection  
external resistor/capacitor connection  
positive supply voltage  
16  
Fig.1 Pin configuration.  
Fig.2 Logic symbol.  
Fig.3 IEC logic symbol.  
December 1990  
3
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
nRD  
nA  
nB  
nQ  
nQ  
L
X
X
H
H
X
H
X
L
X
X
L
L
H
L (2)  
L (2)  
H (2)  
H (2)  
H
H
(3)  
(3)  
L
Notes  
1. H = HIGH voltage level  
L = LOW voltage level  
X = don’t care  
= LOW-to-HIGH level  
= HIGH-to-LOW level  
= one HIGH-level output pulse  
= one LOW-level output pulse  
2. If the monostable was triggered before this condition  
was established the pulse will continue as  
programmed.  
3. For this combination the reset input must be LOW and  
the following sequence must be used:  
pin 1 (or 9) must be set HIGH or pin 2 (or 10) set LOW;  
then pin 1 (or 9) must be LOW and pin 2 (or 10) set  
HIGH. Now the reset input goes from LOW-to-HIGH  
and the device will be triggered.  
Fig.4 Functional diagram.  
December 1990  
4
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Fig.5 Logic diagram.  
Note  
It is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND).  
Fig.6 Timing component connections.  
December 1990  
5
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
DC CHARACTERISTICS FOR 74HC  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: standard (except for nREXT/CEXT  
ICC category: MSI  
)
AC CHARACTERISTICS FOR 74HC  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
Tamb (°C)  
TEST CONDITIONS  
74HC  
SYMBOL PARAMETER  
UNIT  
WAVEFORMS  
VCC  
(V)  
+25  
40 to +85 40 to +125  
min typ max. min max. min. max.  
tPLH  
tPLH  
tPHL  
tPHL  
tPLH  
tPLH  
propagation delay (trigger)  
nA, nB to nQ  
72 220  
26 44  
21 37  
275  
55  
47  
330  
66  
56  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
µs  
2.0  
CEXT = 0 pF;  
4.5 REXT = 5 k;  
6.0 Fig.10  
propagation delay (trigger)  
nRD to nQ  
80 245  
29 49  
23 42  
305  
61  
52  
370  
74  
63  
2.0  
CEXT = 0 pF;  
4.5 REXT = 5 k;  
6.0 Fig.10  
propagation delay (trigger)  
nA, nB to nQ  
58 180  
21 36  
17 31  
225  
45  
38  
270  
54  
46  
2.0  
CEXT = 0 pF;  
4.5 REXT = 5 k;  
6.0 Fig.10  
propagation delay (trigger)  
nRD to nQ  
63 195  
23 39  
18 33  
245  
49  
42  
295  
59  
50  
2.0  
4.5  
6,0 Fig.10  
C
R
EXT = 0 pF;  
EXT = 5 k;  
propagation delay (reset)  
nRD to nQ  
66 200  
24 40  
19 34  
250  
50  
43  
300  
60  
51  
2.0 EXT = 0 pF;  
4.5 REXT = 5 k;  
6.0 Fig.11  
C
propagation delay (reset)  
nRD to nQ  
58 180  
21 36  
17 31  
225  
45  
38  
270  
54  
46  
2.0  
CEXT = 0 pF;  
4.5 REXT = 5 k;  
6.0 Fig.11  
tTHL  
/
output transition time  
19 75  
95  
19  
16  
110  
22  
19  
2.0 Fig.10  
4.5  
6.0  
tTLH  
7
6
15  
13  
tW  
tW  
tW  
tW  
trigger pulse width  
nA = LOW  
75  
15  
13  
25  
9
7
95  
19  
16  
110  
22  
19  
2.0 Fig.7  
4.5  
6.0  
trigger pulse width  
nB = HIGH  
90  
18  
15  
30  
11  
9
115  
23  
20  
135  
27  
23  
2.0 Fig.7  
4.5  
6.0  
trigger pulse width  
nRD = LOW  
75  
15  
13  
25  
9
7
95  
19  
16  
110  
22  
19  
2.0 Fig.8  
4.5  
6.0  
output pulse width  
nQ = LOW  
630 700 770  
602 798 595 805  
5.0 CEXT = 100 nF;  
REXT = 10 k;  
Fig.10  
nQ = HIGH  
December 1990  
6
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Tamb (°C)  
TEST CONDITIONS  
74HC  
SYMBOL PARAMETER  
UNIT  
WAVEFORMS  
VCC  
(V)  
+25  
40 to +85 40 to +125  
min typ max. min max. min. max.  
tW  
output pulse width  
nQ or nQ  
140  
1.5  
7
ns  
µs  
µs  
%
2.0 CEXT = 28 nF;  
4.5  
REXT = 2 k;  
6.0 Fig.10  
tW  
output pulse width  
nQ or nQ  
2.0 CEXT = 1 nF;  
4.5 REXT = 2 k;  
6.0 Fig.10  
tW  
output pulse width  
nQ or nQ  
2.0 CEXT = 1 nF;  
4.5  
REXT = 10 k;  
6.0 Fig.10  
tW  
pulse width match  
between circuits  
in the package  
± 2  
4.5  
to  
C
EXT = 1000 pF;  
REXT = 10 kΩ  
5.5  
trem  
removal time  
nRD to nA  
or nB  
100 30  
20 11  
17  
10  
125  
25  
21  
150  
30  
26  
ns  
2.0 Fig.9  
4.5  
6.0  
9
REXT  
CEXT  
external timing resistor  
1000  
1000  
kΩ  
2.0 Fig.12  
5.0 Fig.13  
2
external timing capacitor  
no limits  
pF  
2.0 Fig.12  
5.0 Fig.13  
December 1990  
7
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
DC CHARACTERISTICS FOR 74HCT  
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.  
Output capability: standard (except for nREXT/CEXT  
ICC category: MSI  
)
Note to HCT types  
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications.  
To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.  
INPUT  
UNIT LOAD COEFFICIENT  
nB  
0.30  
0.50  
0.50  
nA  
nRD  
December 1990  
8
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
AC CHARACTERISTICS FOR 74HCT  
GND = 0 V; tr = tf = 6 ns; CL = 50 pF  
Tamb (°C)  
TEST CONDITIONS  
74HCT  
SYMBOL PARAMETER  
UNIT  
WAVEFORMS  
VCC  
(V)  
+25  
40 to +85 40 to +125  
min typ max min max. min. max.  
tPLH  
tPLH  
tPHL  
tPHL  
tPHL  
tPHL  
tPLH  
propagation delay (trigger)  
nA, nRD to nQ  
30 50  
24 42  
26 44  
21 35  
26 43  
26 43  
31 51  
63  
53  
55  
44  
54  
54  
64  
19  
75  
63  
66  
53  
65  
65  
77  
22  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
4.5  
4.5  
4.5  
4.5  
4.5  
4.5  
4.5  
CEXT = 0 pF;  
REXT = 5 k;  
Fig.10  
propagation delay (trigger)  
nB to nQ  
CEXT = 0 pF;  
REXT = 5 k;  
Fig.10  
propagation delay (trigger)  
nA to nQ  
CEXT = 0 pF;  
REXT = 5 k;  
Fig.10  
propagation delay (trigger)  
nB to nQ  
CEXT = 0 pF;  
REXT = 5 k;  
Fig.10  
propagation delay (trigger)  
nRD to nQ  
CEXT = 0 pF;  
R
EXT = 5 k;  
Fig.10  
propagation delay (reset)  
nRD to nQ  
CEXT = 0 pF;  
REXT = 5 k;  
Fig.11  
propagation delay (reset)  
nRD to nQ  
CEXT = 0 pF;  
REXT = 5 k;  
Fig.11  
tTHL/ tTLH output transition time  
7
15  
ns  
ns  
ns  
ns  
µs  
4.5  
4.5  
4.5  
4.5  
5.0  
Fig.10  
Fig.10  
Fig.10  
Fig.8  
tW  
tW  
tW  
tW  
trigger pulse width  
nA = LOW  
20  
20  
22  
13  
13  
13  
25  
25  
28  
30  
30  
33  
trigger pulse width  
nB = HIGH  
pulse width  
nRD = LOW  
output pulse width  
nQ = LOW  
nQ = HIGH  
630 700 770 602 798 595  
805  
CEXT = 100 nF;  
REXT = 10 k;  
Fig.10  
tW  
trigger pulse width  
nQ or nQ  
140  
1.5  
ns  
4.5  
4.5  
CEXT = 28 pF;  
REXT = 2 k;  
Fig.10  
tW  
trigger pulse width  
nQ or nQ  
µs  
CEXT = 1 nF;  
REXT = 2 k;  
Fig.10  
December 1990  
9
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Tamb (°C)  
TEST CONDITIONS  
74HCT  
SYMBOL PARAMETER  
UNIT  
WAVEFORMS  
VCC  
(V)  
+25  
40 to +85 40 to +125  
min typ max min max. min. max.  
tW  
trigger pulse width  
nQ or nQ  
7
µs  
4.5  
CEXT = 1 nF;  
EXT = 10 k;  
R
Fig.10  
trem  
removal time  
nRD to nA or nB  
20  
2
12  
25  
30  
ns  
4.5  
5.0  
5.0  
Fig.9  
REXT  
CEXT  
external timing resistor  
1000  
kΩ  
pF  
Fig.13  
Fig.13  
external timing capacitor  
no limits  
December 1990  
10  
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
AC WAVEFORMS  
Fig.7 Output pulse control; nRD = HIGH.  
(1) HC : VM = VM = 50%; VI = GND to VCC  
.
HCT : VM = VM = 1.3 V; VI = GND to 3 V.  
Fig.10 Waveforms showing the triggering of One  
Shot by input nA or input nB for one period  
(tW) and minimum pulse widths of the trigger  
inputs nA and nB.  
Fig.8 Output pulse control using reset input nRD;  
nA = LOW.  
(1) HC : VM = VM = 50%; VI = GND to VCC  
.
(1) HC : VM = VM = 50%; VI = GND to VCC  
.
HCT : VM = VM = 1.3 V; VI = GND to 3 V.  
HCT : VM = VM = 1.3 V; VI = GND to 3 V.  
Fig.11 Waveforms showing the reset to nQ and nQ  
output propagation delays.  
Fig.9 Waveforms showing the removal times;  
nRD to nA or nB.  
December 1990  
11  
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Fig.12 HC typical output pulse width as a function of timing capacitance (VCC = 2 V).  
December 1990  
12  
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Fig.13 HC/HCT typical output pulse width as a function of timing capacitance (VCC = 4.5 V).  
December 1990  
13  
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Fig.14 HC typical output pulse width as a function of timing capacitance (VCC = 6 V).  
December 1990  
14  
Philips Semiconductors  
Product specification  
Dual non-retriggerable monostable  
multivibrator with reset  
74HC/HCT221  
Fig.15 Typical output pulse width as a function of  
temperature; CX = 0.1 µF; RX = 10 K;  
VCC = 5 V.  
Fig.16 k factor as a function of supply voltage;  
RX = 10 K; Tamb = 25 °C.  
Power-down consideration  
PACKAGE OUTLINES  
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.  
A large capacitor (CX) may cause problems when  
powering-down the monostable due to the energy stored  
in this capacitor. When a system containing this device is  
powered-down or a rapid decrease of VCC to zero occurs,  
the monostable may substain damage, due to the  
capacitor discharging through the input protection diodes.  
To avoid this possibility, use a damping diode (DX)  
preferably a germanium or Schottky type diode able to  
withstand large current surges and connect as shown in  
Fig.17.  
Fig.17 Power-down protection circuit.  
December 1990  
15  
it Q  
Philips Semiconductors Home  
ProducBuy  
MySemContac  
Product Information  
catalogonline  
Information as of 2003-04-22  
My.Semiconductors.COM.  
Your personal service from Use right mouse button to  
Philips Semiconductors.  
Please register now !  
Stay informed  
74HC/HCT221; Dual  
non-retriggerable  
monostable  
download datasheet  
Download datasheet  
Products  
multivibrator with  
reset  
MultiMarket  
Semiconductors  
Product Selector  
Catalog by  
Function  
General description  
Features  
Applications  
Datasheet  
Buy online  
Parametrics  
Support & tools  
Similar products  
Email/translate  
Block diagram  
Products & packages  
Catalog by  
System  
to
General description  
Cross-reference  
Packages  
The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL  
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.  
End of Life  
information  
Distributors Go  
Here!  
The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active  
LOW-going edge input (nA) and an active HIGH-going edge input (nB), either of which can be used as an enable  
input.  
Models  
SoC solutions  
Pulse triggering occurs at a particular Voltage level and is not directly related to the transition time of the input  
pulse. Schmitt-trigger input circuitry for the nB inputs allow jitter-free triggering from inputs with slow transition  
rates, providing the circuit with excellent noise immunity.  
Once triggered, the outputs (nQ, nQ) are independent of further transitions of nA and nB inputs and are a function  
of the timing components. The output pulses can be terminated by the overriding active LOW reset inputs (nRD ).  
Input pulses may be of any duration relative to the output pulse.  
Pulse width stability is achieved through internal compensation and is virtually independent of Vcc and  
temperature. In most applications pulse stability will only be limited by the accuracy of the external timing  
components.  
The output pulse width is defined by the following relationship:  
t
W =CEXT REXT In2  
tW = 0.7CEXT REXT  
Pin assignments for the '221'are identical to those of the '123' so that the '221' can be substituted for those products  
in systems not using the retrigger by merely changing the value of REXT and/or CEXT  
.
 
to
Features  
Pulse width variance is typically less than ± 5%  
Pin-out identical to '123'  
Overriding reset terminates output pulse  
nB inputs have hysteresis for improved noise immunity  
Output capability: standard (except for nREXT /CEXT  
)
ICC category: MSI  
to
Applications  
AN00070_1: TDA8752B Triple 8-bit A/D converter dual chip solution for high resolution digital displays  
Down  
(date 16-Dec-02)  
AN97022_1: TDA8752 Demonstration board documentation (date 16-Dec-02)  
Down  
to
Datasheet  
Type number Title  
Publication  
release date  
Datasheet status  
Page  
count  
File  
size  
(kB)  
Datasheet  
74HC/HCT221 Dual non-  
retriggerable  
12/1/1990  
Product  
specification  
15  
244  
Download  
Down  
monostable  
multivibrator with  
reset  
Additional datasheet info  
To complete the device datasheet with package and family information, also download the following PDF files.  
The "Logic Package Information" document is required to determine in which package(s) this device is available.  
Document  
Description  
1
2
3
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic  
Down  
Family Specifications  
HCT_PACKAGE_INFO  
Down  
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package  
Information  
HCT_PACKAGE_OUTLINES  
Down  
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic  
Package Outlines  
to
Parametrics  
Type number Package Description Propagation Voltage No. Power  
Logic  
Output  
Delay(ns)  
of Dissipation  
Pins Considerations Levels  
Switching Drive  
Capability  
Dual Non-  
Retriggerable  
Low Power or  
16 Battery  
SOT109  
(SO16)  
5 Volts  
+
74HC221D  
74HC221DB  
74HC221N  
Monostable 15  
Multivibrator  
with Reset  
CMOS  
CMOS  
CMOS  
Low  
Applications  
Dual Non-  
Retriggerable  
Monostable 15  
Multivibrator  
with Reset  
Low Power or  
16 Battery  
SOT338-1  
(SSOP16)  
5 Volts  
+
Low  
Low  
Applications  
Dual Non-  
Retriggerable  
Monostable 15  
Multivibrator  
with Reset  
Low Power or  
16 Battery  
SOT38-1  
(DIP16)  
5 Volts  
+
Applications  
Dual Non-  
Retriggerable  
Monostable  
Multivibrator  
with Reset;  
Low Power or  
16 Battery  
SOT109  
(SO16)  
5 Volts  
+
74HCT221D  
74HCT221DB  
74HCT221N  
15  
TTL  
TTL  
TTL  
Low  
Low  
Low  
Applications  
TTL Enabled  
Dual Non-  
Retriggerable  
Monostable  
Multivibrator  
with Reset;  
TTL Enabled  
Low Power or  
16 Battery  
SOT338-1  
(SSOP16)  
5 Volts  
+
15  
Applications  
Dual Non-  
Retriggerable  
Monostable  
Multivibrator  
Low Power or  
16 Battery  
Applications  
SOT38-1  
(DIP16)  
5 Volts  
+
15  
with Reset;  
TTL Enabled  
to
Products, packages, availability and ordering  
Type number North  
American  
Ordering code Marking/Packing Package Device status Buy online  
Discretes  
(12NC)  
Down  
packing info  
type number  
Standard Marking  
9337 146 30652 * Bulk Pack,  
CECC  
SOT109  
(SO16)  
74HC221D  
74HC221D  
Full production  
Full production  
-
-
order this  
order this  
Standard Marking  
SOT109  
(SO16)  
74HC221D-T 9337 146 30653 * Reel Pack,  
SMD, 13", CECC  
SOT338-  
1
Standard Marking  
* Bulk Pack  
74HC221DB 74HC221DB 9351 898 10112  
74HC221DB-  
Full production  
Full production  
-
-
order this  
order this  
(SSOP16)  
SOT338-  
1
Standard Marking  
9351 898 10118 * Reel Pack,  
T
(SSOP16)  
SMD, 13"  
Standard Marking  
9336 695 10652 * Bulk Pack,  
SOT38-1  
(DIP16)  
74HC221N  
74HC221N  
Full production  
Full production  
Full production  
-
-
-
order this  
order this  
order this  
CECC  
SOT109  
(SO16)  
Standard Marking  
* Bulk Pack  
74HCT221D 74HCT221D 9337 151 10112  
74HCT221D-  
Standard Marking  
9337 151 10118 * Reel Pack,  
SOT109  
(SO16)  
T
SMD, 13"  
SOT338-  
1
Standard Marking  
* Bulk Pack  
74HCT221DB 74HCT221DB 9351 898 00112  
Full production  
-
order this  
(SSOP16)  
SOT338-  
1
Standard Marking  
SMD, 13"  
74HCT221DB-  
T
9351 898 00118 * Reel Pack,  
Full production  
Full production  
-
-
order this  
order this  
(SSOP16)  
SOT38-1  
(DIP16)  
Standard Marking  
* Bulk Pack  
74HCT221N 74HCT221N 9336 701 40112  
to
Similar products  
74HC/HCT221 links to the similar products page containing an overview of products that are similar in  
function or related to the type number(s) as listed on this page. The similar products page includes products from  
the same catalog tree(s), relevant selection guides and products from the same functional category.  
Produ  
to
Support & tools  
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-Mar-98)  
Down  
HC/T User Guide(date 01-Nov-97)  
Down  
to
Email/translate this product information  
Email this product information.  
Translate this product information page from English to:  
French  
Translate  
The English language is the official language used at the semiconductors.philips.com website and webpages. All  
translations on this website are created through the use of Google Language Tools and are provided for  
convenience purposes only. No rights can be derived from any translation on this website.  
About this Web Site  
| Copyright © 2003 Koninklijke Philips N.V. All rights reserved. | Privacy Policy |  
| Koninklijke Philips N.V. | Access to and use of this Web Site is subject to the following Terms of Use. |  

相关型号:

74HC221DB,112

74HC(T)221 - Dual non-retriggerable monostable multivibrator with reset SSOP1 16-Pin
NXP

74HC221DB,118

74HC(T)221 - Dual non-retriggerable monostable multivibrator with reset SSOP1 16-Pin
NXP

74HC221N

Dual non-retriggerable monostable multivibrator with reset
NXP

74HC237

3-to-8 line decoder/demultiplexer with address latches
NXP

74HC237-Q100

3-to-8 line decoder, demultiplexer with address latches
NEXPERIA

74HC237D

3-to-8 line decoder, demultiplexer with address latches
NXP

74HC237D

3-to-8 line decoder, demultiplexer with address latchesProduction
NEXPERIA

74HC237D-Q100

3-to-8 line decoder, demultiplexer with address latches
NEXPERIA

74HC237D-T

3-To-8-Line Demultiplexer
ETC

74HC237DB

3-to-8 line decoder, demultiplexer with address latches
NXP

74HC237DB,112

74HC237 - 3-to-8 line decoder, demultiplexer with address latches SSOP1 16-Pin
NXP

74HC237DB,118

74HC237 - 3-to-8 line decoder, demultiplexer with address latches SSOP1 16-Pin
NXP