74HC4066D,653 [NXP]
74HC(T)4066 - Quad single-pole single-throw analog switch SOIC 14-Pin;
| 型号： | 74HC4066D,653 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)4066 - Quad single-pole single-throw analog switch SOIC 14-Pin PC 光电二极管 |
| 文件： | 总27页 (文件大小：153K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74HC4066; 74HCT4066
Quad bilateral switches
Product specification
2004 Nov 11
Supersedes data of 2003 Jun 17
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
FEATURES
GENERAL DESCRIPTION
• Very low ON-resistance:
The 74HC4066 and 74HCT4066 are high-speed Si-gate
CMOS devices and are pin compatible with the
HEF4066B. They are specified in compliance with JEDEC
standard no. 7A.
– 50 Ω (typical) at VCC = 4.5 V
– 45 Ω (typical) at VCC = 6.0 V
– 35 Ω (typical) at VCC = 9.0 V.
The 74HC4066 and 74HCT4066 have four independent
analog switches. Each switch has two input/output pins
(pins nY or nZ) and an active HIGH enable input pin
(pin nE). When pin nE = LOW the belonging analog switch
is turned off.
• Complies with JEDEC standard no. 7A
• ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 °C to +85 °C and −40 °C to +125 °C.
The 74HC4066 and 74HCT4066 are pin compatible with
the 74HC4016 and 74HCT4016 but exhibit a much lower
on-resistance. In addition, the on-resistance is relatively
constant over the full input signal range.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
ns
74HC4066
74HCT4066
12
tPZH/tPZL
tPHZ/tPLZ
CI
turn-on time nE to Vos
turn-off time nE to Vos
input capacitance
CL = 15 pF; RL = 1 kΩ; VCC = 5 V 11
CL = 15 pF; RL = 1 kΩ; VCC = 5 V 13
16
3.5
12
ns
pF
pF
3.5
CPD
power dissipation
notes 1 and 2
11
capacitance per switch
CS
maximum switch
capacitance
8
8
pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL + CS) × VCC2 × fo] = sum of the outputs.
2. For 74HC4066 the condition is VI = GND to VCC
.
For 74HCT4066 the condition is VI = GND to VCC − 1.5 V.
2004 Nov 11
2
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
FUNCTION TABLE
See note 1.
INPUT nE
SWITCH
L
off
on
H
Note
1. H = HIGH voltage level.
L = LOW voltage level.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
PINS
TEMPERATURE RANGE
PACKAGE
DIP14
MATERIAL
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
CODE
74HC4066N
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
−40 °C to 125 °C
14
14
14
14
14
14
14
14
14
14
SOT27-1
SOT27-1
SOT108-1
SOT108-1
SOT337-1
SOT337-1
SOT402-1
SOT402-1
SOT762-1
SOT762-1
74HCT4066N
74HC4066D
DIP14
SO14
74HCT4066D
74HC4066DB
74HCT4066DB
74HC4066PW
74HCT4066PW
74HC4066BQ
74HCT4066BQ
SO14
SSOP14
SSOP14
TSSOP14
TSSOP14
DHVQFN14
DHVQFN14
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
1Y
1Z
independent input/output
independent input/output
independent input/output
independent input/output
enable input (active HIGH)
enable input (active HIGH)
ground (0 V)
handbook, halfpage
1Y
1Z
1
2
3
4
5
6
7
14
13
12
11
10
9
V
CC
3
2Z
1E
4E
4Y
4Z
3Z
3Y
4
2Y
2E
3E
GND
3Y
3Z
2Z
5
2Y
4066
6
2E
7
3E
8
independent input/output
independent input/output
independent input/output
independent input/output
enable input (active HIGH)
enable input (active HIGH)
supply voltage
8
9
GND
10
11
12
13
14
4Z
MGR253
4Y
4E
1E
VCC
Fig.1 Pin configuration DIP14, SO14 and
(T)SSOP14.
2004 Nov 11
3
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
terminal 1
index area
handbook, halfpage
1Y
1Z
1
2
2
3
4
5
6
13
12
11
10
9
1Z
2Z
2Y
2E
3E
1E
4E
4Y
4Z
3Z
13
5
1E
2E
3E
4E
2Y
2Z
4
3
4066
(1)
V
CC
3Y
3Z
8
9
6
4Y
4Z
11
10
001aac116
12
Transparent top view
MGR254
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
Fig.3 Logic symbol.
1
2
3
handbook, halfpage
1
1
1
1
1
2
3
handbook, halfpage
13 #
X1
13 #
4
4
1
5
#
#
5
#
X1
8
9
8
6
9
1
6
#
X1
11
10
11
10
12 #
1
1
12 #
X1
MGR255
MGR256
Fig.4 IEEEC logic symbol.
4
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
nY
handbook, halfpage
13
1
5
4
6
8
12 11
handbook, halfpage
1E 1Y 2E 2Y 3E 3Y 4E 4Y
nE
V
V
CC
1Z
2
2Z
3
3Z
9
4Z
10
CC
MGR257
nZ
GND
MGR258
Fig.5 Functional diagram.
Fig.6 Schematic diagram (one switch).
2004 Nov 11
5
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
RECOMMENDED OPERATING CONDITIONS
74HC4066
74HCT4066
UNIT
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
2.0
TYP. MAX. MIN.
TYP. MAX.
VCC
VI
5.0
−
10.0
4.5
5.0
5.5
V
input voltage
GND
GND
−40
VCC
VCC
+85
GND
GND
−40
−
VCC
VCC
+85
V
VS
switch voltage
−
−
V
Tamb
ambient temperature
see DC and AC
characteristics
per device
+25
−
+25
−
°C
−40
+125 −40
+125 °C
tr, tf
input rise and fall times
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 10.0 V
−
−
−
−
6.0
−
1000
500
400
250
−
−
−
−
6.0
−
500
−
ns
ns
ns
ns
−
−
−
−
−
−
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN. MAX. UNIT
VCC
IIK
−0.5
−
+11.0
±20
V
input diode current
switch diode current
switch current
VI < −0.5 V or VI > VCC + 0.5 V
VS < −0.5 V or VS > VCC + 0.5 V
−0.5 V < VO < VCC + 0.5 V; note 1
mA
mA
mA
mA
ISK
IS
−
±20
−
±25
ICC, IGND VCC or GND current
−
±50
Tstg
Ptot
PS
storage temperature
power dissipation
−65
−
+150 °C
Tamb = −40 °C to +125 °C; note 2
500
100
mW
mW
power dissipation per switch
−
Notes
1. To avoid drawing VCC current out of pin nZ, when switch current flows in pin nY, the voltage drop across the
bidirectional switch must not exceed 0.4 V. If the switch current flows into pin nZ, no VCC current will flow out of
pin nY. In this case there is no limit for the voltage drop across the switch, but the voltages at pins nY and nZ may
not exceed VCC or GND.
2. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP16 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
2004 Nov 11
6
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
DC CHARACTERISTICS
Family 74HC4066
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an
input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
VIH
VIL
ILI
HIGH-level input
voltage
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
6.0
10.0
10.0
1.5
1.2
−
V
V
V
V
V
V
V
V
3.15 2.4
−
4.2
6.3
−
3.2
4.7
0.8
2.1
2.8
4.3
−
−
−
LOW-level input voltage
input leakage current
0.50
1.35
1.80
2.70
−
−
−
VI = VCC or GND
−
±1.0 µA
±2.0 µA
±1.0 µA
−
−
IS(OFF)
IS(ON)
ICC
analog switch current
OFF-state
per channel; VI = VIH or VIL;
VS = VCC − GND; see Fig.7
−
−
analog switch current
ON-state
VI = VIH or VIL; VS = VCC − GND;
see Fig.8
10.0
−
−
±1.0 µA
quiescent supply
current
VI = VCC or GND; Vis = GND or VCC
Vos = VCC or GND
;
6.0
−
−
−
−
20.0 µA
40.0 µA
10.0
2004 Nov 11
7
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
TEST CONDITIONS
OTHER
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
V
CC (V)
Tamb = −40 °C to +125 °C
VIH
VIL
ILI
HIGH-level input
voltage
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
6.0
10.0
10.0
1.5
3.15
4.2
6.3
−
−
−
−
−
−
−
−
−
−
−
−
−
V
V
V
V
V
V
V
V
−
−
−
LOW-level input voltage
input leakage current
0.50
1.35
1.80
2.70
−
−
−
VI = VCC or GND
−
±1.0 µA
±2.0 µA
±1.0 µA
−
IS(OFF)
IS(ON)
ICC
analog switch current
OFF-state
per channel; VI = VIH or VIL;
VS = VCC − GND; see Fig.7
−
analog switch current
ON-state
VI = VIH or VIL; VS = VCC − GND; see
Fig.8
10.0
−
−
±1.0 µA
quiescent supply
current
VI = VCC or GND; Vis = GND or VCC
Vos = VCC or GND
;
6.0
−
−
−
−
40.0 µA
80.0 µA
10.0
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Nov 11
8
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
Family 74HCT4066
Voltages are referenced to GND (ground = 0 V); Vis is the input voltage at pins nY or nZ, whichever is assigned as an
input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
VIH
HIGH-level input
voltage
4.5 to 5.5 2.0
1.6
−
V
V
VIL
LOW-level input voltage
input leakage current
4.5 to 5.5
5.5
−
−
−
1.2
−
0.8
ILI
VI = VCC or GND
±1.0 µA
±1.0 µA
IS(OFF)
analog switch current
OFF-state
per channel; VI = VIH or VIL;
VS = VCC − GND; see Fig.7
5.5
−
IS(ON)
ICC
analog switch current
ON-state
VI = VIH or VIL; VS = VCC − GND; see
Fig.8
5.5
−
−
−
−
−
±1.0 µA
20.0 µA
quiescent supply
current
VI = VCC or GND; Vis = GND or VCC
;
4.5 to 5.5
4.5 to 5.5
Vos = VCC or GND
∆ICC
additional quiescent
VI = VCC − 2.1 V; other inputs at VCC
100 450
µA
supply current per input or GND
Tamb = −40 °C to +125 °C
VIH
HIGH-level input
voltage
4.5 to 5.5 2.0
−
−
V
V
VIL
LOW-level input voltage
input leakage current
4.5 to 5.5
5.5
−
−
−
−
−
−
0.8
ILI
VI = VCC or GND
±1.0 µA
±1.0 µA
IS(OFF)
analog switch current
OFF-state
per channel; VI = VIH or VIL;
VS = VCC − GND; see Fig.7
10.0
IS(ON)
ICC
analog switch current
ON-state
VI = VIH or VIL; VS = VCC − GND; see
Fig.8
10.0
−
−
−
−
−
−
±1.0 µA
40.0 µA
quiescent supply
current
VI = VCC or GND; Vis = GND or VCC
;
4.5 to 5.5
4.5 to 5.5
Vos = VCC or GND
∆ICC
additional quiescent
VI = VCC − 2.1 V; other inputs at VCC
490
µA
supply current per input or GND
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Nov 11
9
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
LOW
(from enable inputs)
nY
nZ
V
= GND or V
CC
V = V
I
or GND
A
A
O
CC
GND
MGR260
Fig.7 Test circuit for measuring OFF-state current.
HIGH
(from enable inputs)
nY
nZ
V
(open circuit)
V = V
I
or GND
A
A
O
CC
GND
MGR261
Fig.8 Test circuit for measuring ON-state current.
10
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
Resistance RON for 74HC4066 and 74HCT4066
For 74HC4066: VCC = 2.0, 4.5, 6.0 and 9.0 V; for 74HCT4066: VCC = 4.5 V; note 1; Vis is the input voltage at pins nY
or nZ, whichever is assigned as an input; see Fig.9.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
IS (µA) VCC (V)
Tamb = −40 °C to +85 °C; note 2
RON(peak)
ON-resistance
(peak)
VI = VIH or VIL; Vis = VCC to GND
100
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
1000
54
42
32
80
35
27
20
100
42
35
27
−
118
105
88
−
RON(rail)
ON-resistance
(rail)
VI = VIH or VIL; Vis = GND
100
1000
95
82
70
−
VI = VIH or VIL; Vis = VCC
100
1000
106
94
78
−
∆RON
maximum
variation of
ON-resistance
between any two
channels
VI = VIH or VIL; Vis = VCC to GND
−
5
−
4
−
3
−
Tamb = −40 °C to +125 °C
RON(peak)
ON-resistance
(peak)
VI = VIH or VIL; Vis = VCC to GND
VI = VIH or VIL; Vis = GND
VI = VIH or VIL; Vis = VCC
100
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
1000
142
126
105
−
RON(rail)
ON-resistance
(rail)
100
1000
115
100
85
100
−
1000
128
113
95
Notes
1. At supply voltages approaching 2 V, the analog ON-resistance switch becomes extremely non-linear. Therefore, it is
recommended that these devices are being used to transmit digital signals only, when using these supply voltages.
2. All typical values are measured at Tamb = 25 °C.
2004 Nov 11
11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
HIGH
(from enable inputs)
V
nY
nZ
V
= 0 to V
− GND
CC
I
is
s
GND
MGR259
Fig.9 Test circuit for measuring ON-resistance (RON).
MGR262
60
handbook, halfpage
R
ON
(Ω)
V
= 4.5 V
CC
50
40
30
20
10
6 V
9 V
0
1.8
3.6
5.4
7.2
9
V
(V)
is
Vis = 0 V to VCC.
Fig.10 Typical ON-resistance (RON) as a function of input voltage (Vis).
12
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
AC CHARACTERISTICS
Type 74HC4066
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is
the output voltage at pins nY or nZ, whichever is assigned as an output.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
tPHL/tPLH
propagation delay
Vis to Vos
RL = ∞; see Fig.19
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
−
−
−
−
−
−
−
−
−
−
−
−
8
75
15
13
10
125
25
21
16
190
38
33
26
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
2
2
tPZH/tPZL
turn-on time nE to Vos
turn-off time nE to Vos
RL = 1 kΩ; see Figs 20 and 21
RL = 1 kΩ; see Figs 20 and 21
36
13
10
8
tPHZ/tPLZ
44
16
13
16
Tamb = −40 °C to +125 °C
t
PHL/tPLH
propagation delay
Vis to Vos
RL = ∞; see Fig.19
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
2.0
4.5
6.0
9.0
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
90
18
15
12
150
30
26
20
225
45
38
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tPZH/tPZL
turn-on time nE to Vos
turn-off time nE to Vos
RL = 1 kΩ; see Figs 20 and 21
RL = 1 kΩ; see Figs 20 and 21
tPHZ/tPLZ
Note
1. All typical values are measured at Tamb = 25 °C.
2004 Nov 11
13
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
Type 74HCT4066
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; Vis is the input voltage at pins nY or nZ, whichever is assigned as an input; Vos is
the output voltage at pins nY or nZ, whichever is assigned as an output.
TEST CONDITIONS
SYMBOL
PARAMETER
MIN. TYP. MAX. UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
tPHL/tPLH
propagation delay
Vis to Vos
RL = ∞; see Fig.19
4.5
−
3
15
ns
tPZH/tPZL
tPHZ/tPLZ
turn-on time nE to Vos
turn-off time nE to Vos
RL = 1 kΩ; see Figs 20 and 21
RL = 1 kΩ; see Figs 20 and 21
4.5
4.5
−
−
12
20
30
44
ns
ns
Tamb = −40 °C to +125 °C
tPHL/tPLH propagation delay
RL = ∞; see Fig.19
4.5
−
−
18
ns
Vis to Vos
t
PZH/tPZL
turn-on time nE to Vos
turn-off time nE to Vos
RL = 1 kΩ; see Figs 20 and 21
RL = 1 kΩ; see Figs 20 and 21
4.5
4.5
−
−
−
−
36
53
ns
ns
tPHZ/tPLZ
Note
1. All typical values are measured at Tamb = 25 °C.
74HC4066 and 74HCT4066
At recommended conditions and typical values; GND = 0 V; tr = tf = 6 ns; Vis is the input voltage at pins nY or nZ,
whichever is assigned as an input; Vos is the output voltage at pins nY or nZ, whichever is assigned as an output.
CONDITIONS
SYMBOL
dsin
PARAMETER
TYP. UNIT
OTHER
V
is(p-p) (V) VCC (V)
sine wave distortion
f = 1 kHz; RL = 10 kΩ; CL = 50 pF; 4.0
4.5
9.0
4.5
9.0
0.04
0.02
0.12
0.06
%
%
%
%
see Fig.17
8.0
f = 10 kHz; RL = 10 kΩ; CL = 50 pF; 4.0
see Fig.17
8.0
αOFF(feedthr) switch OFF signal
RL = 600 Ω; CL = 50 pF; f = 1 MHz; note 1
see Figs 11 and 18
4.5
9.0
4.5
9.0
4.5
9.0
−50 dB
−50 dB
−60 dB
−60 dB
110 mV
220 mV
feed-through
αct(s)
crosstalk between any two RL = 600 Ω; CL = 50 pF; f = 1 MHz; note 1
switches see Fig.13
Vct(p-p)
crosstalk voltage between RL = 600 Ω; CL = 50 pF; f = 1 MHz;
−
any input to any switch
(peak-to-peak value)
see Fig.15 (nE, square wave
between VCC and GND,
tr = tf = 6 ns)
fmax
minimum frequency
response (−3 dB)
RL = 50 Ω; CL = 10 pF; see Figs 12 note 2
and 16
4.5
9.0
−
180 MHz
200 MHz
CS
maximum switch
capacitance
−
8
pF
Notes
1. Adjust input voltage Vis is 0 dBM level (0 dBM = 1 mW into 600 Ω).
2. Adjust input voltage Vis is 0 dBM level at Vos for 1 MHz (0 dBM = 1 mW into 50 Ω).
2004 Nov 11
14
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
MGR263
0
(dB)
−20
−40
−60
−80
−100
2
3
4
5
6
10
10
10
10
10
10
f (kHz)
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; Rsource = 1 kΩ.
Fig.11 Typical switch OFF signal feed-through as a function of frequency.
MGR264
5
(dB)
0
−5
10
2
3
4
5
6
10
10
10
10
10
f (kHz)
Test conditions: VCC = 4.5 V; GND = 0 V; RL = 50 Ω; Rsource = 1 kΩ.
Fig.12 Typical frequency response.
15
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
V
CC
2R
L
0.1 µF
nY/nZ
nZ/nY
V
I
R
L
2R
C
L
L
channel
ON
GND
MGR265
Fig.13 Test circuit for measuring crosstalk between any two switches; channels ON condition.
V
V
CC
2R
CC
2R
L
L
nY/nZ
nZ/nY
V
os
2R
2R
C
dB
L
L
L
channel
OFF
GND
MGR266
Fig.14 Test circuit for measuring crosstalk between any two switches; channels OFF condition.
2004 Nov 11
16
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
The crosstalk is defined as follows
(oscilloscope output).
V
V
nE
CC
2R
CC
V
CC
GND
2R
L
L
page
nY/nZ
nZ/nY
V
V
D.U.T.
ct(p-p)
os
2R
2R
C
L
oscilloscope
L
L
MGR267
GND
MGR268
Fig.15 Test circuit for measuring crosstalk between control and any switch.
V
CC
2R
L
0.1 µF
nY/nZ
nZ/nY
V
V
os
is
sine-wave
2R
C
dB
L
L
channel
ON
GND
MGR269
Adjust input voltage to obtain 0 dB at Vos when fi = 1 MHz. After set-up, the frequency of fi is increased to obtain a reading of -3 dB at Vos
.
Fig.16 Test circuit for measuring minimum frequency response.
2004 Nov 11
17
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
V
CC
2R
L
10 µF
nY/nZ
nZ/nY
V
V
f = 1 kHz
i
is
os
sine-wave
DISTORTION
METER
2R
C
L
L
channel
ON
GND
MGR270
Fig.17 Test circuit for measuring sine wave distortion.
V
CC
2R
L
0.1 µF
nY/nZ
nZ/nY
V
V
os
is
2R
C
dB
L
L
channel
OFF
GND
MGR271
Fig.18 Test circuit for measuring switch OFF signal feed-through.
18
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
AC WAVEFORMS
t
t
f
r
V
CC
90%
50%
V
is
10%
GND
V
50%
os
t
t
PHL
PLH
MGR272
Fig.19 Waveforms showing the input (Vis) to output (Vos) propagation delays.
t
t
r
f
90 %
nE input
V
M
10 %
t
t
PZL
PLZ
output
LOW - to - OFF
OFF - to - LOW
50 %
10 %
t
t
PHZ
PZH
90 %
output
HIGH - to - OFF
OFF - to - HIGH
50 %
outputs
enabled
outputs
disabled
outputs
enabled
MGA846
74HC4066: VM = 50 %; VI = GND to VCC
.
74HCT4066: VM = 1.3 V; VI = GND to 3 V.
Fig.20 Waveforms showing the turn-on and turn-off times.
19
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
TEST CIRCUIT AND WAVEFORMS
V
V
V
CC is
CC
switch
V
V
O
R
I
L
PULSE
GENERATOR
D.U.T.
open
C
R
L
T
GND
MGR273
TEST
SWITCH
Vis
tPZH
tPZL
tPHZ
tPLZ
GND
VCC
VCC
GND
VCC
GND
VCC
GND
pulse
other
open
Definitions for test circuit:
RL = Load resistance.
tf = 6 ns; when measuring fmax, there is no
constraint to tr and tf with 50 % duty factor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance ZO of the pulse generator.
Fig.21 Test circuit for measuring AC performance.
t
W
amplitude
0 V
90%
negative
input pulse
V
M
10%
t
t
(t )
f
t
t
(t )
r
THL
TLH
TLH
THL
(t )
r
(t )
f
amplitude
90%
M
positive
input pulse
V
10%
0 V
t
W
MGR274
tr and tf
FAMILY
AMPLITUDE
VM
fmax; PULSE
WIDTH
OTHER
74HC4066
VCC
50 %
1.3 V
<2 ns
<2 ns
6 ns
6 ns
74HCT4066
3.0 V
Fig.22 Input pulse definitions.
20
2004 Nov 11
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
PACKAGE OUTLINES
DIP14: plastic dual in-line package; 14 leads (300 mil)
SOT27-1
D
M
E
A
2
A
A
w
1
L
c
e
M
Z
b
1
(e )
1
b
M
H
14
8
pin 1 index
E
1
7
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
UNIT
mm
b
b
c
D
E
e
e
L
M
M
H
w
1
1
E
max.
min.
max.
max.
1.73
1.13
0.53
0.38
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
2.2
0.068
0.044
0.021
0.015
0.014
0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.087
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-13
SOT27-1
050G04
MO-001
SC-501-14
2004 Nov 11
21
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
2004 Nov 11
22
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
7
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT337-1
MO-150
2004 Nov 11
23
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
2004 Nov 11
24
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14
13
9
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
1
b
c
E
e
e
1
y
D
D
E
L
v
w
y
h
h
1
max.
0.05 0.30
0.00 0.18
3.1
2.9
1.65
1.35
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT762-1
- - -
MO-241
- - -
2004 Nov 11
25
Philips Semiconductors
Product specification
Quad bilateral switches
74HC4066; 74HCT4066
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 Nov 11
26
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R44/05/pp27
Date of release: 2004 Nov 11
Document order number: 9397 750 14188
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