74HC4520N,652 [NXP]
74HC(T)4520 - Dual 4-bit synchronous binary counter DIP 16-Pin;
| 型号： | 74HC4520N,652 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)4520 - Dual 4-bit synchronous binary counter DIP 16-Pin 输入元件 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总19页 (文件大小：199K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC4520; 74HCT4520
Dual 4-bit synchronous binary counter
Rev. 3 — 4 December 2014
Product data sheet
1. General description
The 74HC4520; 74HCT4520 are dual 4-bit internally synchronous binary counters with
two clock inputs (nCP0 and nCP1). They have buffered outputs from all 4 bit positions
(nQ0 to nQ3) and an asynchronous master reset input (nMR). The counter advances on
the LOW-to-HIGH transition of nCP0 when nCP1 is HIGH. It also advances on the
HIGH-to-LOW transition of nCP1 when nCP0 is LOW. Either nCP0 or nCP1 may be used
as the clock input to the counter. The other clock input may be used as a clock enable
input. A HIGH on nMR, resets the counter (nQ0 to nQ3 = LOW) independent of nCP0 and
nCP1. Inputs include clamp diodes. It enables the use of current limiting resistors to
interface inputs to voltages in excess of VCC
.
2. Features and benefits
Complies with JEDEC standard no. 7A
Input levels:
For 74HC4520: CMOS level
For 74HCT4520: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C
3. Applications
Multistage synchronous counting
Multistage asynchronous counting
Frequency dividers
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature
range
Name
Description
Version
74HC4520N
40 C to +125 C DIP16
40 C to +125 C SO16
40 C to +125 C SSOP16
40 C to +125 C TSSOP16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
74HCT4520N
74HC4520D
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
SOT338-1
SOT403-1
74HCT4520D
74HC4520DB
74HCT4520DB
74HC4520PW
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
5. Functional diagram
1Q0
1Q1
1Q2
1Q3
3
4
5
6
1
2
1CP0
1CP1
7
9
1MR
2Q0 11
2Q1 12
2Q2 13
2Q3 14
2CP0
10 2CP1
15 2MR
001aae698
Fig 1. Functional diagram
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
2 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10 11 12 13 14 15 16 17 18
nCP0
nCP1
nMR
1
10 11 12 13 14 15
0
1
2
3
4
nQ0
nQ1
nQ2
nQ
3
001aae707
Fig 2. Timing diagram
Q4ꢄ
Q4ꢁ
Q4ꢀ
Q4ꢂ
4
4
4
4
4
4
4
))ꢁ
))ꢀ
))ꢂ
&3
))ꢃ
&3
Q&3ꢁ
Q&3ꢄ
&3
&3
4
5'
5'
5'
5'
Q05
DDDꢀꢁꢂꢃꢄꢁꢅ
Fig 3. Logic diagram for one counter
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
3 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
6. Pinning information
6.1 Pinning
ꢀꢁ+&ꢁꢂꢃꢄ
ꢀꢁ+&7ꢁꢂꢃꢄ
ꢀꢁ+&ꢁꢂꢃꢄ
ꢀꢁ+&7ꢁꢂꢃꢄ
ꢁꢆ
ꢁꢅ
ꢁꢃ
ꢁꢂ
ꢁꢀ
ꢁꢁ
ꢁꢄ
ꢉ
ꢁ
ꢀ
ꢂ
ꢃ
ꢅ
ꢆ
ꢇ
ꢈ
ꢁ&3ꢄ
ꢁ&3ꢁ
ꢁ4ꢄ
9
&&
ꢁ
ꢀ
ꢂ
ꢃ
ꢅ
ꢆ
ꢇ
ꢈ
ꢁꢆ
ꢁꢅ
ꢁꢃ
ꢁꢂ
ꢁꢀ
ꢁꢁ
ꢁꢄ
ꢉ
ꢁ&3ꢄ
ꢁ&3ꢁ
ꢁ4ꢄ
9
&&
ꢀꢁ+&ꢁꢂꢃꢄ
ꢀꢁ+&7ꢁꢂꢃꢄ
ꢀ05
ꢀ4ꢂ
ꢀ05
ꢀ4ꢂ
ꢁ&3ꢄ
ꢁ&3ꢁ
ꢁ4ꢄ
9
ꢁ
ꢀ
ꢂ
ꢃ
ꢅ
ꢆ
ꢇ
ꢈ
ꢁꢆ
ꢁꢅ
&&
ꢁ4ꢁ
ꢀ4ꢀ
ꢀ05
ꢁ4ꢁ
ꢀ4ꢀ
ꢁꢃ ꢀ4ꢂ
ꢁ4ꢀ
ꢀ4ꢁ
ꢁ4ꢀ
ꢀ4ꢁ
ꢁ4ꢁ
ꢀ4ꢀ
ꢁꢂ
ꢁꢀ
ꢁꢁ
ꢁꢄ
ꢉ
ꢁ4ꢂ
ꢀ4ꢄ
ꢁ4ꢀ
ꢀ4ꢁ
ꢁ4ꢂ
ꢀ4ꢄ
ꢁ4ꢂ
ꢀ4ꢄ
ꢁ05
*1'
ꢀ&3ꢁ
ꢀ&3ꢄ
ꢁ05
*1'
ꢀ&3ꢁ
ꢀ&3ꢄ
ꢁ05
*1'
ꢀ&3ꢁ
ꢀ&3ꢄ
DDDꢀꢁꢂꢃꢃꢆꢂ
DDDꢀꢁꢂꢃꢃꢆꢇ
DDDꢀꢁꢂꢃꢃꢆꢈ
Fig 4. Pin configuration DIP16
Fig 5. Pin configuration SO16
Fig 6. Pin configuration TSSOP16
and SSOP16
6.2 Pin description
Table 2.
Symbol
Pin description
Pin
Description
1CP0, 2CP0
1CP1, 2CP1
1Q0 to 1Q3
1MR, 2MR
GND
1, 9
clock input (LOW-to-HIGH edge-triggered)
2, 10
clock input (HIGH-to-LOW edge-triggered)
3, 4, 5, 6
output
7, 15
asynchronous master reset input (active HIGH)
8
ground (0 V)
output
2Q0 to 2Q3
VCC
11, 12, 13, 14
16
supply voltage
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
4 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
7. Functional description
Table 3.
Function table[1]
nCP0
nCP1
nMR
Mode
L
H
X
L
L
L
L
L
L
L
H
counter advances
counter advances
no change
X
H
X
no change
no change
X
no change
nQ0 to nQ3 = LOW
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = positive-going transition; = negative-going transition.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7.0
20
20
25
50
Unit
V
supply voltage
0.5
input clamping current
output clamping current
output current
VI < 0.5 V or VI > VCC + 0.5 V
VO < 0.5 V or VO > VCC + 0.5 V
VO = 0.5 V to VCC + 0.5 V
-
mA
mA
mA
mA
mA
C
IOK
-
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
50
-
storage temperature
total power dissipation
65
+150
750
500
500
[1]
[1]
[1]
DIP16 package
-
-
-
mW
mW
mW
SO16 package
(T)SSOP16 package
[1] For DIP16 packages: above 70 C the value of Ptot derates linearly at 12 mW/K.
For SO16 packages: above 70 C the value of Ptot derates linearly at 8 mW/K.
For (T)SSOP16 packages: above 60 C the value of Ptot derates linearly at 5.5 mW/K.
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
5 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter Conditions
74HC4520
74HCT4520
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VI
supply voltage
2.0
5.0
4.5
5.0
V
V
V
input voltage
0
-
VCC
VCC
+125
625
139
83
0
-
VCC
VCC
VO
output voltage
0
-
+25
-
0
-
+25
-
Tamb
t/V
ambient temperature
input transition rise and fall rate VCC = 2.0 V
VCC = 4.5 V
40
40
+125 C
-
-
-
-
-
-
-
ns/V
1.67
-
1.67
-
139 ns/V
VCC = 6.0 V
-
ns/V
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max
Min
Max
Min
Max
74HC4520
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5
1.2
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15 2.4
3.15
3.15
VCC = 6.0 V
4.2
3.2
0.8
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
2.1 1.35
VCC = 6.0 V
2.8
1.8
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0; VCC = 4.5 V
IO = 5.2; VCC = 6.0 V
VI = VIH or VIL
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
5.9
3.98 4.32
5.48 5.81
3.84
5.34
VOL
LOW-level
output voltage
IO = 20 A; VCC = 2.0 V
IO = 20 A; VCC = 4.5 V
IO = 20 A; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
1.0
V
V
0.1
V
0.15 0.26
0.16 0.26
0.33
0.33
1.0
V
V
II
input leakage VI = VCC or GND; VCC = 6.0 V
current
-
0.1
A
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
8.0
-
80.0
-
160.0 A
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
6 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max
Min
Max
Min
Max
CI
input
-
3.5
-
-
-
-
-
pF
capacitance
74HCT4520
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
4.4
4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = 4.0 mA
3.98 4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 A
-
-
-
0
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
IO = 4.0 mA
0.15 0.26
0.33
1.0
V
II
input leakage VI = VCC or GND; VCC = 5.5 V
current
-
0.1
1.0
A
ICC
ICC
supply current VI = VCC or GND; IO = 0 A;
VCC = 5.5 V
-
-
8.0
-
80.0
-
160.0 A
additional
per input pin; VI = VCC 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V; IO = 0 A
supply current
pin nCP0, nCP1
pin nMR
-
-
-
80
150 540
3.5
288
-
-
-
360
675
-
-
-
-
392
735
-
A
A
pF
CI
input
-
capacitance
11. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8.
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max
Min
Max
Min
Max
74HC4520
[1]
tpd
propagation
delay
nCP0 to nQn; see Figure 7
VCC = 2.0 V
-
-
-
-
77 240
-
-
-
-
300
60
-
-
-
-
-
360
72
-
ns
ns
ns
ns
VCC = 4.5 V
28
24
22
48
-
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
41
51
61
[1]
nCP1 to nQn; see Figure 7
VCC = 2.0 V
-
-
-
-
77 240
-
-
-
-
300
60
-
-
-
-
-
360
72
-
ns
ns
ns
ns
VCC = 4.5 V
28
24
22
48
-
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
41
51
61
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
7 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8.
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max
Min
Max
Min
Max
tPHL
HIGH to LOW nMR to nQn; see Figure 7
propagation
delay
VCC = 2.0 V
-
-
-
-
44 150
-
-
-
-
190
38
-
-
-
-
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
16
13
13
30
-
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
33
38
[2]
tt
transition
time
nQn; see Figure 7
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
tW
pulse width
nCP0, nCP1 HIGH or LOW; see Figure 7
VCC = 2.0 V
VCC = 4.5 V
80
16
14
22
8
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 6.0 V
6
17
20
nMR HIGH; see Figure 7
VCC = 2.0 V
120 39
-
-
-
150
30
-
-
-
180
36
-
-
-
ns
ns
ns
VCC = 4.5 V
24
20
14
11
VCC = 6.0 V
26
31
trec
recovery time nMR to nCP0, nCP1; see Figure 7
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
0
0
0
28
10
8
-
-
-
0
0
0
-
-
-
0
0
0
-
-
-
ns
ns
ns
tsu
set-up time
nCP0 to nCP1; nCP1 to nCP0; see Figure 7
VCC = 2.0 V
VCC = 4.5 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
VCC = 6.0 V
4
17
20
fmax
maximum
frequency
nCP0, nCP1; see Figure 7
VCC = 2.0 V
6
30
-
19
58
68
69
29
-
-
-
-
-
4.8
24
-
-
-
-
-
-
4
20
-
-
-
-
-
-
MHz
MHz
MHz
MHz
pF
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
35
-
28
-
24
-
[3]
CPD
power
VI = GND to VCC; VCC = 5 V;
fi = 1 MHz
dissipation
capacitance
74HCT4520
[1]
[1]
tpd
propagation
delay
nCP0 to nQn; see Figure 7
VCC = 4.5 V
-
-
28
24
53
-
-
-
66
-
-
-
80
-
ns
ns
VCC = 5.0 V; CL = 15 pF
nCP1 to nQn; see Figure 7
VCC = 4.5 V
-
-
25
24
53
-
-
-
66
-
-
-
80
-
ns
ns
VCC = 5.0 V; CL = 15 pF
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
8 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 8.
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max
Min
Max
Min
Max
tPHL
HIGH to LOW nMR to nQn; see Figure 7
propagation
delay
VCC = 4.5 V
-
-
16
13
35
-
-
-
44
-
-
-
53
-
ns
ns
VCC = 5.0 V; CL = 15 pF
[2]
tt
transition
time
nQn; see Figure 7
VCC = 4.5 V
-
7
15
-
-
19
-
-
22
-
ns
ns
ns
ns
ns
tW
pulse width
nCP0, nCP1 HIGH or LOW; see Figure 7
VCC = 4.5 V
20
20
0
10
12
8
25
25
0
30
30
0
nMR HIGH; see Figure 7
VCC = 4.5 V
-
-
-
trec
recovery time nMR to nCP0, nCP1; see Figure 7
VCC = 4.5 V
-
-
-
tsu
set-up time
nCP0 to nCP1; nCP1 to nCP0; see Figure 7
VCC = 4.5 V
16
6
-
20
-
24
-
fmax
maximum
frequency
nCP0, nCP1; see Figure 7
VCC = 4.5 V
30
-
58
64
24
-
-
-
24
-
-
-
-
20
-
-
-
-
MHz
MHz
pF
VCC = 5.0 V; CL = 15 pF
[3]
CPD
power
VI = GND to VCC 1.5 V;
-
-
-
dissipation
capacitance
VCC = 5 V; fi = 1 MHz
[1] tpd is the same as tPHL and tPLH
.
[2] tt is the same as tTHL and tTLH
.
[3] CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
(CL VCC2 fo) = sum of outputs.
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
9 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
12. Waveforms
V
I
V
M
nCP0 input
0 V
V
I
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0 V
V
M
0 V
t
t
su
su
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I
nMR input
0 V
V
M
t
t
t
PHL
PHL
PLH
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OH
90 %
nQn output
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M
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OL
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t
t
t
001aae702
a. nCP0 and nCP1 set-up times, propagation delays and output transition times
1/f
max
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I
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V
M
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t
t
W
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I
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W
V
I
V
nMR input
0 V
M
t
W
t
rec
001aae701
b. nMR recovery time, minimum nCP0, nCP1, nMR pulse widths and maximum frequency
Measurement points are given in Table 8.
The logic levels VOH and VOL are typical output voltage levels that occur with the output load.
Fig 7. Waveforms showing measurements for switching times
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
10 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
Table 8.
Type
Measurement points
Input
VM
Output
VM
VI
74HC4520
0.5 VCC
1.3 V
GND to VCC
GND to 3 V
0.5 VCC
1.3 V
74HCT4520
W
:
9
,
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9
9
9
0
0
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9
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9
9
&&
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&
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Test data is given in Table 9.
Test circuit definitions:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistance.
S1 = Test selection switch
Fig 8. Test circuit for measuring switching times
Table 9.
Type
Test data
Input
Load
S1 position
tPHL, tPLH
open
VI
tr, tf
6 ns
6 ns
CL
RL
74HC4520
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 k
1 k
74HCT4520
open
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
11 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
13. Package outline
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Fig 9. Package outline SOT38-4 (DIP16)
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
12 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
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Fig 10. Package outline SOT109-1 (SO16)
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
13 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
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Fig 11. Package outline SOT338-1 (SSOP16)
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
14 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
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Fig 12. Package outline SOT403-1 (TSSOP16)
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
15 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
14. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal-Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-power Schottky Transistor-Transistor Logic
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 11. Revision history
Document ID
Release date
20141204
Data sheet status
Change notice
Supersedes
74HC_HCT4520 v.3
Modifications:
Product data sheet
-
74HC_HCT4520_CNV v.2
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
74HC_HCT4520_CNV v.2 19930927
Product specification
-
-
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
16 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
16.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
16.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
17 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
17. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT4520
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 3 — 4 December 2014
18 of 19
74HC4520; 74HCT4520
NXP Semiconductors
Dual 4-bit synchronous binary counter
18. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
7
Functional description . . . . . . . . . . . . . . . . . . . 5
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 6
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 18
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 18
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2014.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 4 December 2014
Document identifier: 74HC_HCT4520
相关型号：
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