74HCT123D-Q100,115 [NXP]

74HC(T)123-Q100 - Dual retriggerable monostable multivibrator with reset SOP 16-Pin;
74HCT123D-Q100,115
型号: 74HCT123D-Q100,115
厂家: NXP    NXP
描述:

74HC(T)123-Q100 - Dual retriggerable monostable multivibrator with reset SOP 16-Pin

时钟 光电二极管 逻辑集成电路
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74HC123-Q100; 74HCT123-Q100  
Dual retriggerable monostable multivibrator with reset  
Rev. 1 — 1 August 2012  
Product data sheet  
1. General description  
The 74HC123-Q100; 74HCT123-Q100 are high-speed Si-gate CMOS devices and are pin  
compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with  
JEDEC standard no. 7A.  
The 74HC123-Q100; 74HCT123-Q100 are dual retriggerable monostable multivibrators  
with output pulse width control by three methods:  
1. The basic pulse is defined by the selection of the external resistor (REXT) and  
capacitor (CEXT).  
2. Once triggered, the basic output pulse width may be extended by retriggering the  
gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By  
repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made  
as long as desired. Alternatively an output delay can be terminated at any time by a  
LOW-going edge on input nRD, which also inhibits the triggering.  
3. An internal connection from nRD to the input gates makes it possible to trigger the  
circuit by a HIGH-going signal at input nRD as shown in Table 3.  
Schmitt trigger action in the nA and nB inputs, makes the circuit highly tolerant to slower  
input rise and fall times.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
DC triggered from active HIGH or active LOW inputs  
Retriggerable for very long pulses up to 100 % duty factor  
Direct reset terminates output pulse  
Schmitt trigger action on all inputs except for the reset input  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 )  
Specified from 40 C to +85 C and from 40 C to +125 C  
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC123D-Q100  
74HCT123D-Q100  
40 C to +125 C  
SO16  
plastic small outline package; 16 leads;  
body width 3.9 mm  
SOT109-1  
74HC123PW-Q100 40 C to +125 C  
TSSOP16  
plastic thin shrink small outline package; 16 leads; SOT403-1  
body width 4.4 mm  
74HCT123PW-Q100  
74HC123BQ-Q100  
40 C to +125 C  
DHVQFN16 plastic dual in-line compatible thermal enhanced  
very thin quad flat package; no leads; 16 terminals;  
body 2.5 3.5 0.85 mm  
SOT763-1  
4. Functional diagram  
14  
1CEXT  
15  
1REXT/CEXT  
S
13  
1Q  
1Q  
Q
Q
1
1A  
T
4
2
3
1B  
RD  
1RD  
6
7
2CEXT  
2REXT/CEXT  
S
5
2Q  
2Q  
Q
Q
9
2A  
T
12  
10  
11  
2B  
RD  
2RD  
001aaa610  
Fig 1. Functional diagram  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
2 of 23  
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
14  
CX  
15  
13  
RCX  
1
&
2
1CEXT 14  
2CEXT  
4
6
3
R
1REXT/CEXT 15  
2REXT/CEXT  
7
6
7
S
CX  
1Q 13  
5
Q
Q
RCX  
2Q  
5
1
9
1A  
2A  
9
T
&
10  
1Q  
4
2
1B  
12  
2Q 12  
RD  
10 2B  
11  
R
3
1RD  
mna515  
11  
2RD  
mna516  
Fig 2. Logic symbol  
Fig 3. IEC logic symbol  
nREXT/CEXT  
V
CC  
nQ  
nQ  
nRD  
R
R
CL  
CL  
V
CC  
V
CC  
R
CL  
CL  
CL  
nA  
nB  
R
mna518  
Fig 4. Logic diagram  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
3 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
5. Pinning information  
5.1 Pinning  
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢉ  
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ꢀꢁꢂꢃꢊꢄꢅꢄꢆꢇꢈꢄꢉꢉ  
ꢀꢑ  
ꢀꢐ  
ꢀꢏ  
ꢀꢌ  
ꢀꢀ  
ꢀꢕ  
ꢀꢄ  
ꢀꢅꢊ  
ꢀꢅꢆꢇꢈꢉꢃꢆꢇꢈ  
ꢀꢃꢆꢇꢈ  
ꢀꢋ  
ꢀꢁ  
ꢀꢒ ꢂ  
ꢃꢃ  
ꢀꢋ  
ꢀꢄ  
ꢀꢅꢊ  
ꢀꢑ ꢀꢅꢆꢇꢈꢉꢃꢆꢇꢈ  
ꢀꢐ ꢀꢃꢆꢇꢈ  
ꢀꢏ ꢀꢋ  
ꢌꢋ  
ꢌꢋ  
ꢀꢋ  
)ꢀ*  
ꢃꢃ  
ꢌꢃꢆꢇꢈ  
ꢌꢅꢆꢇꢈꢉꢃꢆꢇꢈ  
ꢌꢅꢊ  
ꢌꢄ  
ꢌꢋ  
ꢀꢌ ꢌꢋ  
ꢌꢃꢆꢇꢈ  
ꢌꢅꢆꢇꢈꢉꢃꢆꢇꢈ  
ꢍꢎꢊ  
ꢀꢀ ꢌꢅꢊ  
ꢀꢕ ꢌꢄ  
ꢀꢀꢀꢁꢂꢂꢃꢂꢄꢃ  
ꢌꢁ  
ꢈꢗꢘꢙꢚꢛꢘꢗꢜꢙꢝ ꢝ!ꢛ "#ꢜ$  
ꢀꢀꢀꢁꢂꢂꢃꢂꢄꢄ  
(1) The die substrate is attached to this pad using  
conductive die attach material. It cannot be used as  
supply pin or input.  
Fig 5. Pin configuration for SO16 and TSSOP16  
Fig 6. Pin configuration for DHVQFN16  
5.2 Pin description  
Table 2.  
Symbol  
1A  
Pin description  
Pin  
1
Description  
negative-edge triggered input 1  
positive-edge triggered input 1  
direct reset LOW and positive-edge triggered input 1  
active LOW output 1  
1B  
2
1RD  
3
1Q  
4
2Q  
5
active HIGH output 2  
2CEXT  
6
external capacitor connection 2  
external resistor and capacitor connection 2  
ground (0 V)  
2REXT/CEXT  
7
GND  
8
2A  
9
negative-edge triggered input 2  
positive-edge triggered input 2  
direct reset LOW and positive-edge triggered input 2  
active LOW output 2  
2B  
10  
11  
12  
13  
14  
15  
16  
2RD  
2Q  
1Q  
active HIGH output 1  
1CEXT  
1REXT/CEXT  
VCC  
external capacitor connection 1  
external resistor and capacitor connection 1  
supply voltage  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
4 of 23  
 
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
6. Functional description  
Table 3.  
Function table[1]  
Input  
nRD  
L
Output  
nA  
X
nB  
X
nQ  
nQ  
H
L
X
H
X
X
L[2]  
L[2]  
H[2]  
H[2]  
X
L
H
L
H
H
H
L
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; = LOW-to-HIGH transition; = HIGH-to-LOW transition;  
= one HIGH level output pulse; = one LOW level output pulse.  
[2] If the monostable was triggered before this condition was established, the pulse continues as programmed.  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
Max  
+7  
Unit  
V
supply voltage  
0.5  
input clamping current  
output clamping current  
output current  
VI < 0.5 V or VI > VCC + 0.5 V  
VO < 0.5 V or VO > VCC + 0.5 V  
-
-
-
20  
20  
25  
mA  
mA  
mA  
IOK  
IO  
except for pins nREXT/CEXT;  
VO = 0.5 V to (VCC + 0.5 V)  
ICC  
supply current  
-
50  
mA  
mA  
C  
IGND  
Tstg  
Ptot  
ground current  
-
50  
+150  
storage temperature  
total power dissipation  
SO16 package  
65  
[3]  
[4]  
[5]  
-
-
-
500  
500  
500  
mW  
mW  
mW  
TSSOP16 package  
DHVQFN16 package  
[3] For SO16 packages: Ptot derates linearly with 8 mW/K above 70 C.  
[4] For TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 C.  
[5] For DHVQFN16 packages: Ptot derates linearly with 4.5 mW/K above 60 C.  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
5 of 23  
 
 
 
 
 
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
8. Recommended operating conditions  
Table 5.  
Recommended operating conditions  
Symbol Parameter  
Conditions  
74HC123-Q100  
74HCT123-Q100  
Unit  
Min  
Typ  
Max  
Min  
Typ  
Max  
VCC  
VI  
supply voltage  
input voltage  
output voltage  
2.0  
0
5.0  
6.0  
VCC  
VCC  
4.5  
0
5.0  
5.5  
VCC  
VCC  
V
V
V
-
-
-
-
VO  
0
0
t/V  
input transition rise and  
fall rate  
nRD input  
VCC = 2.0 V  
VCC = 4.5 V  
VCC = 6.0 V  
-
-
625  
139  
83  
-
-
-
ns/V  
-
-
1.67  
-
-
-
1.67  
-
139 ns/V  
ns/V  
+125 C  
-
Tamb  
ambient temperature  
40  
+25  
+125  
40  
+25  
9. Static characteristics  
Table 6.  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
74HC123-Q100  
VIH  
HIGH-level  
input voltage  
VCC = 2.0 V  
1.5  
1.2  
2.4  
3.2  
0.8  
-
-
1.5  
-
-
1.5  
-
-
V
V
V
V
V
V
VCC = 4.5 V  
3.15  
3.15  
3.15  
VCC = 6.0 V  
4.2  
-
4.2  
-
4.2  
-
VIL  
LOW-level  
input voltage  
VCC = 2.0 V  
-
-
-
0.5  
-
-
-
0.5  
1.35  
1.8  
-
-
-
0.5  
1.35  
1.8  
VCC = 4.5 V  
2.1 1.35  
VCC = 6.0 V  
2.8  
1.8  
VOH  
HIGH-level  
VI = VIH or VIL  
output voltage  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
VI = VIH or VIL  
1.9  
4.4  
5.9  
2.0  
4.5  
6.0  
-
-
-
-
-
1.9  
4.4  
-
-
-
-
-
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
V
V
V
V
V
5.9  
3.98 4.32  
5.48 5.81  
3.84  
5.34  
VOL  
LOW-level  
output voltage  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 4 mA; VCC = 4.5 V  
IO = 5.2 mA; VCC = 6.0 V  
-
-
-
-
-
-
0
0
0
0.1  
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
-
0.1  
0.1  
0.1  
0.4  
0.4  
1.0  
V
V
0.1  
V
0.15 0.26  
0.16 0.26  
0.33  
0.33  
1.0  
V
V
II  
input leakage VI = VCC or GND; VCC = 6.0 V  
current  
-
0.1  
A  
ICC  
supply current VI = VCC or GND; IO = 0 A;  
VCC = 6.0 V  
-
-
8.0  
-
80  
-
160  
A  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
6 of 23  
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
Table 6.  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
CI  
input  
-
3.5  
-
-
-
-
-
pF  
capacitance  
74HCT123-Q100  
VIH  
HIGH-level  
input voltage  
VCC = 4.5 V to 5.5 V  
VCC = 4.5 V to 5.5 V  
2.0  
-
1.6  
1.2  
-
2.0  
-
-
2.0  
-
-
V
V
VIL  
LOW-level  
0.8  
0.8  
0.8  
input voltage  
VOH  
HIGH-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 A  
4.4  
4.5  
-
-
4.4  
-
-
4.4  
3.7  
-
-
V
V
IO = 4 mA  
3.98 4.32  
3.84  
VOL  
LOW-level  
output voltage  
VI = VIH or VIL; VCC = 4.5 V  
IO = 20 A  
-
-
-
0
0.1  
-
-
-
0.1  
-
-
-
0.1  
0.4  
V
IO = 4.0 mA  
0.15 0.26  
0.33  
1.0  
V
II  
input leakage VI = VCC or GND; VCC = 5.5 V  
current  
-
0.1  
1.0  
A  
ICC  
ICC  
supply current VI = VCC or GND; IO = 0 A;  
VCC = 5.5 V  
-
-
8.0  
-
80  
-
160  
A  
additional  
supply current VI = VCC 2.1 V;  
other inputs at VCC or GND;  
per input pin; IO = 0 A;  
VCC = 4.5 V to 5.5 V  
pins nA, nB  
-
-
-
35  
50  
125  
180  
-
-
-
-
160  
225  
-
-
-
-
170  
245  
-
A  
A  
pF  
pin nRD  
CI  
input  
3.5  
capacitance  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
7 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
10. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.  
Symbol Parameter Conditions  
74HC123-Q100  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
[1]  
tpd  
propagation nRD, nA, nB to nQ or nQ;  
delay  
CEXT = 0 pF; REXT = 5 k;  
see Figure 9  
VCC = 2.0 V  
-
-
-
-
83  
30  
26  
24  
255  
51  
-
-
-
-
-
320  
64  
-
-
-
-
-
385  
77  
-
ns  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 5 V; CL = 15 pF  
VCC = 6.0 V  
43  
54  
65  
nRD (reset) to nQ or nQ;  
CEXT = 0 pF; REXT = 5 k;  
see Figure 9  
VCC = 2.0 V  
VCC = 4.5 V  
-
-
-
-
66  
24  
20  
19  
215  
43  
-
-
-
-
-
270  
54  
-
-
-
-
-
325  
65  
-
ns  
ns  
ns  
ns  
VCC = 5 V; CL = 15 pF  
VCC = 6.0 V  
37  
46  
55  
[1]  
tt  
transition  
time  
see Figure 9  
VCC = 2.0 V  
-
-
-
19  
7
75  
15  
13  
-
-
-
95  
19  
16  
-
-
-
110  
22  
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
6
19  
tW  
pulse width nA LOW; see Figure 10  
VCC = 2.0 V  
100  
20  
8
3
2
-
-
-
125  
25  
-
-
-
150  
30  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
17  
21  
26  
nB HIGH; see Figure 10  
VCC = 2.0 V  
100  
20  
17  
6
-
-
-
125  
25  
-
-
-
150  
30  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
17  
5
21  
26  
nRD LOW; see Figure 11  
VCC = 2.0 V  
100  
20  
14  
5
-
-
-
125  
25  
-
-
-
150  
30  
-
-
-
ns  
ns  
ns  
VCC = 4.5 V  
VCC = 6.0 V  
17  
4
21  
26  
[2]  
nQ HIGH and nQ LOW;  
VCC = 5.0 V;  
see Figure 10 and Figure 11  
CEXT = 100 nF; REXT = 10  
k  
-
-
450  
75  
-
-
-
-
-
-
-
-
-
-
s  
CEXT = 0 pF; REXT = 5 k  
ns  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
8 of 23  
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.  
Symbol Parameter Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
[3][4]  
trtrig  
retrigger  
time  
nA, nB; CEXT = 0 pF; REXT  
5 k; VCC = 5.0 V;  
see Figure 10  
=
-
110  
-
-
-
-
-
ns  
REXT  
external  
see Figure 7  
resistance  
VCC = 2.0 V  
10  
2
-
-
-
1000  
1000  
-
-
-
-
-
-
-
-
-
-
-
-
-
k  
k  
pF  
VCC = 5.0 V  
[4]  
[5]  
CEXT  
CPD  
external  
capacitance  
VCC = 5.0 V; see Figure 7  
-
power  
per monostable; VI = GND  
-
54  
-
-
-
-
-
pF  
dissipation to VCC  
capacitance  
74HCT123-Q100  
tPHL  
HIGH to  
LOW  
nRD, nA, nB to nQ or nQ;  
CEXT = 0 pF; REXT = 5 k;  
propagation see Figure 9  
delay  
VCC = 4.5 V  
-
-
30  
26  
51  
-
-
-
64  
-
-
-
77  
-
ns  
ns  
VCC = 5 V; CL = 15 pF  
nRD (reset) to nQ or nQ;  
CEXT = 0 pF; REXT = 5 k;  
see Figure 9  
VCC = 4.5 V  
-
-
27  
23  
46  
-
-
-
58  
-
-
-
69  
-
ns  
ns  
VCC = 5 V; CL = 15 pF  
tPLH  
LOW to  
HIGH  
nRD, nA, nB to nQ or nQ;  
CEXT = 0 pF; REXT = 5 k;  
propagation see Figure 9  
delay  
VCC = 4.5 V  
-
-
28  
26  
51  
-
-
-
64  
-
-
-
77  
-
ns  
ns  
VCC = 5 V; CL = 15 pF  
nRD (reset) to nQ or nQ;  
CEXT = 0 pF; REXT = 5 k;  
see Figure 9  
VCC = 4.5 V  
-
-
-
23  
23  
7
46  
-
-
-
-
58  
-
-
-
-
69  
-
ns  
ns  
ns  
VCC = 5 V; CL = 15 pF  
VCC = 4.5 V; see Figure 9  
[1]  
tt  
transition  
time  
15  
19  
22  
tW  
pulse width VCC = 4.5 V  
nA LOW; see Figure 10  
20  
20  
20  
3
5
7
-
-
-
25  
25  
25  
-
-
-
30  
30  
30  
-
-
-
ns  
ns  
ns  
nB HIGH; see Figure 10  
nRD LOW; see Figure 11  
nQ HIGH and nQ LOW;  
[2]  
VCC = 5.0 V; see Figure 10  
and Figure 11  
CEXT = 100 nF; REXT = 10  
k  
-
-
450  
75  
-
-
-
-
-
-
-
-
-
-
s  
CEXT = 0 pF; REXT = 5 k  
ns  
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
9 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
Table 7.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12.  
Symbol Parameter Conditions  
25 C  
40 C to +85 C 40 C to +125 C Unit  
Min Typ Max  
Min  
Max  
Min  
Max  
[3][4]  
trtrig  
retrigger  
time  
nA, nB; CEXT = 0 pF; REXT  
5 k; VCC = 5.0 V;  
see Figure 10  
=
-
2
-
110  
-
-
-
-
-
ns  
REXT  
CEXT  
CPD  
external  
timing  
resistor  
VCC = 5.0 V; see Figure 7  
VCC = 5.0 V; see Figure 7  
per monostable; VI = GND  
-
1000  
-
-
-
-
-
-
-
-
-
-
-
-
k  
pF  
pF  
[4]  
[5]  
external  
timing  
capacitor  
-
-
-
power  
-
56  
dissipation to VCC  
capacitance  
[1] tpd is the same as tPHL and tPLH; tt is the same as tTHL and tTLH  
[2] For other REXT and CEXT combinations, see Figure 7. If CEXT > 10 nF, the following formula is valid.  
tW = K REXT CEXT, where:  
tW = typical output pulse width in ns;  
REXT = external resistor in k;  
CEXT = external capacitor in pF;  
K = constant = 0.45 for VCC = 5.0 V and 0.55 for VCC = 2.0 V.  
The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is approximately 7 pF.  
[3] The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width is only extended  
when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time. If CEXT >10 pF, the next  
formula (at VCC = 5.0 V) for the setup time of a retrigger pulse is valid:  
trtrig = 30 + 0.19 REXT CEXT0.9 + 13 REXT1.05, where:  
trtrig = retrigger time in ns;  
CEXT = external capacitor in pF; REXT = external resistor in k.  
The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF.  
[4] When the device is powered-up, initiate the device via a reset pulse, when CEXT < 50 pF.  
[5] CPD is used to determine the dynamic power dissipation (PD in W).  
PD = CPD VCC2 fi + (CL VCC2 fo) + 0.75 CEXT VCC2 fo + D 16 VCC where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
D = duty factor in %;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
CEXT = timing capacitance in pF;  
(CL VCC2 fo) sum of outputs.  
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
10 of 23  
 
 
 
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NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
001aaa611  
001aaa612  
6
10  
0.8  
t
W
'K' factor  
(ns)  
(1)  
(2)  
5
4
3
2
10  
0.6  
0.4  
0.2  
0
(3)  
(4)  
10  
10  
10  
10  
2
3
4
1
10  
10  
10  
10  
(pF)  
0
2
4
6
8
C
V
(V)  
CC  
EXT  
VCC = 5.0 V; Tamb = 25 C.  
EXT = 100 k  
CEXT = 10 nF; REXT = 10 kto 100 k.  
amb = 25 C.  
(1)  
R
T
(2) REXT = 50 k  
(3) REXT = 10 k  
(4)  
REXT = 2 k  
Fig 7. Typical output pulse width as a function of the  
external capacitor value  
Fig 8. 74HC123-Q100 typical ‘K’ factor as function of  
VCC  
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
11 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
11. Waveforms  
V
I
V
nB input  
GND  
M
t
W
V
I
V
M
nA input  
GND  
t
W
V
I
V
nRD input  
GND  
M
t
t
t
W
PLH  
PLH  
V
OH  
V
Y
nQ output  
V
M
V
X
V
OL  
t
t
t
PLH  
THL  
PHL  
t
(reset)  
W
t
W
V
OH  
V
Y
nQ output  
V
M
V
X
V
OL  
t
t
t
t
t
PHL  
PHL  
PLH  
PHL  
001aaa771  
TLH  
(reset)  
Measurement points are given in Table 8.  
VOL and VOH are typical voltage output levels that occur with the output load.  
Fig 9. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) and output transition times  
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
12 of 23  
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
nB input  
nA input  
t
W
t
t
rtrig  
W
nQ output  
t
t
W
W
t
mna521  
W
nRD = HIGH  
Fig 10. Output pulse control using retrigger pulse  
nB input  
nRD input  
t
W
nQ output  
t
t
W
W
mna522  
nA = LOW  
Fig 11. Output pulse control using reset input nRD  
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
13 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
CC  
V
CC  
V
V
O
I
R
L
S1  
G
open  
DUT  
R
T
C
L
001aad983  
Test data is given in Table 8.  
Definitions test circuit:  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
CL = Load capacitance including jig and probe capacitance.  
RL = Load resistance.  
S1 = Test selection switch.  
Fig 12. Test circuit for measuring switching times  
Table 8.  
Type  
Test data  
Input  
VI  
Load  
S1 position  
tPHL, tPLH  
open  
tr, tf  
6 ns  
6 ns  
CL  
RL  
74HC123-Q100  
74HCT123-Q100  
VCC  
3 V  
15 pF, 50 pF  
15 pF, 50 pF  
1 k  
1 k  
open  
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
14 of 23  
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
12. Application information  
12.1 Timing component connections  
The basic output pulse width is defined by the values of the external timing components  
EXT and CEXT  
R
.
C
EXT  
R
EXT  
(1)  
V
CC  
GND  
8
nCEXT nREXT/CEXT  
14 (6) 15 (7)  
13 (5)  
123  
nQ  
nQ  
1 (9)  
nA  
nB  
2 (10)  
4 (12)  
3 (11)  
nRD  
001aaa854  
(1) For minimum noise generation, ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND).  
Fig 13. Timing component connections  
12.2 Power-up considerations  
When the monostable is powered-up, it may produce an output pulse, with a pulse width  
defined by the values of REXT and CEXT. This output pulse can be eliminated using the  
circuit shown in Figure 14.  
C
EXT  
R
EXT  
V
CC  
GND  
8
nCEXT  
14 (6)  
nREXT/CEXT  
15 (7)  
13 (5)  
123  
nQ  
1 (9)  
nA  
nB  
2 (10)  
4 (12)  
nQ  
3 (11)  
nRD  
V
RESET  
CC  
001aaa613  
Fig 14. Power-up output pulse elimination circuit  
74HC_HCT123_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
15 of 23  
 
 
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
12.3 Power-down considerations  
A large capacitor CEXT may cause problems when powering-down the monostable due to  
the energy stored in this capacitor. When a system containing this device is  
powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain  
damage. The damage is due to the capacitor discharging through the input protection  
diodes. To avoid this possibility, use a damping diode (DEXT) and connect as shown in  
Figure 15. DEXT is preferably a germanium or Schottky type diode able to withstand large  
current surges.  
D
EXT  
C
EXT  
R
EXT  
V
CC  
GND  
8
nCEXT  
14 (6)  
nREXT/CEXT  
15 (7)  
13 (5)  
123  
nQ  
1 (9)  
nA  
nB  
2 (10)  
4 (12)  
nQ  
3 (11)  
001aaa614  
nRD  
Fig 15. Power-down protection circuit  
74HC_HCT123_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
16 of 23  
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
13. Package outline  
SO16: plastic small outline package; 16 leads; body width 3.9 mm  
SOT109-1  
D
E
A
X
v
c
y
H
M
A
E
Z
16  
9
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
8
e
w
M
detail X  
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
10.0  
9.8  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.27  
0.05  
1.05  
0.041  
1.75  
0.25  
0.01  
0.25  
0.01  
0.25  
0.1  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.39  
0.014 0.0075 0.38  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.020  
0.028  
0.012  
inches  
0.069  
0.01 0.004  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT109-1  
076E07  
MS-012  
Fig 16. Package outline SOT109-1 (SO16)  
74HC_HCT123_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
17 of 23  
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm  
SOT403-1  
D
E
A
X
c
y
H
v
M
A
E
Z
9
16  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
8
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.40  
0.06  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT403-1  
MO-153  
Fig 17. Package outline SOT403-1 (TSSOP16)  
74HC_HCT123_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
18 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
16 terminals; body 2.5 x 3.5 x 0.85 mm  
SOT763-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16  
15  
10  
D
h
X
0
2.5  
scale  
5 mm  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
1
h
h
max.  
0.05 0.30  
0.00 0.18  
3.6  
3.4  
2.15  
1.85  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2.5  
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT763-1  
- - -  
MO-241  
- - -  
Fig 18. Package outline SOT763-1 (DHVQFN16)  
74HC_HCT123_Q100  
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© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
19 of 23  
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
14. Abbreviations  
Table 9.  
Acronym  
CMOS  
DUT  
Abbreviations  
Abbreviation  
Complementary Metal Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
LSTTL  
MM  
Low-power Schottky Transistor-Transistor Logic  
Machine Model  
MIL  
Military  
15. Revision history  
Table 10. Revision history  
Document ID  
Release date  
Data sheet status  
Change notice  
Supersedes  
74HC_HCT123_Q100 v.1 20120801  
Product data sheet  
-
-
74HC_HCT123_Q100  
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Product data sheet  
Rev. 1 — 1 August 2012  
20 of 23  
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
16. Legal information  
16.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use in automotive applications — This NXP  
16.2 Definitions  
Semiconductors product has been qualified for use in automotive  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
16.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
21 of 23  
 
 
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
16.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
17. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74HC_HCT123_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 1 August 2012  
22 of 23  
 
 
74HC123-Q100; 74HCT123-Q100  
NXP Semiconductors  
Dual retriggerable monostable multivibrator with reset  
18. Contents  
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4  
6
Functional description . . . . . . . . . . . . . . . . . . . 5  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Recommended operating conditions. . . . . . . . 6  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
7
8
9
10  
11  
12  
Application information. . . . . . . . . . . . . . . . . . 15  
Timing component connections . . . . . . . . . . . 15  
Power-up considerations . . . . . . . . . . . . . . . . 15  
Power-down considerations . . . . . . . . . . . . . . 16  
12.1  
12.2  
12.3  
13  
14  
15  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 20  
16  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 21  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 21  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
16.1  
16.2  
16.3  
16.4  
17  
18  
Contact information. . . . . . . . . . . . . . . . . . . . . 22  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 1 August 2012  
Document identifier: 74HC_HCT123_Q100  
 

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