74HCT126DB,118 [NXP]
74HC(T)126 - Quad buffer/line driver; 3-state SSOP1 14-Pin;
| 型号： | 74HCT126DB,118 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)126 - Quad buffer/line driver; 3-state SSOP1 14-Pin 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总6页 (文件大小：38K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT126
Quad buffer/line driver; 3-state
December 1990
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
74HC/HCT126
FEATURES
• Output capability: bus driver
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT126 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The HC/HCT126 are four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by
the output enable input (nOE). A LOW at nOE causes the outputs to assume a HIGH impedance OFF-state.
The “126” is identical to the “125” but has active HIGH enable inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
ns
HC
HCT
tPHL/ tPLH
CI
propagation delay nA to nY
input capacitance
CL = 15 pF; VCC = 5 V
9
11
3.5
23
3.5
24
pF
pF
CPD
power dissipation capacitance per buffer
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
∑ (CL × VCC2 × fo) = sum of outputs
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
December 1990
2
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
74HC/HCT126
PIN DESCRIPTION
PIN NO.
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
SYMBOL
1OE to 4OE
1A to 4A
1Y to 4Y
GND
NAME AND FUNCTION
output enable inputs (active HIGH)
data inputs
data outputs
ground (0 V)
14
VCC
positive supply voltage
(b)
(a)
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
FUNCTION TABLE
INPUTS
OUTPUT
nY
nOE
nA
H
H
L
L
H
X
L
H
Z
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high impedance OFF-state
Fig.5 Logic diagram (one buffer).
Fig.4 Functional diagram.
December 1990
3
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
74HC/HCT126
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA to nY
30
11
9
100
20
125
25
150
30
ns
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
Fig.6
Fig.7
Fig.7
Fig.6
17
21
26
t
t
t
PZH/ tPZL 3-state output
enable time
41
15
12
41
15
12
14
5
125
25
155
31
190
38
ns
ns
ns
nOE to nY
21
26
32
PHZ/ tPLZ 3-state output
disable time
125
25
155
31
190
38
nOE to nY
21
26
32
THL/ tTLH output transition
time
60
75
90
12
15
18
4
10
13
15
December 1990
4
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
74HC/HCT126
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: bus driver
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per unit, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
nA, nOE
1.00
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85
−40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
nA to nY
14
13
24
25
30
31
36
38
ns
4.5
4.5
Fig.6
Fig.7
t
t
t
PZH/ tPZL 3-state output
enable time
ns
ns
ns
nOE to nY
PHZ/ tPLZ 3-state output
disable time
18
5
28
12
35
15
42
18
4.5
4.5
Fig.7
Fig.6
nOE to nY
THL/ tTLH output transition
time
December 1990
5
Philips Semiconductors
Product specification
Quad buffer/line driver; 3-state
74HC/HCT126
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6 Waveforms showing the input (nA) to output (nY) propagation delays and the output transition times.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
December 1990
6
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