74HCT1G14GV-Q100H [NXP]

74HC(T)1G14-Q100 - Inverting Schmitt trigger TSOP 5-Pin;
74HCT1G14GV-Q100H
型号: 74HCT1G14GV-Q100H
厂家: NXP    NXP
描述:

74HC(T)1G14-Q100 - Inverting Schmitt trigger TSOP 5-Pin

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74HC1G14-Q100; 74HCT1G14-Q100  
Inverting Schmitt trigger  
Rev. 2 — 27 December 2012  
Product data sheet  
1. General description  
74HC1G14-Q100 and 74HCT1G14-Q100 are high-speed Si-gate CMOS devices. They  
provide an inverting buffer function with Schmitt trigger action. These devices are capable  
of transforming slowly changing input signals into sharply defined, jitter-free output  
signals.  
The HC device has CMOS input switching levels and supply voltage range 2 V to 6 V.  
The HCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V.  
The standard output currents are half of those of the 74HC14-Q100 and 74HCT14-Q100.  
This product has been qualified to the Automotive Electronics Council (AEC) standard  
Q100 (Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from 40 C to +85 C and from 40 C to +125 C  
Input levels:  
For 74HC1G14-Q100: CMOS level  
For 74HCT1G14-Q100: TTL level  
Symmetrical output impedance  
High noise immunity  
Low power dissipation  
Balanced propagation delays  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )  
SOT353-1 and SOT753 package options  
3. Applications  
Wave and pulse shapers  
Astable multivibrators  
Monostable multivibrators  
 
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
4. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC1G14GW-Q100  
74HCT1G14GW-Q100  
74HC1G14GV-Q100  
74HCT1G14GV-Q100  
40 C to +125 C  
TSSOP5  
plastic thin shrink small outline package;  
5 leads; body width 1.25 mm  
SOT353-1  
40 C to +125 C  
SC-74A  
plastic surface-mounted package; 5 leads  
SOT753  
5. Marking  
Table 2.  
Marking codes  
Type number  
Marking code[1]  
74HC1G14GW-Q100  
74HCT1G14GW-Q100  
74HC1G14GV-Q100  
74HCT1G14GV-Q100  
HF  
TF  
H14  
T14  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
6. Functional diagram  
A
Y
4
2
A
Y
2
4
mna023  
mna024  
mna025  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
Fig 3. Logic diagram  
7. Pinning information  
7.1 Pinning  
ꢀꢁꢂꢃꢄꢅꢄꢁꢆꢇꢄꢈꢈ  
ꢀꢁꢂꢃꢉꢄꢅꢄꢁꢆꢇꢄꢈꢈ  
ꢀꢁꢂꢁ  
ꢄꢄ  
ꢆꢇꢈ  
ꢀꢀꢀꢁꢂꢂꢃꢄꢅꢄ  
Fig 4. Pin configuration  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
2 of 16  
 
 
 
 
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
7.2 Pin description  
Table 3.  
Symbol  
n.c.  
Pin description  
Pin  
Description  
not connected  
data input  
1
2
3
4
5
A
GND  
Y
ground (0 V)  
data output  
VCC  
supply voltage  
8. Functional description  
Table 4.  
Function table  
H = HIGH voltage level; L = LOW voltage level  
Input  
Output  
A
L
Y
H
L
H
9. Limiting values  
Table 5.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). [1]  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
Max  
+7.0  
20  
20  
12.5  
25  
Unit  
V
supply voltage  
0.5  
input clamping current  
output clamping current  
output current  
VI < 0.5 V or VI > VCC + 0.5 V  
VO < 0.5 V or VO > VCC + 0.5 V  
0.5 V < VO < VCC + 0.5 V  
-
mA  
mA  
mA  
mA  
mA  
C  
IOK  
-
IO  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
25  
65  
-
-
storage temperature  
total power dissipation  
+150  
200  
[2]  
Tamb = 40 C to +125 C  
mW  
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] Above 55 C, the value of Ptot derates linearly with 2.5 mW/K.  
10. Recommended operating conditions  
Table 6.  
Recommended operating conditions  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter Conditions  
74HC1G14-Q100  
74HCT1G14-Q100  
Unit  
Min  
2.0  
Typ  
Max  
6.0  
Min  
4.5  
Typ  
Max  
5.5  
VCC  
supply voltage  
5.0  
5.0  
V
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
3 of 16  
 
 
 
 
 
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
Table 6.  
Recommended operating conditions …continued  
Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter Conditions  
74HC1G14-Q100  
74HCT1G14-Q100  
Unit  
Min  
Typ  
Max  
Min  
Typ  
Max  
VI  
input voltage  
0
0
-
-
VCC  
VCC  
0
0
-
-
VCC  
VCC  
V
V
VO  
output voltage  
Tamb  
ambient temperature  
40  
+25  
+125  
40  
+25  
+125 C  
11. Static characteristics  
Table 7.  
Static characteristics  
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C.  
Symbol  
Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min  
Typ  
Max  
Min  
Max  
For type 74HC1G14-Q100  
VOH  
HIGH-level output  
voltage  
VI = VT+ or VT  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 2.0 mA; VCC = 4.5 V  
IO = 2.6 mA; VCC = 6.0 V  
VI = VT+ or VT  
1.9  
4.4  
2.0  
4.5  
-
-
-
-
-
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
V
V
V
V
V
5.9  
6.0  
4.13  
5.63  
4.32  
5.81  
VOL  
LOW-level output  
voltage  
IO = 20 A; VCC = 2.0 V  
IO = 20 A; VCC = 4.5 V  
IO = 20 A; VCC = 6.0 V  
IO = 2.0 mA; VCC = 4.5 V  
IO = 2.6 mA; VCC = 6.0 V  
-
-
-
-
-
-
-
0
0.1  
0.1  
-
-
-
-
-
-
-
0.1  
0.1  
0.1  
0.4  
0.4  
1.0  
20  
V
0
V
0
0.15  
0.16  
-
0.1  
V
0.33  
0.33  
1.0  
V
V
II  
input leakage current VI = VCC or GND; VCC = 6.0 V  
A  
A  
ICC  
supply current  
VI = VCC or GND; IO = 0 A;  
VCC = 6.0 V  
-
10  
CI  
input capacitance  
-
1.5  
-
-
-
pF  
VT+  
positive-going  
threshold voltage  
see Figure 7 and 8  
VCC = 2.0 V  
0.7  
1.7  
2.1  
1.09  
2.36  
3.12  
1.5  
3.15  
4.2  
0.7  
1.7  
2.1  
1.5  
3.15  
4.2  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
VT  
negative-going  
threshold voltage  
see Figure 7 and 8  
VCC = 2.0 V  
0.3  
0.9  
1.2  
0.60  
1.53  
2.08  
0.9  
2.0  
2.6  
0.3  
0.9  
1.2  
0.9  
2.0  
2.6  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
VH  
hysteresis voltage  
see Figure 7 and 8  
VCC = 2.0 V  
0.2  
0.4  
0.6  
0.48  
0.83  
1.04  
1.0  
1.4  
1.6  
0.2  
0.4  
0.6  
1.0  
1.4  
1.6  
V
V
V
VCC = 4.5 V  
VCC = 6.0 V  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
4 of 16  
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
Table 7.  
Static characteristics …continued  
Voltages are referenced to GND (ground = 0 V). All typical values are measured at Tamb = 25 C.  
Symbol  
Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min  
Typ  
Max  
Min  
Max  
For type 74HCT1G14-Q100  
VOH  
HIGH-level output  
voltage  
VI = VT+ or VT  
IO = 20 A; VCC = 4.5 V  
IO = 2.0 mA; VCC = 4.5 V  
VI = VT+ or VT  
4.4  
4.5  
-
-
4.4  
3.7  
-
-
V
V
4.13  
4.32  
VOL  
LOW-level output  
voltage  
IO = 20 A; VCC = 4.5 V  
IO = 2.0 mA; VCC = 4.5 V  
-
-
-
-
0
0.1  
0.33  
1.0  
10  
-
-
-
-
0.1  
0.4  
1.0  
20  
V
0.15  
V
II  
input leakage current VI = VCC or GND; VCC = 5.5 V  
-
-
A  
A  
ICC  
supply current  
VI = VCC or GND; IO = 0 A;  
VCC = 5.5 V  
ICC  
additional supply  
current  
per input; VCC = 4.5 V to 5.5 V;  
VI = VCC 2.1 V; IO = 0 A  
-
-
-
500  
-
-
-
850  
-
A  
CI  
input capacitance  
1.5  
pF  
VT+  
positive-going  
threshold voltage  
see Figure 7 and 8  
VCC = 4.5 V  
1.2  
1.4  
1.55  
1.80  
1.9  
2.1  
1.2  
1.4  
1.9  
2.1  
V
V
VCC = 5.5 V  
VT  
negative-going  
threshold voltage  
see Figure 7 and 8  
VCC = 4.5 V  
0.5  
0.6  
0.76  
0.90  
1.2  
1.4  
0.5  
0.6  
1.2  
1.4  
V
V
VCC = 5.5 V  
VH  
hysteresis voltage  
see Figure 7 and 8  
VCC = 4.5 V  
0.4  
0.4  
0.80  
0.90  
-
-
0.4  
0.4  
-
-
V
V
VCC = 5.5 V  
12. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
GND = 0 V; tr = tf 6.0 ns; All typical values are measured at Tamb = 25 C. For test circuit see Figure 6  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min  
Typ  
Max  
Min  
Max  
For type 74HC1G14-Q100  
[1]  
tpd  
propagation delay A to Y; see Figure 5  
VCC = 2.0 V; CL = 50 pF  
-
-
-
-
-
25  
12  
10  
11  
20  
155  
31  
-
-
-
-
-
-
190  
38  
-
ns  
ns  
ns  
ns  
pF  
VCC = 4.5 V; CL = 50 pF  
VCC = 5.0 V; CL = 15 pF  
VCC = 6.0 V; CL = 50 pF  
26  
-
32  
-
[2]  
CPD  
power dissipation VI = GND to VCC  
capacitance  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
5 of 16  
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
Table 8.  
Dynamic characteristics …continued  
GND = 0 V; tr = tf 6.0 ns; All typical values are measured at Tamb = 25 C. For test circuit see Figure 6  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C Unit  
Min  
Typ  
Max  
Min  
Max  
For type 74HCT1G14-Q100  
[1]  
[2]  
tpd  
propagation delay A to Y; see Figure 5  
VCC = 4.5 V; CL = 50 pF  
-
-
-
17  
15  
22  
43  
-
-
-
-
51  
-
ns  
ns  
pF  
VCC = 5.0 V; CL = 15 pF  
CPD  
power dissipation VI = GND to VCC 1.5 V  
-
-
capacitance  
[1] tpd is the same as tPLH and tPHL  
.
[2] PD is used to determine the dynamic power dissipation PD (W).  
C
PD = CPD VCC2 fi + (CL VCC2 fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz  
CL = output load capacitance in pF; VCC = supply voltage in Volts  
(CL VCC2 fo) = sum of outputs  
13. Waveforms  
V
A input  
M
t
t
PHL  
PLH  
Y output  
V
M
mna033  
Measurement points are given in Table 9.  
Fig 5. The input (A) to output (Y) propagation delays  
Table 9. Measurement points  
Type number  
Input  
Output  
VI  
VM  
VM  
74HC1G14-Q100  
74HCT1G14-Q100  
GND to VCC  
GND to 3.0 V  
0.5 VCC  
0.5 VCC  
0.5 VCC  
1.5 V  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
6 of 16  
 
 
 
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
V
CC  
V
V
O
I
PULSE  
GENERATOR  
DUT  
C
50 pF  
L
R
T
mna034  
Test data is given in Table 8. Definitions for test circuit:  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
Fig 6. Load circuitry for switching times  
14. Transfer characteristics waveforms  
V
O
V
T+  
V
V
I
H
V
T  
V
O
V
V
I
H
mna027  
V
V
T+  
T  
mna026  
Fig 7. Transfer characteristic  
Fig 8. The definitions of VT+, VTand VH; where VT+  
and VTare between limits of 20 % and 70 %  
mna029  
mna028  
1.0  
100  
I
CC  
(mA)  
I
CC  
(μA)  
0.8  
0.6  
0.4  
0.2  
0
50  
0
0
2.5  
5.0  
0
1.0  
2.0  
V (V)  
I
V (V)  
I
Fig 9. Typical 74HC1G14-Q100 transfer  
characteristics; VCC = 2.0 V  
Fig 10. Typical 74HC1G14-Q100 transfer  
characteristics; VCC = 4.5 V  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
7 of 16  
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
mna030  
1.6  
I
CC  
(mA)  
0.8  
0
0
3.0  
6.0  
V (V)  
I
Fig 11. Typical 74HC1G14-Q100 transfer characteristics; VCC = 6.0 V  
mna031  
mna032  
2.0  
3.0  
I
CC  
I
CC  
(mA)  
(mA)  
2.0  
1.0  
1.0  
0
0
0
2.5  
5.0  
0
3.0  
6.0  
V (V)  
I
V (V)  
I
Fig 12. Typical 74HCT1G14-Q100 transfer  
characteristics; VCC = 4.5 V  
Fig 13. Typical 74HCT1G14-Q100 transfer  
characteristics; VCC = 5.5 V  
15. Application information  
The slow input rise and fall times cause additional power dissipation. The additional power  
dissipation can be calculated using the following formula:  
Padd = fi (tr  ICC(AV) + tf  ICC(AV)) VCC  
Where:  
Padd = additional power dissipation (W)  
fi = input frequency (MHz)  
tr = rise time (ns); 10 % to 90 %  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
8 of 16  
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
tf = fall time (ns); 90 % to 10 %  
ICC(AV) = average additional supply current (A)  
ICC(AV) differs with positive or negative input transitions, as shown in Figure 14 and 15.  
74HC1G14-Q100 and 74HCT1G14-Q100 used in relaxation oscillator circuit,  
see Figure 16.  
Remark: All values given are typical unless otherwise specified.  
mna058  
mna036  
200  
200  
ΔI  
ΔI  
CC(AV)  
(μA)  
CC(AV)  
(μA)  
150  
100  
50  
150  
100  
50  
positive-going  
edge  
positive-going  
edge  
negative-going  
edge  
negative-going  
edge  
0
0
0
2.0  
4.0  
6.0  
0
2
4
6
V
(V)  
CC  
V
(V)  
CC  
Fig 14. ICC(AV) for 74HC1G14-Q100 devices; linear  
change of VI between 0.1 VCC to 0.9 VCC  
Fig 15. ICC(AV) for 74HCT1G14-Q100 devices; linear  
change of VI between 0.1 VCC to 0.9 VCC  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
9 of 16  
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
R
C
mna035  
1
T
1
-- -----------------  
For 74HC1G14-Q100 and 74HCT1G14-Q100: f =  
K RC  
For K-factor, see Figure 17  
Fig 16. Relaxation oscillator  
ꢀꢀꢀꢁꢂꢂꢃꢄꢂꢆ  
ꢀꢀꢀꢁꢂꢂꢃꢄꢇꢂ  
ꢋꢁꢓ  
ꢊꢁꢋ  
ꢊꢁꢓ  
ꢓꢁꢕ  
ꢓꢁꢒ  
ꢓꢁꢎ  
ꢓꢁꢋ  
ꢊꢁꢍ  
ꢊꢁꢓ  
ꢓꢁꢍ  
ꢎꢁꢍ  
ꢍꢁꢓ  
ꢍꢁꢍ  
ꢏꢐꢃꢑ  
ꢄꢄ  
ꢏꢐꢃꢑ  
ꢄꢄ  
K-factor for 74HC1G14-Q100  
K-factor for 74HCT1G14-Q100  
Fig 17. Typical K-factor for relaxation oscillator  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
10 of 16  
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
16. Package outline  
TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm  
SOT353-1  
D
E
A
X
c
y
H
v
M
A
E
Z
5
4
A
2
A
(A )  
3
A
1
θ
L
L
p
1
3
e
w M  
b
p
detail X  
e
1
0
1.5  
3 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
A
A
A
b
c
D
E
e
e
1
H
L
L
p
UNIT  
v
w
y
Z
θ
1
2
3
p
E
max.  
0.1  
0
1.0  
0.8  
0.30  
0.15  
0.25  
0.08  
2.25  
1.85  
1.35  
1.15  
2.25  
2.0  
0.46  
0.21  
0.60  
0.15  
7°  
0°  
mm  
1.1  
0.65  
1.3  
0.15  
0.425  
0.3  
0.1  
0.1  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
00-09-01  
03-02-19  
SOT353-1  
MO-203  
SC-88A  
Fig 18. Package outline SOT353-1 (TSSOP5)  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
11 of 16  
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
Plastic surface-mounted package; 5 leads  
SOT753  
D
B
E
A
X
y
H
v
M
A
E
5
4
Q
A
A
1
c
L
1
2
3
p
detail X  
e
b
p
w
M B  
0
1
2 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
UNIT  
A
A
b
c
D
E
e
H
L
Q
v
w
y
p
1
p
E
0.100  
0.013  
0.40  
0.25  
1.1  
0.9  
0.26  
0.10  
3.1  
2.7  
1.7  
1.3  
3.0  
2.5  
0.6  
0.2  
0.33  
0.23  
mm  
0.95  
0.2  
0.2  
0.1  
REFERENCES  
JEDEC JEITA  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
02-04-16  
06-03-16  
SOT753  
SC-74A  
Fig 19. Package outline SOT753 (SC-74A)  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
12 of 16  
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
17. Abbreviations  
Table 10. Abbreviations  
Acronym  
DUT  
Description  
Device Under Test  
Transistor-Transistor Logic  
TTL  
18. Revision history  
Table 11. Revision history  
Document ID  
Release date  
Data sheet status  
Change notice Supersedes  
- 74HC_HCT1G14_Q100 v.1  
74HC_HCT1G14_Q100 v.2 20121227  
Product data sheet  
Modifications:  
Table 3: Pin number Y output changed from 5 to 4 (errata).  
74HC_HCT1G14_Q100 v.1 20120820  
Product data sheet  
-
-
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
13 of 16  
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
19. Legal information  
19.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use in automotive applications — This NXP  
19.2 Definitions  
Semiconductors product has been qualified for use in automotive  
applications. Unless otherwise agreed in writing, the product is not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer's own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
19.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
14 of 16  
 
 
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
19.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
20. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74HC_HCT1G14_Q100  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 2 — 27 December 2012  
15 of 16  
 
 
74HC1G14-Q100; 74HCT1G14-Q100  
NXP Semiconductors  
Inverting Schmitt trigger  
21. Contents  
1
2
3
4
5
6
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
7
7.1  
7.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
8
Functional description . . . . . . . . . . . . . . . . . . . 3  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Recommended operating conditions. . . . . . . . 3  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 4  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Transfer characteristics waveforms. . . . . . . . . 7  
Application information. . . . . . . . . . . . . . . . . . . 8  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
19.1  
19.2  
19.3  
19.4  
20  
21  
Contact information. . . . . . . . . . . . . . . . . . . . . 15  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 27 December 2012  
Document identifier: 74HC_HCT1G14_Q100  
 

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