74HCT238DB,112 [NXP]
74HC(T)238 - 3-to-8 line decoder/demultiplexer SSOP1 16-Pin;
| 型号： | 74HCT238DB,112 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)238 - 3-to-8 line decoder/demultiplexer SSOP1 16-Pin 驱动 输入元件 光电二极管 逻辑集成电路 |
| 文件： | 总18页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC238; 74HCT238
3-to-8 line decoder/demultiplexer
Rev. 03 — 16 July 2007
Product data sheet
1. General description
74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible
with Low-Power Schottky TTL (LSTTL).
The 74HC238/74HCT238 decoders accept three binary weighted address inputs (A0, A1,
A2) and when enabled, provide 8 mutually exclusive active HIGH outputs (Y0 to Y7). The
74HC238/74HCT238 features three enable inputs: two active LOW (E1 and E2) and one
active HIGH (E3). Every output will be LOW unless E1 and E2 are LOW and E3 is HIGH.
This multiple enable function allows easy parallel expansion of the “238” to a 1-to-32 (5
lines to 32 lines) decoder with just four “238” ICs and one inverter. The “238” can be used
as an eight output demultiplexer by using one of the active LOW enable inputs as the data
input and the remaining enable inputs as strobes. Unused enable inputs must be
permanently tied to their appropriate active HIGH or LOW state.
The 74HC238/74HCT238 is similar to the 74HC138/74HCT138 but has non-inverting
outputs.
2. Features
I Demultiplexing capability
I Multiple input enable for easy expansion
I Ideal for memory chip select decoding
I Active HIGH mutually exclusive outputs
I Multiple package options
I Complies with JEDEC standard no. 7A
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
3. Ordering information
Table 1.
Type number Package
Temperature range Name
Ordering information
Description
Version
74HC238N
74HC238D
−40 °C to +125 °C
−40 °C to +125 °C
DIP16
SO16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HC238DB
−40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
SOT403-1
74HC238PW −40 °C to +125 °C
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74HC238BQ
−40 °C to +125 °C
DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1
quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
74HCT238N
74HCT238D
−40 °C to +125 °C
−40 °C to +125 °C
DIP16
SO16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT238DB −40 °C to +125 °C
74HCT238PW −40 °C to +125 °C
74HCT238BQ −40 °C to +125 °C
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
SOT403-1
TSSOP16
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
DHVQFN16 plastic dual in-line compatible thermal enhanced very thin SOT763-1
quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
4. Functional diagram
15
Y0
14
Y1
Y2
Y3
Y4
Y5
Y6
Y7
15
14
13
12
11
10
9
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
13
12
11
10
9
1
2
3
A0
A1
A2
3 TO 8
DECODER
ENABLE
EXITING
A0
A1
A2
1
2
3
3 TO 8
DECODER
ENABLE
EXITING
7
7
4
5
6
E1
E2
E3
4
5
6
E1
E2
E3
001aag753
001aag752
Fig 1. Logic symbol
Fig 2. Functional diagram
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
2 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
Y0
Y1
Y2
Y3
Y4
Y5
Y6
E1
E2
E3
A0
A1
A2
Y7
001aag754
Fig 3. Logic diagram
5. Pinning information
5.1 Pinning
74HC238
74HC238
74HCT238
74HCT238
terminal 1
index area
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A0
A1
V
CC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
2
3
4
5
6
7
15
14
13
12
11
10
A1
A2
E1
E2
E3
Y7
Y0
Y1
Y2
Y3
Y4
Y5
A2
E1
E2
(1)
GND
E3
Y7
001aag756
GND
001aag755
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
supply pin or input
Fig 4. Pin configuration DIP16, SO16, (T)SSOP16
Fig 5. Pin configuration DHVQFN16
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
3 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
5.2 Pin description
Table 2.
Symbol
A[0:2]
E1
Pin description
Pin
Description
1, 2, 3
address input
4
enable input (active LOW)
enable input (active LOW)
enable input (active HIGH)
output (active HIGH)
ground (0 V)
E2
5
E3
6
Y[0:7]
GND
VCC
15, 14, 13, 12, 11, 10, 9, 7
8
16
supply voltage
6. Functional description
Table 3.
Function table[1]
Inputs
Outputs
E1
H
X
X
L
E2
X
H
X
L
E3
X
A0
X
X
X
L
A1
X
X
X
L
A2
X
X
X
L
Y0
L
Y1
L
Y2
L
Y3
L
Y4
L
Y5
L
Y6
L
Y7
L
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
H
H
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
H
H
H
H
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
L
H
L
L
L
L
L
H
H
L
L
L
L
L
H
L
L
L
L
H
L
L
L
L
L
L
H
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
4 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7
Unit
V
supply voltage
−0.5
[1]
[1]
input clamping current
output clamping current
output current
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
−0.5 V < VO < VCC + 0.5 V
-
±20
±20
±25
50
mA
mA
mA
mA
mA
°C
IOK
-
IO
-
ICC
supply current
-
IGND
Tstg
Ptot
ground current
−50
-
storage temperature
total power dissipation
−65
+150
750
500
[2]
[3]
DIP16 package
-
-
mW
mW
SO16, SSOP16, TSSOP16 and
DHVQFN16 packages
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly at 12 mW/K.
[3] For SO16 packages: above 70 °C the value of Ptot derates linearly at 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60 °C the value of Ptot derates linearly at 5.5 mW/K.
For DHVQFN16 packages: above 60 °C the value of Ptot derates linearly at 4.5 mW/K.
8. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
74HC238
74HCT238
Unit
Min
Typ
Max
6.0
Min
Typ
Max
5.5
VCC
VI
supply voltage
input voltage
2.0
5.0
4.5
5.0
V
V
V
0
-
VCC
VCC
+125
625
139
83
0
-
VCC
VCC
VO
output voltage
ambient temperature
0
-
0
-
Tamb
∆t/∆V
−40
-
−40
-
+125 °C
input transition rise
and fall rate
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
1.67
-
-
-
-
-
1.67
-
-
139
-
ns/V
ns/V
ns/V
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
5 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
74HC238
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5 1.2
3.15 2.4
4.2 3.2
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15
3.15
VCC = 6.0 V
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.8
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
2.1 1.35
VCC = 6.0 V
2.8
1.8
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = −20 µA; VCC = 2.0 V
IO = −20 µA; VCC = 4.5 V
IO = −20 µA; VCC = 6.0 V
IO = −4.0 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
VI = VIH or VIL
1.9 2.0
4.4 4.5
5.9 6.0
3.98 4.32
5.48 5.81
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
5.9
3.84
5.34
VOL
LOW-level
output voltage
IO = 20 µA; VCC = 2.0 V
IO = 20 µA; VCC = 4.5 V
IO = 20 µA; VCC = 6.0 V
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
±1.0
V
V
0.1
V
0.15 0.26
0.16 0.26
0.33
0.33
±1.0
V
V
II
input leakage VI = VCC or GND;
current CC = 6.0 V
-
±0.1
8.0
-
µA
V
ICC
CI
supply current VI = VCC or GND; IO = 0 A;
CC = 6.0 V
-
-
-
-
-
80
-
-
-
160
-
µA
V
input
3.5
pF
capacitance
74HCT238
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0 1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
-
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −20 µA
4.4 4.5
-
-
4.4
-
-
4.4
3.7
-
-
V
V
IO = −4.0 mA
3.98 4.32
3.84
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 µA
-
-
-
0
0.1
-
-
-
0.1
-
-
-
0.1
0.4
V
IO = 4.0 mA
0.16 0.26
±0.1
0.33
±1.0
V
II
input leakage VI = VCC or GND;
current CC = 5.5 V
-
±1.0
µA
V
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
6 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ Max
Min
Max
Min
Max
ICC
supply current VI = VCC or GND;
CC = 5.5 V; IO = 0 A
-
-
8.0
-
80
-
160
µA
V
∆ICC
additional
per input pin;
supply current VI = VCC − 2.1 V;
other inputs at VCC or GND;
CC = 4.5 V to 5.5 V;
IO = 0 A
V
An inputs
-
-
-
-
70
40
252
144
-
-
-
-
315
180
653
-
-
-
-
-
343
196
711
-
µA
µA
µA
pF
E1, E2 inputs
E3 input
145 522
3.5
CI
input
-
capacitance
10. Dynamic characteristics
Table 7.
Dynamic characteristics
GND = 0 V; test circuit see Figure 8.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Max Max
(85 °C) (125 °C)
Min
Typ
Max
Unit
74HC238
[1]
tpd
propagation delay An to Yn; see Figure 6
VCC = 2.0 V
-
-
-
-
47
17
14
14
150
30
-
190
38
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
33
38
[1]
E3 to Yn; see Figure 6
VCC = 2.0 V
-
-
-
-
52
19
16
15
160
32
-
200
40
-
240
48
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
27
34
41
[1]
En to Yn or see Figure 7
VCC = 2.0 V
-
-
-
-
50
18
17
14
155
31
-
195
39
-
235
47
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
33
40
[2]
[3]
tt
transition time
see Figure 6 and Figure 7
VCC = 2.0 V
-
-
-
-
19
7
75
15
13
-
95
19
16
-
110
22
19
-
ns
ns
ns
pF
VCC = 4.5 V
VCC = 6.0 V
6
CPD
power dissipation per package; VI = GND to VCC
capacitance
72
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
7 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
Table 7.
Dynamic characteristics
GND = 0 V; test circuit see Figure 8.
Symbol Parameter
Conditions
25 °C
−40 °C to +125 °C
Max Max
(85 °C) (125 °C)
Min
Typ
Max
Unit
74HCT238
[1]
[1]
[1]
tpd
propagation delay An to Yn; see Figure 6
VCC = 4.5 V
-
-
19
18
35
-
44
-
53
-
ns
ns
VCC = 5.0 V; CL = 15 pF
E3 to Yn; see Figure 6
VCC = 4.5 V
-
-
20
20
37
-
46
-
56
-
ns
ns
VCC = 5.0 V; CL = 15 pF
En to Yn or see Figure 7
VCC = 4.5 V
-
-
-
20
21
7
35
-
44
-
53
-
ns
ns
ns
VCC = 5.0 V; CL = 15 pF
[2]
[3]
tt
transition time
VCC = 4.5 V;
15
19
22
see Figure 6 and Figure 7
CPD
power dissipation per package;
capacitance VI = GND to VCC − 1.5 V
-
76
-
-
-
pF
[1] tpd is the same as tPHL and tPLH
.
[2] tt is the same as tTHL and tTLH
.
[3] CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑ (CL × VCC2 × fo) = sum of outputs.
11. Waveforms
An, E3 input
Yn output
V
M
t
t
PLH
PHL
V
Y
V
M
V
X
t
t
TLH
THL
001aag757
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Input (An, E3) to output (Yn) propagation delays and output transition times
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
8 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
E1, E2 input
Yn output
V
M
t
t
PLH
PHL
V
Y
V
M
V
X
t
t
TLH
THL
001aag758
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. Input (E1, E2) to output (Yn) propagation delays and output transition times
Table 8.
Type
Measurement points
Input
VM
Output
VM
VX
VY
74HC238
0.5VCC
1.3 V
0.5VCC
1.3 V
0.1VCC
0.1VCC
0.9VCC
0.9VCC
74HCT238
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
9 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
V
O
I
R
L
S1
PULSE
GENERATOR
open
DUT
R
T
C
L
001aad983
Test data is given in Table 9.
Definitions for test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistance.
S1 = Test selection switch
Fig 8. Load circuit for measuring switching times
Table 9.
Type
Test data
Input
VI
Load
S1 position
tPHL, tPLH
open
tr, tf
6 ns
6 ns
CL
RL
74HC238
VCC
3 V
15 pF, 50 pF
15 pF, 50 pF
1 kΩ
1 kΩ
74HCT238
open
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
10 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
12. Package outline
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
0.76
0.068 0.021 0.049 0.014
0.051 0.015 0.033 0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.03
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
95-01-14
03-02-13
SOT38-4
Fig 9. Package outline SOT38-4 (DIP16)
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
11 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 10. Package outline SOT109-1 (SO16)
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
12 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig 11. Package outline SOT338-1 (SSOP16)
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
13 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 12. Package outline SOT403-1 (TSSOP16)
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
14 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
SOT763-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
7
L
1
8
9
E
h
e
16
15
10
D
h
X
0
2.5
scale
5 mm
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
y
D
D
E
L
v
w
y
1
1
h
1
h
max.
0.05 0.30
0.00 0.18
3.6
3.4
2.15
1.85
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2.5
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT763-1
- - -
MO-241
- - -
Fig 13. Package outline SOT763-1 (DHVQFN16)
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
15 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
13. Abbreviations
Table 10. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
HBM
MM
Machine Model
TTL
Transistor-Transistor Logic
14. Revision history
Table 11. Revision history
Document ID
74HC_HCT238_3
Modifications:
Release date
20070716
Data sheet status
Change notice Supersedes
Product data sheet
-
74HC_HCT238_CNV_2
• The format of this data sheet has been redesigned to comply with the new identity
guidelines of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Added type number 74HC238BQ and 74HCT238BQ (DHVQFN16 package)
74HC_HCT238_CNV_2
19970828
Product specification
-
-
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
16 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of a NXP Semiconductors product can reasonably be expected to
15.2 Definitions
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
16. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
74HC_HCT238_3
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 16 July 2007
17 of 18
74HC238; 74HCT238
NXP Semiconductors
3-to-8 line decoder/demultiplexer
17. Contents
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
Functional description . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 16
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 16
7
8
9
10
11
12
13
14
15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 17
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 17
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
15.1
15.2
15.3
15.4
16
17
Contact information. . . . . . . . . . . . . . . . . . . . . 17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 July 2007
Document identifier: 74HC_HCT238_3
相关型号：
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