74HCT257D,652 [NXP]
74HC(T)257 - Quad 2-input multiplexer; 3-state SOP 16-Pin;
| 型号： | 74HCT257D,652 |
| 厂家： | 
NXP |
| 描述： | 74HC(T)257 - Quad 2-input multiplexer; 3-state SOP 16-Pin 光电二极管 逻辑集成电路 |
| 文件： | 总17页 (文件大小：163K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74HC257; 74HCT257
Quad 2-input multiplexer; 3-state
Rev. 05 — 13 January 2010
Product data sheet
1. General description
The 74HC257; 74HCT257 are high-speed Si-gate CMOS devices and are pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC257 and 74HCT257 have four identical 2-input multiplexers with 3-state outputs,
which select 4 bits of data from two sources and are controlled by a common data select
input (S).
The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data
inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the
outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74HC257 and 74HCT257 are the logic implementation of a 4-pole, 2-position switch,
where the position of the switch is determined by the logic levels applied to S. The outputs
are forced to a high-impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
1Y = OE • (1I1 • S • 1I0 • S)
2Y = OE • (2I1 • S • 2I0 • S)
3Y = OE • (3I1 • S • 3I0 • S)
4Y = OE • (4I1 • S • 4I0 • S)
Except for their non-inverting (true) outputs the 74HC257; 74HCT257 are identical to the
74HC258.
2. Features
Non-inverting data path
3-state outputs interface directly with system bus
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from −40 °C to +85 °C and from −40 °C to +125 °C
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
3. Ordering information
Table 1.
Type number Package
Temperature range Name
Ordering information
Description
plastic dual in-line package; 16 leads (300 mil)
Version
74HC257N
−40 °C to +125 °C
−40 °C to +125 °C
−40 °C to +125 °C
DIP16
SOT38-4
74HCT257N
74HC257D
SO16
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
74HCT257D
74HC257DB
74HCT257DB
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
SOT403-1
74HC257PW −40 °C to +125 °C
TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
74HCT257PW
4. Functional diagram
1
G1
15
EN
1
S
2
1I0
2
MUX
1
1
4
7
1Y
4
1I1
3
5
3
2I0
2I1
5
6
2Y
3Y
4Y
7
6
3I0
3I1
11
10
9
11
10
14
13
9
4I0
4I1
14
13
12
12
15
OE
mga835
001aad467
Fig 1. Logic symbol
Fig 2. IEC logic symbol
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
2 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
2
3
5
6
11 10
3I0 3I1
14 13
4I0 4I1
1I0 1I1
2I0 2I1
1
S
SELECTOR
15 OE
3-STATE MULTIPLEXER OUTPUTS
1Y
4
2Y
7
3Y
9
4Y
12
mgr280
Fig 3. Functional diagram
1I0
1I1
2I0
2I1
1Y
2Y
3Y
4Y
3I0
3I1
4I0
4I1
OE
S
001aad468
Fig 4. Logic diagram
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
3 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
5. Pinning information
5.1 Pinning
74HC257
74HCT257
1
2
3
4
5
6
7
8
16 V
CC
S
1I0
15
14
13
12
11
10
9
OE
4I0
4I1
4Y
1I1
1Y
2I0
2I1
3I0
3I1
3Y
2Y
GND
001aad499
Fig 5. Pin configuration DIP16, SO16, SSOP16 and TSSOP16
5.2 Pin description
Table 2.
Symbol
S
Pin description
Pin
Description
1
common data select input
data input from source 0
data input from source 1
3-state multiplexer output
ground (0 V)
1I0 to 4I0
1I1 to 4I1
1Y to 4Y
GND
2, 5, 11, 14
3, 6, 10, 13
4, 7, 9, 12
8
OE
15
16
3-state output enable input (active LOW)
supply voltage
VCC
6. Functional description
6.1 Function table
Table 3.
Function table[1]
Control
Input
nl0
X
Output
OE
H
L
S
X
H
H
L
nl1
nY
Z
X
L
X
L
L
X
H
X
X
H
L
L
L
L
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
4 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
Parameter
Conditions
Min
−0.5
-
Max
+7
Unit
V
supply voltage
IIK
input clamping current
VI < −0.5 V or
±20
mA
VI > VCC + 0.5 V
IOK
output clamping current
VO < −0.5 V or
-
±20
mA
VO > VCC + 0.5 V
IO
output current
VO = −0.5 V to VCC + 0.5 V
-
±35
+70
−70
+150
mA
mA
mA
°C
ICC
IGND
Tstg
Ptot
supply current
-
ground current
-
storage temperature
total power dissipation
DIP16 package
−65
[1]
[2]
[3]
[3]
-
-
-
-
750
500
500
500
mW
mW
mW
mW
SO16 package
SSOP16 package
TSSOP16 package
[1] For DIP16 packages: above 70 °C, Ptot derates linearly with 12 mW/K.
[2] For SO16 packages: above 70 °C, Ptot derates linearly with 8 mW/K.
[3] For SSOP16 and TSSOP16 packages: above 60 °C, Ptot derates linearly with 5.5 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
Type 74HC257
VCC
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
Unit
supply voltage
input voltage
output voltage
2.0
5.0
6.0
V
VI
0
-
VCC
VCC
625
139
83
V
VO
0
-
V
Δt/ΔV
input transition rise and
fall rates
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
ns
ns
ns
°C
-
1.67
-
-
-
Tamb
ambient temperature
−40
+125
Type 74HCT257
VCC
VI
supply voltage
4.5
0
5.0
5.5
V
input voltage
-
VCC
VCC
139
V
VO
output voltage
0
-
V
Δt/ΔV
input transition rise and
fall rates
VCC = 4.5 V
-
1.67
ns
Tamb
ambient temperature
−40
-
+125
°C
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
5 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
9. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to
+85 °C
−40 °C to Unit
+125 °C
Min Typ Max Min Max Min Max
74HC257
VIH
HIGH-level
input voltage
VCC = 2.0 V
1.5
1.2
-
-
1.5
-
-
1.5
-
-
V
V
V
V
V
V
VCC = 4.5 V
3.15 2.4
3.15
3.15
VCC = 6.0 V
4.2
3.2
0.8
-
4.2
-
4.2
-
VIL
LOW-level
input voltage
VCC = 2.0 V
-
-
-
0.5
-
-
-
0.5
1.35
1.8
-
-
-
0.5
1.35
1.8
VCC = 4.5 V
2.1 1.35
VCC = 6.0 V
2.8
1.8
VOH
HIGH-level
VI = VIH or VIL
output voltage
IO = −20 μA; VCC = 2.0 V
IO = −20 μA; VCC = 4.5 V
IO = −20 μA; VCC = 6.0 V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
VI = VIH or VIL
1.9
4.4
5.9
2.0
4.5
6.0
-
-
-
-
-
1.9
4.4
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
5.9
3.98 4.32
5.48 5.81
3.84
5.34
VOL
LOW-level
output voltage
IO = 20 μA; VCC = 2.0 V
IO = 20 μA; VCC = 4.5 V
IO = 20 μA; VCC = 6.0 V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
-
-
-
-
-
-
-
0
0
0
0.1
0.1
0.1
-
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
V
V
V
V
V
0.1
0.15 0.26
0.16 0.26
0.33
0.33
II
input leakage current VI = VCC or GND; VCC = 6.0 V
-
-
±0.1
±0.5
±1.0 ±1.0 ±1.0 μA
±5.0 ±10.0 ±10.0 μA
IOZ
OFF-state
output current
VI = VIH or VIL;
VO = VCC or GND;
VCC = 6.0 V
ICC
Ci
supply current
VI = VCC or GND; IO = 0 A;
VCC = 6.0 V
-
-
-
8.0
-
-
80
160
160 μA
input capacitance
3.5
pF
74HCT257
VIH
HIGH-level
input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
2.0
-
-
2.0
-
-
V
V
VIL
LOW-level
0.8
0.8
0.8
input voltage
VOH
HIGH-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = −20 μA
4.4
4.5
-
-
4.4
-
4.4
-
-
V
V
IO = −6 mA
3.98 4.32
3.84
-
3.7
VOL
LOW-level
output voltage
VI = VIH or VIL; VCC = 4.5 V
IO = 20 μA
-
-
-
-
0.1
0.33
±1.0
±5.0
-
-
-
-
0.1
0.4
±1.0
-
-
-
0
0.1
V
V
IO = 6.0 mA
0.15 0.26
±0.1
II
input leakage current VI = VCC or GND; VCC = 5.5 V
-
±10 μA
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
6 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
Table 6.
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
25 °C
−40 °C to
+85 °C
−40 °C to Unit
+125 °C
Min Typ Max Min Max Min Max
IOZ
OFF-state
output current
VI = VIH or VIL; VCC = 5.5 V;
VO = VCC or GND per input
pin; other inputs at VCC or
GND; IO = 0 A
-
-
±0.5
-
80
-
160 μA
ICC
supply current
VI = VCC or GND; IO = 0 A;
-
-
8.0
μA
VCC = 5.5 V
ΔICC
additional supply
current
VI = VCC − 2.1 V;
other inputs at VCC or GND;
VCC = 4.5 V to 5.5 V; IO = 0 A
per input pin; nI0, nI1 inputs
per input pin; OE input
per input pin; S input
-
-
-
-
40
144
-
-
-
180
608
315
-
-
-
196 μA
662 μA
343 μA
pF
135 486
70
252
-
CI
input capacitance
3.5
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 8.
Symbol Parameter
Conditions
25 °C
−40 °C to −40 °C to Unit
+85 °C
+125 °C
Typ
Max
Max
Max
74HC257
[1]
tpd
propagation delay
nl0 to nY or nl1 to nY;
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
36
13
11
10
110
22
-
140
28
-
165
33
-
ns
ns
ns
ns
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
19
24
28
S to nY; see Figure 6
VCC = 2.0 V
47
17
14
14
150
30
-
190
38
-
225
45
-
ns
ns
ns
ns
VCC = 4.5 V
VCC = 5.0 V; CL = 15 pF
VCC = 6.0 V
26
33
38
[2]
[3]
ten
enable time
disable time
OE to nY; see Figure 7
VCC = 2.0 V
33
12
10
150
30
190
38
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
33
38
tdis
OE to nY; see Figure 7
VCC = 2.0 V
41
15
12
150
30
190
38
225
45
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
26
33
38
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
7 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); For test circuit see Figure 8.
Symbol Parameter
Conditions
25 °C
−40 °C to −40 °C to Unit
+85 °C
+125 °C
Typ
Max
Max
Max
[4]
tt
transition time
see Figure 6
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
14
5
60
12
10
-
75
15
13
90
18
15
ns
ns
ns
pF
4
[5]
[1]
CPD
power dissipation
capacitance
per multiplexer;
VI = GND to VCC
45
74HCT257
tpd
propagation delay
nl0 to nY or nl1 to nY;
see Figure 6
VCC = 4.5 V
16
13
30
-
38
-
45
53
ns
ns
VCC = 5.0 V; CL = 15 pF
S to nY; see Figure 6
VCC = 4.5 V
20
17
15
35
-
44
ns
ns
ns
VCC = 5.0 V; CL = 15 pF
[2]
[3]
ten
enable time
disable time
transition time
OE to nY; VCC = 4.5 V;
see Figure 7
30
38
38
15
45
45
18
tdis
OE to nY; VCC = 4.5 V;
see Figure 7
16
30
ns
[4]
[5]
tt
VCC = 4.5 V; see Figure 6
5
12
-
ns
CPD
power dissipation
capacitance
per multiplexer;
VI = GND to VCC
45
pF
[1] tpd is the same as tPHL, tPLH
[2] ten is the same as tPZH, tPZL
[3] tdis is the same as tPHZ, tPLZ
[4] tt is the same as tTHL, tTLH
.
.
.
.
[5] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
8 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
11. Waveforms
V
I
input
S, nI0, nI1
V
V
M
M
GND
t
t
PHL
PLH
V
OH
90 %
output
nY
V
V
M
M
10 %
V
OL
t
t
TLH
THL
001aad477
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. Propagation delays input (S, nI0, nI1) to output (nY) and output (nY) transition times
t
t
r
f
V
I
90 %
OE input
output
V
M
10 %
GND
t
t
PZL
PLZ
V
CC
LOW-to-OFF
OFF-to-LOW
V
M
10 %
V
OL
t
t
PHZ
PZH
V
OH
90 %
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
001aac479
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 7. 3-state output enable and disable times
Table 8.
Type
Measurement points
Input
VM
Output
VM
74HC257
0.5VCC
1.3 V
0.5VCC
1.3 V
74HCT257
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
9 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
t
W
V
I
90 %
negative
pulse
V
V
V
V
M
M
10 %
0 V
t
t
r
f
t
r
t
f
V
I
90 %
positive
pulse
M
M
10 %
0 V
t
W
V
V
CC
CC
V
V
O
I
R
S1
L
G
open
DUT
R
C
L
T
001aad983
Measurement points are given in Table 8 and test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistor.
Fig 8. Test circuit for switching times
Table 9.
Type
Test data
Input
VI
Load
CL
Switch position
tr, tf
6 ns
6 ns
RL
tPHL, tPLH
open
tPZH, tPHZ
tPZL, tPLZ
VCC
74HC257
VCC
50 pF
50 pF
1 kΩ
1 kΩ
GND
GND
74HCT257
3 V
open
VCC
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
10 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
12. Package outline
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
0.76
0.068 0.021 0.049 0.014
0.051 0.015 0.033 0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.03
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
95-01-14
03-02-13
SOT38-4
Fig 9. Package outline SOT38-4 (DIP16)
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
11 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 10. Package outline SOT109-1 (SO16)
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
12 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig 11. Package outline SOT338-1 (SSOP16)
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
13 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
SOT403-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
8
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.40
0.06
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT403-1
MO-153
Fig 12. Package outline SOT403-1 (TSSOP16)
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
14 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
13. Revision history
Table 10. Revision history
Document ID
Release date
20100113
Data sheet status
Change notice Supersedes
74HC_HCT257_5
Modifications:
Product data sheet
-
74HC_HCT257_4
• Table 7 “Dynamic characteristics”: changed 3OE to OE
74HC_HCT257_4
74HC_HCT257_3
74HC_HCT257_CNV_2
20090608
20050920
19980930
Product data sheet
Product data sheet
Product specification
-
-
-
74HC_HCT257_3
74HC_HCT257_CNV_2
-
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
15 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
14. Legal information
14.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
14.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
14.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
14.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
15. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
16 of 17
74HC257; 74HCT257
NXP Semiconductors
Quad 2-input multiplexer; 3-state
16. Contents
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5
5.1
5.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4
6
6.1
7
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 6
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
8
9
10
11
12
13
14
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
14.1
14.2
14.3
14.4
15
16
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 January 2010
Document identifier: 74HC_HCT257_5
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