74HCT594DB,118 [NXP]
74HC(T)594 - 8-bit shift register with output register SSOP1 16-Pin;型号: | 74HCT594DB,118 |
厂家: | NXP |
描述: | 74HC(T)594 - 8-bit shift register with output register SSOP1 16-Pin PC 光电二极管 输出元件 逻辑集成电路 触发器 |
文件: | 总26页 (文件大小:129K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
74HC594; 74HCT594
8-bit shift register with output register
Rev. 03 — 20 December 2006
Product data sheet
1. General description
The 74HC594; 74HCT594 is a high-speed Si-gate CMOS device and is pin compatible
with Low-Power Schottky TTL (LSTTL).
The 74HC594; 74HCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that
feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct
overriding clears (SHR and STR) are provided on both the shift and storage registers.
A serial output (Q7S) is provided for cascading purposes.
Both the shift and storage register clocks are positive-edge triggered. If the user wishes to
connect both clocks together, the shift register will always be one count pulse ahead of the
storage register.
2. Features
I Synchronous serial input and output
I Complies with JEDEC standard No.7A
I 8-bit parallel output
I Shift and storage registers have independent direct clear and clocks
I Independent clocks for shift and storage registers
I 100 MHz (typical)
I Multiple package options
I Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Applications
I Serial-to parallel data conversion
I Remote control holding register
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
4. Ordering information
Table 1.
Ordering information
Type number
Package
Temperature
range
Name
Description
Version
74HC594D
−40 °C to +125 °C SO16
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
SOT338-1
74HC594DB
−40 °C to +125 °C SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
74HC594N
−40 °C to +125 °C DIP16
−40 °C to +125 °C SO16
plastic dual in-line package; 16 leads (300 mil)
SOT38-4
74HCT594D
plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74HCT594DB
74HCT594N
−40 °C to +125 °C SSOP16
−40 °C to +125 °C DIP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
SOT38-4
plastic dual in-line package; 16 leads (300 mil)
5. Functional diagram
14
11
10
DS
SHCP
SHR
8-STAGE SHIFT REGISTER
9
Q7S
12
13
STCP
STR
8-BIT STORAGE REGISTER
15
1
2
3
4
5
6
7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
mbc320
Fig 1. Functional diagram
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
2 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
SHCP STCP
11 12
13
STR
STCP
SHR
R2
C2
12
10
11
Q7S
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
9
15
1
R1 SRG8
C1/
SHCP
14
15
1
DS
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
Q7S
1D
2D
2
DS
14
3
2
3
4
4
5
5
6
6
7
7
10
13
9
SHR STR
mbc319
mbc322
Fig 2. Logic symbol
Fig 3. IEC logic symbol
STAGE 0
STAGES 1 TO 6
STAGE 7
DS
Q7S
D
Q
FFSH0
CP
D
Q
D
Q
FFSH7
CP
R
R
SHCP
SHR
D
FFST0
CP
D
FFST7
CP
Q
Q
R
R
STCP
STR
mbc321
Q0
Q1 Q2 Q3 Q4 Q5 Q6
Q7
Fig 4. Logic diagram
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
3 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
SHCP
DS
STCP
SHR
STR
Q0
Q1
Q6
Q7
Q7S
mbc323
Fig 5. Timing diagram
6. Pinning information
6.1 Pinning
74HC594
74HCT594
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q1
Q2
V
CC
Q0
DS
Q3
Q4
STR
Q5
STCP
SHCP
SHR
Q7S
Q6
Q7
GND
001aaf611
Fig 6. Pin configuration SO16
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
4 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
74HC594
74HCT594
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q1
Q2
V
CC
74HC594
74HCT594
Q0
Q3
DS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Q1
Q2
V
CC
Q4
STR
STCP
SHCP
SHR
Q7S
Q0
Q3
DS
Q5
Q4
STR
STCP
SHCP
SHR
Q7S
Q6
Q5
Q6
Q7
Q7
GND
GND
001aaf614
001aaf613
Fig 7. Pin configuration SSOP16
Fig 8. Pin configuration DIP16
6.2 Pin description
Table 2.
Symbol
Q1
Pin description
Pin
1
Description
parallel data output 1
parallel data output 2
parallel data output 3
parallel data output 4
parallel data output 5
parallel data output 6
parallel data output 7
ground (0 V)
Q2
2
Q3
3
Q4
4
Q5
5
Q6
6
Q7
7
GND
Q7S
SHR
SHCP
STCP
STR
DS
8
9
serial data output
10
11
12
13
14
15
16
shift register reset (active LOW)
shift register clock input
storage register clock input
storage register reset (active LOW)
serial data input
Q0
parallel data output 0
VCC
supply voltage
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
5 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
7. Functional description
Table 3.
Function table[1]
Function
Input
SHR STR SHCP STCP DS
Clear shift register
L
X
L
X
X
↑
X
X
X
↑
X
Clear storage register
X
H
X
H
X
Load DS into shift register stage 0, advance previous stage data to the next stage
Transfer shift register data to storage register and outputs Qn
Shift register one count pulse ahead of storage register
X
H
H
H or L
X
↑
X
X
↑
[1] H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH transition;
X = don’t care.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
VCC
IIK
Parameter
Conditions
Min
Max
+7.0
±20
±20
Unit
V
supply voltage
−0.5
[1]
[1]
input clamping current
output clamping current
output current
VI < −0.5 V or VI > VCC + 0.5 V
VO < −0.5 V or VO > VCC + 0.5 V
VO = −0.5 V to VCC + 0.5 V
Serial data output Q7S
Parallel data output
-
-
mA
mA
IOK
IO
-
±25
±35
50
mA
mA
mA
mA
mA
mA
°C
-
ICC
supply current
ground current
Serial data output Q7S
Parallel data output
-
-
70
IGND
Serial data output Q7S
Parallel data output
-
−50
−70
+150
500
-
Tstg
Ptot
storage temperature
total power dissipation
−65
[2]
Tamb = −40 °C to +125 °C
-
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For DIP16 packages: above 70 °C the value of Ptot derates linearly with 12 mW/K.
For SO16 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.
For SSOP16 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
6 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
9. Recommended operating conditions
Table 5.
Symbol
Recommended operating conditions
Parameter Conditions
Min
Typ
Max
Unit
Type 74HC594
VCC
VI
supply voltage
2.0
5.0
6.0
V
input voltage
0
-
VCC
VCC
+125
1000
500
400
1000
500
400
V
VO
Tamb
tr
output voltage
ambient temperature
rise time
0
-
V
−40
+25
°C
ns
ns
ns
ns
ns
ns
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
-
-
-
-
-
-
-
6.0
-
tf
fall time
-
6.0
-
Type 74HCT594
VCC
VI
supply voltage
4.5
5.0
-
5.5
V
input voltage
output voltage
ambient temperature
rise time
0
VCC
VCC
+125
500
500
V
VO
Tamb
tr
0
-
V
−40
+25
6.0
6.0
°C
ns
ns
VCC = 4.5 V
VCC = 4.5 V
-
-
tf
fall time
10. Static characteristics
Table 6.
Static characteristics type 74HC594
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
VIH
HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1.5
1.2
2.4
3.2
0.8
2.1
2.8
-
V
V
V
V
V
V
3.15
-
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = −4.0 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
Parallel data outputs
3.98
5.48
4.32
5.81
-
-
V
V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
3.98
5.48
4.32
5.81
-
-
V
V
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
7 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 6.
Static characteristics type 74HC594 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOL
LOW-level output voltage
VI = VIH or VIL
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
Parallel data outputs
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
-
-
0.15
0.16
0.26
0.26
V
V
-
-
-
-
0.15
0.26
0.26
±0.1
8.0
V
0.16
V
II
input leakage current
supply current
-
-
µA
µA
ICC
VCC = 6.0 V
Ci
input capacitance
-
3.5
-
pF
Tamb = −40 °C to +85 °C
VIH HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1.5
-
-
-
-
-
-
-
V
V
V
V
V
V
3.15
-
4.2
-
VIL
LOW-level input voltage
-
-
-
0.5
1.35
1.8
VOH
HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = −4.0 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
Parallel data outputs
3.84
5.34
-
-
-
-
V
V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
VI = VIH or VIL
3.84
5.34
-
-
-
-
V
V
VOL
LOW-level output voltage
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
Parallel data outputs
-
-
-
-
0.33
0.33
V
V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
-
-
0.33
0.33
±1.0
80
V
V
II
input leakage current
supply current
µA
µA
ICC
VCC = 6.0 V
Tamb = −40 °C to +125 °C
VIH
HIGH-level input voltage
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
1.5
-
-
-
-
-
-
V
V
V
3.15
4.2
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
8 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 6.
Static characteristics type 74HC594 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
Min
Typ
Max
0.5
Unit
V
VIL
LOW-level input voltage
-
-
-
-
-
-
1.35
1.8
V
V
VOH
HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = −4.0 mA; VCC = 4.5 V
IO = −5.2 mA; VCC = 6.0 V
Parallel data outputs
3.7
5.2
-
-
-
-
V
V
IO = −6.0 mA; VCC = 4.5 V
IO = −7.8 mA; VCC = 6.0 V
VI = VIH or VIL
3.7
5.2
-
-
-
-
V
V
VOL
LOW-level output voltage
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V
IO = 5.2 mA; VCC = 6.0 V
Parallel data outputs
-
-
-
-
0.4
0.4
V
V
IO = 6.0 mA; VCC = 4.5 V
IO = 7.8 mA; VCC = 6.0 V
VI = VCC or GND; VCC = 6.0 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
-
-
0.4
V
0.4
V
II
input leakage current
supply current
±1.0
160
µA
µA
ICC
VCC = 6.0 V
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
9 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 7.
Static characteristics type 74HCT594
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tamb = 25 °C
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
1.6
1.2
-
V
V
0.8
VOH
HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = −4.0 mA; VCC = 4.5 V
Parallel data outputs
3.98
3.98
4.32
4.32
-
-
V
V
IO = −6.0 mA; VCC = 4.5 V
VI = VIH or VIL
VOL
LOW-level output voltage
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V
Parallel data outputs
-
0.15
0.26
V
IO = 6.0 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
-
-
-
0.16
0.26
±0.1
8.0
V
II
input leakage current
supply current
-
-
µA
µA
ICC
VCC = 5.5 V
∆ICC
additional supply current
per input pin; VI = VCC − 2.1 V and
other inputs at VCC or GND;
IO = 0 A; VCC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR
pin DS
-
-
-
150
25
540
90
-
µA
µA
pF
Ci
input capacitance
3.5
Tamb = −40 °C to +85 °C
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
0.8
VOH
HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = −4.0 mA; VCC = 4.5 V
Parallel data outputs
3.84
3.84
-
-
-
-
V
V
IO = −6.0 mA; VCC = 4.5 V
VI = VIH or VIL
VOL
LOW-level output voltage
Serial data output
IO = 4.0 mA; VCC = 4.5 V
Parallel data outputs
-
-
0.33
V
IO = 6.0 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
0.33
±1.0
80
V
II
input leakage current
supply current
µA
µA
ICC
VCC = 5.5 V
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
10 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 7.
Static characteristics type 74HCT594 …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
∆ICC
additional supply current
per input pin; VI = VCC − 2.1 V and
other inputs at VCC or GND;
IO = 0 A; VCC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR
pin DS
-
-
-
-
675
µA
µA
112.5
Tamb = −40 °C to +125 °C
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2.0
-
-
-
-
V
V
0.8
VOH
HIGH-level output voltage VI = VIH or VIL
Serial data output Q7S
IO = −4.0 mA; VCC = 4.5 V
Parallel data outputs
3.7
3.7
-
-
-
-
V
V
IO = −6.0 mA; VCC = 4.5 V
VI = VIH or VIL
VOL
LOW-level output voltage
Serial data output Q7S
IO = 4.0 mA; VCC = 4.5 V
Parallel data outputs
-
-
0.4
V
IO = 6.0 mA; VCC = 4.5 V
VI = VCC or GND; VCC = 5.5 V
VI = VCC or GND; IO = 0 A;
-
-
-
-
-
-
0.4
V
II
input leakage current
supply current
±1.0
160
µA
µA
ICC
VCC = 5.5 V
∆ICC
additional supply current
per input pin; VI = VCC − 2.1 V and
other inputs at VCC or GND;
IO = 0 A; VCC = 4.5 V to 5.5 V
pins SHR, SHCP, STCP, STR
pin DS
-
-
-
-
735
µA
µA
122.5
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
11 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
11. Dynamic characteristics
Table 8.
Dynamic characteristics type 74HC594
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.
Symbol Parameter Conditions
25 °C
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
[1]
tpd
propagation SHCP to Q7S;
delay
see Figure 9
VCC = 2.0 V
VCC = 4.5 V
-
-
-
44
16
13
150
30
-
-
-
-
185
37
-
-
-
-
225
45
-
ns
ns
ns
VCC = 5.0 V;
CL = 15 pF
VCC = 6.0 V
-
14
26
-
31
-
38
ns
STCP to Qn; see
Figure 10
VCC = 2.0 V
VCC = 4.5 V
-
-
-
44
16
13
150
30
-
-
-
-
185
37
-
-
-
-
225
45
-
ns
ns
ns
VCC = 5.0 V;
CL = 15 pF
VCC = 6.0 V
-
14
26
-
31
-
38
ns
tPHL
HIGH to
LOW
SHR to Q7S; see
Figure 13
propagation
delay
VCC = 2.0 V
VCC = 4.5 V
-
-
-
39
14
11
150
30
-
-
-
-
185
37
-
-
-
-
225
45
-
ns
ns
ns
VCC = 5.0 V;
CL = 15 pF
VCC = 6.0 V
-
12
26
-
31
-
38
ns
STR to Qn; see
Figure 14
VCC = 2.0 V
VCC = 4.5 V
-
-
-
39
14
11
125
25
-
-
-
-
155
31
-
-
-
-
185
37
-
ns
ns
ns
VCC = 5.0 V;
CL = 15 pF
VCC = 6.0 V
see Figure 9
-
12
21
-
26
-
31
ns
tTHL
HIGH to
LOW output
transition
time
Serial data output Q7S
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
Parallel data outputs
VCC = 2.0 V
-
-
-
14
5
60
12
10
-
-
-
75
15
13
-
-
-
90
18
15
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
12 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 8.
Dynamic characteristics type 74HC594 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
tTLH
LOW to
see Figure 9
HIGH output
transition
time
Serial data output Q7S
VCC = 2.0 V
-
-
-
19
7
75
15
13
-
-
-
95
19
16
-
-
-
110
22
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
6
19
Parallel data outputs
VCC = 2.0 V
-
-
-
14
5
60
12
10
-
-
-
75
15
13
-
-
-
90
18
15
ns
ns
ns
VCC = 4.5 V
VCC = 6.0 V
4
tW
pulse width SHCP (HIGH or
LOW); see
Figure 9
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
80
16
14
10
4
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
3
17
20
STCP (HIGH or
LOW); see
Figure 10
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
80
16
14
10
4
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
3
17
20
SHR and STR
(HIGH or LOW);
see Figure 13
and Figure 14
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
80
16
14
14
5
-
-
-
100
20
-
-
-
120
24
-
-
-
ns
ns
ns
4
17
20
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
13 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 8.
Dynamic characteristics type 74HC594 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.
Symbol Parameter
Conditions
25 °C
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Typ
Max
Min
Max
Min
Max
tsu
set-up time DS to SHCP;
see Figure 11
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
100
20
10
4
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
17
3
21
26
SHR to STCP;
see Figure 12
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
100
20
14
5
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
17
4
21
26
SHCP to STCP;
see Figure 10
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
100
20
17
6
-
-
-
125
25
-
-
-
150
30
-
-
-
ns
ns
ns
17
5
21
26
th
hold time
DS to SHCP;
see Figure 11
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
25
5
−8
−3
−2
-
-
-
30
6
-
-
-
35
7
-
-
-
ns
ns
ns
4
5
6
trec
recovery
time
SHR to SHCP
and
STR to STCP;
see Figure 13
and Figure 14
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
50
10
9
−14
−5
-
-
-
65
13
11
-
-
-
75
15
13
-
-
-
ns
ns
ns
−4
fmax
maximum
frequency
SHCP or STCP;
see Figure 9 and
Figure 10
VCC = 2.0 V
VCC = 4.5 V
6.0
30
-
30
92
-
-
-
4.8
24
-
-
-
-
4.0
20
-
-
-
-
MHz
MHz
MHz
VCC = 5.0 V;
CL = 15 pF
100
VCC = 6.0 V
35
109
-
28
-
24
-
MHz
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
14 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 8.
Dynamic characteristics type 74HC594 …continued
GND = 0 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.
Symbol Parameter
Conditions
25 °C
Typ
84
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Max
Min
Max
Min
Max
[2]
CPD
power
VI = GND to VCC
;
-
-
-
-
-
-
pF
dissipation
VCC = 5 V;
capacitance fi = 1 MHz
[1] tpd is the same as tPHL and tPLH
.
[2] CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
Table 9.
Dynamic characteristics type 74HCT594
GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.
Symbol Parameter
Conditions
25 °C
Typ
18
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Max
Min
Max
Min
Max
[1]
tpd
propagation SHCP to Q7S;
-
32
-
40
-
48
ns
ns
ns
ns
ns
ns
ns
ns
delay
see Figure 9
VCC = 5.0 V;
CL = 15 pF
-
-
-
-
-
-
-
15
18
15
17
14
17
14
-
32
-
-
-
-
-
-
-
-
-
40
-
-
-
-
-
-
-
-
-
48
-
STCP to Qn; see
Figure 10
VCC = 5.0 V;
CL = 15 pF
tPHL
HIGH to
LOW
SHR to Q7S; see
Figure 13
30
-
38
-
45
-
propagation
delay
VCC = 5.0 V;
CL = 15 pF
STR to Qn; see
Figure 14
30
-
38
-
45
-
VCC = 5.0 V;
CL = 15 pF
tTHL
HIGH to
LOW output
transition
time
see Figure 9
Serial data output Q7S
VCC = 4.5 V
-
-
7
5
15
12
-
-
19
15
-
-
22
18
ns
ns
Parallel data outputs
VCC = 4.5 V
tTLH
LOW to
see Figure 9
HIGH output
transition
time
Serial data output Q7S
VCC = 4.5 V
-
-
7
5
15
12
-
-
19
15
-
-
22
18
ns
ns
Parallel data outputs
VCC = 4.5 V
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
15 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
Table 9.
Dynamic characteristics type 74HCT594 …continued
GND = 0 V; VCC = 4.5 V; tr = tf = 6 ns; CL = 50 pF; see Figure 15.
Symbol Parameter
Conditions
25 °C
Typ
4
−40 °C to +85 °C
−40 °C to +125 °C Unit
Min
Max
Min
Max
Min
Max
tW
pulse width SHCP (HIGH or
LOW); see
16
-
20
-
24
-
ns
ns
ns
Figure 9
STCP (HIGH or
LOW); see
Figure 10
16
16
4
6
-
-
20
20
-
-
24
24
-
-
SHR and STR
(HIGH or LOW);
see Figure 13
and Figure 14
tsu
set-up time DS to SHCP;
see Figure 11
20
20
20
5
4
6
-
-
-
-
-
25
25
25
6
-
-
-
-
-
30
30
30
7
-
-
-
-
-
ns
ns
ns
ns
ns
SHR to STCP;
see Figure 12
SHCP to STCP;
see Figure 10
7
th
hold time
DS to SHCP;
see Figure 11
−3
−5
trec
recovery
time
SHR to SHCP
and
10
13
15
STR to STCP;
see Figure 13
and Figure 14
fmax
maximum
frequency
SHCP or STCP;
see Figure 9 and
Figure 10
30
92
-
24
-
20
-
MHz
VCC = 5.0 V;
CL = 15 pF
-
-
100
89
-
-
-
-
-
-
-
-
-
-
MHz
pF
[2]
CPD
power
VI = GND to VCC
dissipation
capacitance
− 1.5 V;
VCC = 5 V;
fi = 1 MHz
[1] tpd is the same as tPHL and tPLH
.
[2] CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
16 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
12. Waveforms
1/f
max
SHCP input
Q7S output
V
M
t
W
t
t
PHL
PLH
V
M
t
t
TLH
THL
001aae341
Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd
tTLH = LOW to HIGH output transition time; tTHL = HIGH to LOW output transition time.
.
Fig 9. The shift clock (SHCP) to output (Q7S) propagation delays, the shift clock pulse
width, the maximum shift clock frequency, and output transition times
V
SHCP input
M
t
su
1/ f
max
V
t
STCP input
Qn outputs
M
t
W
t
PHL
PLH
V
M
mla512
Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd
.
Fig 10. The storage clock (STCP) to output (Qn), propagation delays, the storage clock
pulse width, the maximum storage clock pulse frequency and the shift clock to
storage clock set-up time
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
17 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
V
SHCP input
M
t
t
su
su
t
t
h
h
V
DS input
M
V
Q7 output
M
001aae342
Measurement points are given in Table 10.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Fig 11. The data set-up time and hold times for DS input to SHCP
V
M
SHR input
STCP input
Qn outputs
t
su
V
M
V
M
mbc326
Measurement points are given in Table 10.
Fig 12. The set-up time shift reset (SHR) to storage clock (STCP)
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
18 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
V
M
SHR input
SHCP input
Q7S output
t
W
t
rec
V
M
t
PHL
V
M
mbc324
Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd
.
Fig 13. The shift reset (SHR) pulse width, the shift reset to output (Q7S) propagation delay
and the shift reset to shift clock (SHCP) recovery time
V
M
STR input
STCP input
Qn outputs
t
W
t
rec
V
M
t
PHL
V
M
mbc325
Measurement points are given in Table 10.
tPLH and tPHL are the same as tpd
.
Fig 14. The storage reset (STR) pulse width, the storage reset to output (Qn) propagation
delay and the storage reset to storage clock (STCP) recovery time
Table 10. Measurement points
Type
Input
VM
Output
VM
74HC594
0.5 × VCC
1.3 V
0.5 × VCC
1.3 V
74HCT594
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
19 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
V
CC
CC
V
V
O
I
R
L
S1
PULSE
GENERATOR
open
DUT
R
T
C
L
001aad983
Test data is given in Table 11.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
S1 = Test selection switch
Fig 15. Load circuitry for measuring switching times
Table 11. Test data
Type
Input
VI
Load
CL
S1 position
tr, tf
6 ns
6 ns
RL
tPHL, tPLH tPZH, tPHZ tPZL, tPLZ
74HC594
VCC
3 V
15 pF, 50 pF 1 kΩ
15 pF, 50 pF 1 kΩ
open
open
GND
GND
VCC
VCC
74HCT594
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
20 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
13. Package outline
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
D
E
A
X
v
c
y
H
M
A
E
Z
16
9
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
8
e
w
M
detail X
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.27
0.05
1.05
0.041
1.75
0.25
0.01
0.25
0.01
0.25
0.1
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.020
0.028
0.012
inches
0.069
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT109-1
076E07
MS-012
Fig 16. Package outline SOT109-1 (SO16)
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
21 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
SOT338-1
D
E
A
X
c
y
H
v
M
A
E
Z
9
16
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
8
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT338-1
MO-150
Fig 17. Package outline SOT338-1 (SSOP16)
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
22 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
DIP16: plastic dual in-line package; 16 leads (300 mil)
SOT38-4
D
M
E
A
2
A
A
1
L
c
e
w M
Z
b
1
(e )
1
b
b
2
16
9
M
H
pin 1 index
E
1
8
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
(1)
A
A
A
2
(1)
(1)
Z
1
w
UNIT
mm
b
b
b
c
D
E
e
e
L
M
M
H
1
2
1
E
max.
min.
max.
max.
1.73
1.30
0.53
0.38
1.25
0.85
0.36
0.23
19.50
18.55
6.48
6.20
3.60
3.05
8.25
7.80
10.0
8.3
4.2
0.51
3.2
2.54
0.1
7.62
0.3
0.254
0.01
0.76
0.068 0.021 0.049 0.014
0.051 0.015 0.033 0.009
0.77
0.73
0.26
0.24
0.14
0.12
0.32
0.31
0.39
0.33
inches
0.17
0.02
0.13
0.03
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
95-01-14
03-02-13
SOT38-4
Fig 18. Package outline SOT38-4 (DIP16)
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
23 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
14. Abbreviations
Table 12. Abbreviations
Acronym
CMOS
DUT
Description
Complementary Metal Oxide Semiconductor
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
LSTTL
MM
Low-Power Schottky Transistor-Transistor Logic
Machine Model
TTL
Transistor-Transistor Logic
15. Revision history
Table 13. Revision history
Document ID
74HC_HCT594_3
Modifications:
Release date
20061220
Data sheet status
Change notice
Supersedes
Product data sheet
-
74HC_HCT594_CNV_2
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Table 1 “Ordering information” updated.
74HC_HCT594_CNV_2 19970908
Product specification
-
74HC_HCT594_CNV_1
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
24 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
16. Legal information
16.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of a NXP Semiconductors product can reasonably be expected to
16.2 Definitions
result in personal injury, death or severe property or environmental damage.
NXP Semiconductors accepts no liability for inclusion and/or use of NXP
Semiconductors products in such equipment or applications and therefore
such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
16.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
16.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
17. Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
74HC_HCT594_3
© NXP B.V. 2006. All rights reserved.
Product data sheet
Rev. 03 — 20 December 2006
25 of 26
74HC594; 74HCT594
NXP Semiconductors
8-bit shift register with output register
18. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7
Functional description . . . . . . . . . . . . . . . . . . . 6
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended operating conditions. . . . . . . . 7
Static characteristics. . . . . . . . . . . . . . . . . . . . . 7
Dynamic characteristics . . . . . . . . . . . . . . . . . 12
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 21
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 24
8
9
10
11
12
13
14
15
16
Legal information. . . . . . . . . . . . . . . . . . . . . . . 25
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 25
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 25
16.1
16.2
16.3
16.4
17
18
Contact information. . . . . . . . . . . . . . . . . . . . . 25
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2006.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 20 December 2006
Document identifier: 74HC_HCT594_3
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