74LV03D,112 [NXP]
74LV03 - Quad 2-input NAND gate SOIC 14-Pin;
| 型号： | 74LV03D,112 |
| 厂家： | 
NXP |
| 描述： | 74LV03 - Quad 2-input NAND gate SOIC 14-Pin 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总7页 (文件大小：55K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LV03
Quad 2-input NAND gate
Product data
2003 Mar 03
Supersedes data of 1998 Apr 20
Philips
Semiconductors
Philips Semiconductors
Product data
Quad 2-input NAND gate
74LV03
FEATURES
• Wide operating voltage: 1.0 V to 5.5 V
• Optimized for Low Voltage applications: 1.0 V to 3.6 V
DESCRIPTION
The 74LV03 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT03.
The 74LV03 provides the 2-input NAND function.
• Accepts TTL input levels between V = 2.7 V and V = 3.6 V
CC
CC
The 74LV03 has open-drain N-transistor outputs, which are not
• Typical V
(output ground bounce) < 0.8 V @ V = 3.3 V,
clamped by a diode connected to V . In the OFF-state, i.e., when
one input is LOW, the output may be pulled to any voltage between
OLP
CC
CC
T
= 25 °C
amb
GND and V
. This allows the device to be used as a
Omax
• Typical V
(output V undershoot) > 2 V @ V = 3.3 V,
OHV
OH
CC
LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation
and OR-tied output applications, these devices must have a pull-up
resistor to establish a logic HIGH level.
T
amb
= 25 °C
• Level shifter capability
• Output capability: standard (open drain)
• I category: SSI
CC
QUICK REFERENCE DATA
GND = 0 V; T
= 25 °C; t =t ≤ 2.5 ns
amb
r f
SYMBOL
/t
PARAMETER
CONDITIONS
TYPICAL
UNIT
Propagation delay
nA, nB to nY
C = 15 pF
L
CC
t
8
ns
PZL PLZ
V
= 3.3 V
C
C
Input capacitance
3.5
4
pF
pF
I
Power dissipation capacitance per gate
Notes 1, 2
PD
NOTES:
1
C
is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
D
= C × V
× f × N +Σ (C × V
× f ) where:
CC o
PD
CC
i
L
N = the number of outputs switching;
f = input frequency in MHz; C = output load capacitance in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
Σ (C × V
× f ) = sum of the outputs.
L
CC
o
2
3
The condition is V = GND to V
I CC
The given value of C is obtained with : C = 0 pF and R = ∞
PD
L
L
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
PKG. DWG. #
14-Pin Plastic SO
–40 °C to +125 °C
74LV03D
SOT108-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN
NUMBER
SYMBOL
FUNCTION
1A
1B
1Y
2A
2B
1
2
3
4
5
14
V
CC
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
1A to 4A
1B to 4B
1Y to 4Y
GND
Data inputs
Data inputs
13 4B
12 4A
11 4Y
10 3B
Data outputs
Ground (0 V)
14
V
CC
Positive supply voltage
2Y
6
7
9
8
3A
3Y
GND
SV00354
2
2003 Mar 03
Philips Semiconductors
Product data
Quad 2-input NAND gate
74LV03
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
&
1
1A
1B
1
2
3
6
8
1Y
2Y
3Y
4Y
3
2
&
4
4
5
2A
2B
6
5
9
3A
3B
&
9
8
10
10
12
13
4A
4B
&
12
11
11
13
SV00356
SV00355
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS
OUTPUT
Y
nA
L
nB
L
nY
Z
A
B
L
H
L
Z
H
H
Z
H
L
NOTES:
GND
H = HIGH voltage level
L = LOW voltage level
Z = High impedance OFF-state
SV00357
70
3
2003 Mar 03
Philips Semiconductors
Product data
Quad 2-input NAND gate
74LV03
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
1.0
0
TYP.
3.3
–
MAX
5.5
UNIT
V
CC
DC supply voltage
See Note1
V
V
V
V
I
Input voltage
V
CC
CC
V
O
Output voltage
0
–
V
–40
–40
+85
+125
T
amb
Operating ambient temperature range in free air See DC and AC characteristics
°C
V
CC
V
CC
V
CC
V
CC
= 1.0 V to 2.0 V
= 2.0 V to 2.7 V
= 2.7 V to 3.6 V
= 3.6 V to 5.5 V
–
–
–
–
–
–
–
–
500
200
100
50
ns/V
t , t
r
Input rise and fall times
f
NOTES:
1
The LV is guaranteed to function down to V = 1.0 V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2 V to
CC CC CC
V
CC
= 5.5 V.
1, 2
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +7.0
20
UNIT
V
V
CC
±I
IK
DC input diode current
DC output diode current
V < –0.5 or V > V + 0.5 V
mA
mA
I
I
CC
±I
OK
V
O
< –0.5 or V > V + 0.5 V
50
O
CC
DC output source or sink current
– standard outputs
±I
O
–0.5V < V < V + 0.5 V
mA
O
CC
25
±I
±I
,
DC V or GND current for types with
–standard outputs
GND
CC
CC
mA
°C
50
T
Storage temperature range
–65 to +150
stg
Power dissipation per package
–plastic mini-pack (SO)
for temperature range: –40 °C to +125 °C
above +70 °C derate linearly with 8 mW/K
P
TOT
500
mW
NOTES:
1
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
4
2003 Mar 03
Philips Semiconductors
Product data
Quad 2-input NAND gate
74LV03
DC CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0 V)
LIMITS
MAX
–40°C to +85°C
–40°C to +125°C
SYMBOL
PARAMETER
TEST CONDITIONS
= 1.2 V
UNIT
1
MIN
0.9
1.4
2.0
TYP
MIN
0.9
1.4
2.0
MAX
V
V
V
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.0 V
HIGH level Input
voltage
V
IH
V
= 2.7 V to 3.6 V
= 4.5 V to 5.5 V
= 1.2 V
0.7*V
0.7*V
CC
CC
0.3
0.6
0.8
0.3
0.6
0.8
= 2.0 V
LOW level Input
voltage
V
IL
V
= 2.7 V to 3.6 V
= 4.5 V to 5.5 V
0.3*V
0.3*V
CC
CC
= 1.2 V; V = V or V –I = 100 µA
1.2
2.0
2.7
3.0
4.5
I
IH
IL;
O
= 2.0 V; V = V or V –I = 100 µA
1.8
2.5
2.8
4.3
1.8
2.5
2.8
4.3
I
IH
IL;
O
HIGH level output
voltage; all outputs
= 2.7 V; V = V or V –I = 100 µA
V
V
V
V
V
V
I
IH
IL;
O
OH
= 3.0 V; V = V or V –I = 100 µA
I
IH
IL;
O
= 4.5 V; V = V or V –I = 100 µA
I
IH
IL;
O
HIGH level output
voltage;
STANDARD
V
V
= 3.0 V; V = V or V –I = 6 mA
2.40
3.60
2.82
4.20
2.20
3.50
CC
I
IH
IL;
O
OH
= 4.5 V;V = V or V –I = 12 mA
CC
I
IH
IL;
O
outputs
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2 V; V = V or V I
IL; O
= 100 µA
= 100 µA
= 100 µA
= 100 µA
= 100 µA
0
0
0
0
0
I
IH
= 2.0 V; V = V or V
I
0.2
0.2
0.2
0.2
0.2
I
IH
IL; O
LOW level output
voltage; all outputs
= 2.7 V; V = V or V
I
0.2
0.2
0.2
V
V
I
IH
IL; O
OL
= 3.0 V; V = V or V I
IL; O
I
IH
= 4.5 V; V = V or V I
IL; O
I
IH
LOW level output
voltage;
STANDARD
V
V
= 3.0 V; V = V or V I = 6 mA
IL; O
0.25
0.35
0.40
0.55
5.0
0.50
0.65
10
CC
I
IH
OL
= 4.5 V; V = V or V I = 12 mA
IL; O
CC
I
IH
outputs
HIGH level output
leakage current
V
V
= 2.0 V to 3.6 V; V = V
I
CC
O
IL;
IL;
I
I
µA
µA
µA
µA
OZ
= V or GND
CC
HIGH level output
leakage current
V
= 2.0 V to 3.6 V; V = V
CC I
10
1.0
20
1.0
40
OZ
2
V
O
= 6.0 V
Input leakage
current
I
I
V
= 5.5 V; V = V or GND
CC I CC
Quiescent supply
current; SSI
I
V
CC
= 5.5 V; V = V or GND; I = 0
20.0
CC
I
CC
O
Additional
quiescent supply
current per input
∆I
CC
V
CC
= 2.7 V to 3.6 V; V = V – 0.6 V
500
850
µA
I
CC
NOTES:
1
2
All typical values are measured at T
The maximum operating output voltage (V
= 25 °C.
O(max)
amb
) is 6.0 V.
5
2003 Mar 03
Philips Semiconductors
Product data
Quad 2-input NAND gate
74LV03
AC CHARACTERISTICS FOR 74LV03
GND = 0 V; t = t ≤ 2.5 ns; C = 50 pF; R = 1 kΩ
r
f
L
L
LIMITS
–40 to +85 °C
LIMITS
–40 to +125 °C
CONDITION
(V)
SYMBOL
PARAMETER
WAVEFORM
UNIT
1
V
CC
MIN
–
TYP
MAX
–
MIN
–
MAX
–
1.2
50
17
13
2.0
2.7
–
26
19
16
13
–
31
23
19
16
Propagation delay
nA, nB, to nY
t
t
Figures, 1, 2
ns
–
–
PZL/ PLZ
2
3.0 to 3.6
4.5 to 5.5
–
10
–
3
–
–
–
NOTE:
1
2
3
Unless otherwise stated, all typical values are at T
= 25 °C.
amb
Typical value measured at V = 3.3 V.
CC
Typical value measured at V = 5.0 V.
CC
AC WAVEFORMS
TEST CIRCUIT
V
V
V
= 1.5 V at V ≥ 2.7 V ≤ 3.6 V
M
CC
= 0.5 V * V at V < 2.7 V and ≥ 4.5 V
M
CC
CC
V
CC
2 * V
and V are the typical output voltage drop that occur with the
CC
OL
OH
Open
GND
output load.
V
X
V
X
= V + 0.3 V at V ≥ 2.7 V and ≤ 3.6 V
OL CC
R
R
= 1k
L
L
= V + 0.1 * V at V < 2.7 V and ≥ 4.5 V
V
V
O
OL
CC
CC
I
PULSE
GENERATOR
D.U.T.
= 1k
R
T
50 pF
C
L
Test Circuit for Outputs
DEFINITIONS
V
I
R
C
R
= Load resistor
L
L
T
= Load capacitance includes jig and probe capacitiance.
= Termination resistance should be equal to Z
nA, nB INPUT
V
M
t
of pulse generators.
OUT
V
SWITCH POSITION
CC
S
t
TEST
V
V
I
PLZ
PZL
1
CC
GND
t
t
Open
< 2.7V
V
CC
PLH/ PHL
nY OUTPUT
V
M
t
t
t
2 * V
2.7V
PLZ/ PZL
CC
2.7–3.6V
V
X
V
V
CC
OL
w 4.5V
t
GND
PHZ/ PZH
SV00896
Figure 2. Load circuitry for switching times
SV00358
Figure 1. Input (nA, nB) to output (nY) propagation delays.
6
2003 Mar 03
Philips Semiconductors
Product data
Quad 2-input NAND gate
74LV03
REVISION HISTORY
Rev
Date
Description
_3
20030303
Product data (9397 750 11191). ECN 853-1963 29494 of 07 February 2003.
Supersedes data of 1998 Apr 20 (9397 750 04403).
Modifications:
• Delete DIL, SSOP and TSSOP package ordering and package outlines (discontinued options).
• Correct power dissipation formula.
_2
19980420 Product specification (9397 750 04403). ECN 853-1963 19257 of 20 April 1998. Supersedes data of 1997 Mar 28.
Data sheet status
Product
status
Definitions
[1]
Level
Data sheet status
[2] [3]
I
Objective data
Development
This data sheet contains data from the objective specification for product development.
Philips Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
Production
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL
http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limitingvaluesdefinition— Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given
in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no
representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be
expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree
to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described
or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated
viaaCustomerProduct/ProcessChangeNotification(CPCN).PhilipsSemiconductorsassumesnoresponsibilityorliabilityfortheuseofanyoftheseproducts,conveys
nolicenseortitleunderanypatent, copyright, ormaskworkrighttotheseproducts, andmakesnorepresentationsorwarrantiesthattheseproductsarefreefrompatent,
copyright, or mask work right infringement, unless otherwise specified.
Koninklijke Philips Electronics N.V. 2003
Contact information
All rights reserved. Printed in U.S.A.
For additional information please visit
http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
Date of release: 03-03
9397 750 11191
For sales offices addresses send e-mail to:
sales.addresses@www.semiconductors.philips.com.
Document order number:
Philips
Semiconductors
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