74LV374DB [NXP]
Octal D-type flip-flop; positive edge-trigger 3-State; 八路D型触发器;正边沿触发三态
| 型号： | 74LV374DB |
| 厂家： | 
NXP |
| 描述： | Octal D-type flip-flop; positive edge-trigger 3-State |
| 文件： | 总12页 (文件大小：115K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LV374
Octal D-type flip-flop;
positive edge-trigger (3-State)
Product specification
1997 Mar 20
Supersedes data of 1996 Feb
IC24 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
FEATURES
• Wide operating voltage: 1.0 to 5.5V
• Optimized for Low Voltage applications: 1.0 to 3.6V
DESCRIPTION
The 74LV374 is a low-voltage Si-gate CMOS device and is pin and
function compatible with 74HC/HCT374.
The 74LV374 is an octal D-type flip–flop featuring separate D-type
inputs for each flip-flop and 3-state outputs for bus oriented
applications. A clock (CP) and an output enable (OE) input are
common to all flip-flops.
• Accepts TTL input levels between V = 2.7V and V = 3.6V
CC
CC
• Typical V
(output ground bounce) t 0.8V @ V = 3.3V,
OLP
CC
T
= 25°C
amb
The eight flip-flops will store the state of their individual D-inputs that
meet the set-up and hold times requirements on the LOW-to-HIGH
CP transition.
• Typical V
(output V undershoot) u 2V @ V = 3.3V,
OHV
OH
CC
T
= 25°C
amb
• Common 3-State output enable input
• Output capability: bus driver
When OE is LOW, the contents of the eight flip-flops is available at
the outputs. When OE is HIGH, the outputs go to the high
impedance OFF-state. Operation of the OE input does not affect the
state of the flip-flops.
• I category: MSI
CC
QUICK REFERENCE DATA
GND = 0V; T
= 25°C; t =t v2.5 ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
C = 15pF
L
Propagation delay
CP to Q
V
CC
= 3.3V
t
f
/t
14
ns
PHL PLH
n
Maximum clock frequency
Input capacitance
77
3.5
25
MHz
pF
max
C
C
I
Power dissipation capacitance per flip-flop
Notes 1 and 2
pF
PD
NOTES:
1. C is used to determine the dynamic power dissipation (P in µW)
PD
D
2
2
P
= C V
x f )S (C V
f ) where:
D
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacity in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
S (C V
f ) = sum of the outputs.
L
CC
o
2. The condition is V = GND to V
I
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LV374 N
PKG. DWG. #
SOT146-1
SOT163-1
SOT339-1
20-Pin Plastic DIL
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
74LV374 N
74LV374 D
74LV374 DB
20-Pin Plastic SO
74LV374 D
20-Pin Plastic SSOP Type II
74LV374 DB
PIN DESCRIPTION
FUNCTION TABLE
PIN
INPUTS
OUTPUTS
SYMBOL
NUMBER
FUNCTION
OPERATING
MODES
INTERNAL
FLIP-FLOPS
OE CP Dn
Q0 to Q7
1
OE
Output enable input (active-LOW)
3-State flip-flop outputs
Load and read
register
L
L
↑
↑
l
h
L
H
L
H
2, 5, 6, 9, 12,
15, 16, 19
Q0 to Q7
Load register and
disable outputs
H
H
↑
↑
l
h
L
H
Z
Z
3, 4, 7, 8, 13,
14, 17, 18
D0 to D7
GND
Data inputs
Ground (0V)
H
h
= HIGH voltage level
= HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
10
11
20
Clock input (LOW-to-HIGH, edge-
triggered)
CP
L
l
=
=
LOW voltage level
LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
High impedance OFF-state
V
CC
Positive supply voltage
Z
↑
=
=
LOW–to–HIGH clock transition
2
1997 Mar 20
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
PIN CONFIGURATION
LOGIC SYMBOL
11
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
CP
3
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
4
7
5
6
8
9
13
12
15
16
19
14
17
18
GND 10
OE
1
SV00338
SV00339
LOGIC SYMBOL (IEEE/IEC)
11
FUNCTIONAL DIAGRAM
C1
1
EN1
3
4
7
D
D
D
D
D
D
D
D
Q
Q
Q
Q
Q
Q
Q
Q
2
5
0
1
2
0
1
2
3
2
1D
6
4
7
8
5
6
9
8
9
12
15
16
19
3
4
3
4
FF1
to
FF8
3-STATE
OUTPUTS
13
14
17
18
5
6
7
5
6
7
13
12
14
17
15
16
19
18
11
1
CP
OE
SV00340
SV00341
D7
LOGIC DIAGRAM
D0
D1
D2
D3
D4
D5
D6
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
FF6
CP
FF7
CP
FF1
FF2
FF3
FF4
FF5
FF8
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
SV00342
3
1997 Mar 20
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
1, 2
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
V
CC
–0.5 to +7.0
±I
DC input diode current
DC output diode current
V < –0.5 or V > V + 0.5V
20
50
mA
mA
IK
I
I
CC
±I
OK
V
O
< –0.5 or V > V + 0.5V
O
CC
DC output source or sink current
– standard outputs
– bus driver outputs
25
35
±I
O
–0.5V < V < V + 0.5V
mA
O
CC
DC V or GND current for types with
–standard outputs
–bus driver outputs
CC
±I
±I
,
50
70
mA
GND
CC
T
stg
Storage temperature range
–65 to +150
°C
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
P
TOT
mW
–plastic shrink mini-pack (SSOP and TSSOP)
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
CONDITIONS
MIN
1.0
0
TYP.
3.3
–
MAX
UNIT
V
CC
DC supply voltage
See Note1
5.5
V
V
V
V
I
Input voltage
V
CC
V
CC
V
O
Output voltage
0
–
Operating ambient temperature range in free
air
See DC and AC
characteristics per device
–40
–40
+85
+125
T
amb
°C
V
CC
V
CC
V
CC
V
CC
= 1.0V to 2.0V
= 2.0V to 2.7V
= 2.7V to 3.6V
= 3.6V to 5.5V
–
–
–
–
500
200
100
50
–
–
–
Input rise and fall times except for
Schmitt-trigger inputs
t , t
r
ns/V
f
NOTES:
1. The LV is guaranteed to function down to V = 1.0V (input levels GND or V ); DC characteristics are guaranteed from V = 1.2V to V = 5.5V.
CC
CC
CC
CC
4
1997 Mar 20
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
MAX
-40°C to +85°C
-40°C to +125°C
SYMBOL
PARAMETER
TEST CONDITIONS
= 1.2V
UNIT
1
MIN
0.9
1.4
2.0
TYP
MIN
0.9
1.4
2.0
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.0V
HIGH level Input
voltage
V
IH
V
= 2.7 to 3.6V
= 4.5 to 5.5V
= 1.2V
0.7*V
0.7*V
CC
CC
0.3
0.6
0.8
0.3
0.6
0.8
= 2.0V
LOW level Input
voltage
V
IL
V
V
= 2.7 to 3.6V
= 4.5 to 5.5
0.3*V
0.3*V
CC
CC
= 1.2V; V = V or V –I = 100µA
1.2
2.0
2.7
3.0
4.5
I
IH
IL;
O
= 2.0V; V = V or V –I = 100µA
1.8
2.5
2.8
4.3
1.8
2.5
2.8
4.3
I
IH
IL;
O
HIGH level output
voltage; all outputs
= 2.7V; V = V or V –I = 100µA
V
OH
I
IH
IL;
O
= 3.0V; V = V or V –I = 100µA
I
IH
IL;
O
= 4.5V;V = V or V –I = 100µA
I
IH
IL;
O
HIGH level output
voltage;
STANDARD
V
= 3.0V;V = V or V –I = 6mA
2.40
3.60
2.82
4.20
2.20
3.50
CC
CC
I
IH
IL;
O
V
V
V
V
OH
V
= 4.5V;V = V or V –I = 12mA
I
IH
IL;
O
outputs
HIGH level output
voltage; BUS driver
outputs
V
V
= 3.0V;V = V or V –I = 8mA
2.40
3.60
2.82
4.20
2.20
3.50
CC
I
IH
IL;
O
OH
= 4.5V;V = V or V –I = 16mA
CC
I
IH
IL;
O
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2V; V = V or V I
IL; O
= 100µA
= 100µA
= 100µA
0
0
0
0
0
I
IH
= 2.0V; V = V or V
I
0.2
0.2
0.2
0.2
0.2
I
IH
IL; O
LOW level output
= 2.7V; V = V or V
I
0.2
0.2
0.2
V
OL
V
I
IH
IL; O
= 3.0V;V = V or V I
= 100µA
I = 100µA
I
IH
IL; O
= 4.5V;V = V or V
IL; O
I
IH
LOW level output
voltage;
STANDARD
V
= 3.0V;V = V or V I = 6mA
IL; O
0.25
0.35
0.40
0.55
0.50
0.65
CC
CC
I
IH
V
V
V
V
OL
V
= 4.5V;V = V or V I = 12mA
IL; O
I
IH
outputs
LOW level output
voltage; BUS driver
outputs
V
V
= 3.0V;V = V or V
I
= 8mA
0.20
0.35
0.40
0.55
0.50
0.65
CC
I
IH
IL; O
OL
= 4.5V;V = V or V
I
= 16mA
CC
I
IH
IL; O
Input leakage
current
I
V
= 5.5V; V = V or GND
1.0
5
1.0
10
µA
µA
I
CC
I
CC
3-State output
OFF-state current
V
V
= 5.5V; V = V or V
I IH IL;
CC
O
I
OZ
= V or GND
CC
Quiescent supply
current; SSI
V
V
V
V
= 5.5V; V = V or GND; I = 0
20.0
20.0
20.0
500
40
CC
I
CC
O
I
I
µA
CC
Quiescent supply
current; flip-flops
= 5.5V; V = V or GND; I = 0
80
CC
CC
CC
I
CC
O
Quiescent supply
current; MSI
= 5.5V; V = V or GND; I = 0
160
1000
I
CC
O
µA
µA
CC
Quiescent supply
current; LSI
= 5.5V; V = V or GND; I = 0
I
CC
O
Additional
quiescent supply
current per input
∆I
V
CC
= 2.7V to 3.6V; V = V –0.6V
500
850
CC
I
CC
NOTE:
1. All typical values are measured at T
= 25°C.
amb
5
1997 Mar 20
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
AC CHARACTERISTICS
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500Ω
r
f
L
L
LIMITS
–40 to +85 °C
LIMITS
–40 to +125 °C
CONDITION
(V)
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
CC
MIN
–
TYP
90
MAX
–
MIN
–
MAX
–
1.2
2.0
2.7
–
31
39
29
23
19
–
–
49
36
29
24
–
Propagation delay
CP to Qn
–
23
–
t
t
Figure 1
Figure 2
Figure 2
ns
PHL/ PLH
2
3.0 to 3.6
4.5 to 5.5
1.2
–
17
–
–
–
–
–
75
26
19
–
2.0
–
34
25
20
17
–
–
43
31
25
21
–
Propagation delay
OE to Qn
2.7
–
–
t
t
t
ns
ns
PZH/ PZL
2
3.0 to 3.6
4.5 to 5.5
1.2
–
14
–
–
–
–
–
80
29
22
–
2.0
–
39
29
24
20
–
–
48
36
29
24
–
Propagation delay
OE to Qn
2.7
–
–
t
PHZ/ PLZ
2
3.0 to 3.6
4.5 to 5.5
2.0
–
17
–
–
–
12
9
–
34
25
20
–
41
30
24
–
Clock pulse width
HIGH or LOW
2.7
–
–
t
Figure 1
Figure 3
ns
ns
W
2
3.0 to 3.6
1.2
7
–
–
25
9
–
–
2.0
22
16
13
–
–
26
19
15
–
–
Set-up time
Dn to CP
t
su
2.7
6
–
–
2
3.0 to 3.6
1.2
5
–
–
–10
–3
–
–
2.0
5
–
5
–
Hold time
Dn to CP
t
Figure 3
Figure 2
ns
h
2.7
5
–2
–
5
–
2
3.0 to 3.6
2.0
5
–2
–
5
–
15
19
24
40
58
–
12
16
20
–
Maximum clock
2.7
–
–
f
MHz
max
2
3.0 to 3.6
70
–
–
NOTE:
1. Unless otherwise stated, all typical values are at T
= 25°C.
amb
2. Typical value measured at V = 3.3V.
CC
3. Typical value measured at V = 5.0V.
CC
6
1997 Mar 20
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
AC WAVEFORMS
V
V
V
= 1.5V at V w 2.7V v 3.6V
M
CC
= 0.5V * V at V t 2.7V and w 4.5V
M
CC
CC
and V are the typical output voltage drop that occur with the
OL
OH
output load.
V
I
(1)
CP INPUT
GND
V
M
1/f
max
t
t
su
su
t
h
t
h
V
I
CP INPUT
V
M
D
INPUT
GND
V
n
M
t
W
t
t
PLH
PHL
V
OH
90%
Q
n
OUTPUT
V
M
V
M
OUTPUT
Qn
V
OL
10%
NOTE: the shaded areas indicate when the input is permitted to change
for predictable output performance.
t
t
TLH
THL
SV00345
Figure 3. Waveforms showing the data set-up and hold times
for the Dn input to the CP input
SV00343
NOTE:
Figure 1. Waveforms showing the clock (CP) to output (Qn)
propagation delays, the clock pulse width, output transition
times and the maximum clock pulse frequency
The shaded areas indicate when the input is permitted to change for
predictable output performance.
V
I
V
OE INPUT
GND
M
t
t
PLZ
PZL
V
CC
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
PZH
t
PHZ
V
OH
V
Y
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
disabled
outputs
enabled
SV00344
Figure 2. Waveforms showing the 3-state enable and disable
times
7
1997 Mar 20
Philips Semiconductors
Product specification
74LV374
Octal D-type flip-flop; positive edge-trigger (3-State)
TEST CIRCUIT
t
W
V
I
90%
S
90%
1
V
cc
V
Open
GND
S1
V
V
M
M
NEGATIVE
PULSE
10%
10%
90%
0V
(t )
R
R
= 1k
L
L
V
V
O
t
t
(t )
t
TLH
l
THL
TLH
f
r
PULSE
GENERATOR
D.U.T.
(t )
r
t
(t )
THL f
V
= 1k
R
T
I
90%
M
C = 50pF
L
POSITIVE
PULSE
V
V
M
10%
10%
t
W
0V
Test Circuit for Outputs
V
M
= 1.5V
Input Pulse Definition
DEFINITIONS
SWITCH POSITION
R = Load resistor
L
TEST
S
1
V
CC
V
I
V
S1
C = Load capacitance includes jig and probe capacitance
L
t
t
Open
< 2.7V
2.7–3.6V
≥ 4.5 V
V
2 < V
2 < V
2 < V
PLH/ PHL
CC
CC
CC
CC
R = Termination resistance should be equal to Z
T
of
OUT
t
t
V
S1
2.7V
PLZ/ PZL
pulse generators.
t
/t
GND
V
CC
PHZ PZH
SY00044
Figure 4. Load circuitry for switching times
8
1997 Mar 20
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV374
DIP20: plastic dual in-line package; 20 leads (300 mil)
SOT146-1
9
1997 Mar 20
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV374
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
10
1997 Mar 20
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV374
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
11
1997 Mar 20
Philips Semiconductors
Product specification
Octal D-type flip-flop; positive edge-trigger (3-State)
74LV374
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
Preproduction Product
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04448
Document order number:
Philips
Semiconductors
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明