74LVC08APWDH [NXP]
Quad 2-input AND gate; 四2输入与门
| 型号： | 74LVC08APWDH |
| 厂家： | 
NXP |
| 描述： | Quad 2-input AND gate |
| 文件： | 总8页 (文件大小：89K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74LVC08A
Quad 2-input AND gate
Product specification
IC24 Data Handbook
1997 Jun 30
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
FEATURES
• Wide supply voltage range of 1.2 V to 3.6 V
• In accordance with JEDEC standard no. 8-1A
• Inputs accept voltages up to 5.5 V
• CMOS low power consumption
DESCRIPTION
The 74LVC08A is a high-performance, low-power, low-voltage,
Si-gate CMOS device and superior to most advanced CMOS
compatible TTL families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature
allows the use of these devices as translators in a mixed 3.3 V/5 V
environment.
• Direct interface with TTL levels
The 74LVC08A provides the 2-input AND function.
QUICK REFERENCE DATA
GND = 0 V; T
= 25°C; t = t v2.5 ns
amb
r f
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
Propagation delay
nA, nB to nY
C = 50 pF;
L
t
/t
2.6
ns
PHL PLH
V
CC
= 3.3 V
C
Input capacitance
5.0
28
pF
pF
I
C
Power dissipation capacitance per gate
Notes 1 and 2
PD
NOTES:
1. C is used to determine the dynamic power dissipation
PD
(P in µW)
D
2
2
P
D
= C × V
× f )ȍ (C × V
× f ) where:
PD
CC
i
L
CC o
f = input frequency in MHz; C = output load capacity in pF;
i
L
f = output frequency in MHz; V = supply voltage in V;
o
CC
2
ȍ (C × V
× f ) = sum of the outputs.
L
CC
o
2. The condition is V = GND to V
I
CC.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LVC08A D
DWG NUMBER
SOT108-1
14-Pin Plastic SO
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74LVC08A D
74LVC08A DB
74LVC08A PW
14-Pin Plastic SSOP Type II
14-Pin Plastic TSSOP Type I
74LVC08A DB
SOT337-1
74LVC08APW DH
SOT402-1
PIN CONFIGURATION
LOGIC SYMBOL
1A
1
2
1A
1B
1Y
2A
2B
1
2
3
4
5
14
V
1Y
CC
3
1B
13 4B
12 4A
11 4Y
10 3B
2A
2B
4
5
2Y
3Y
4Y
6
3A
3B
9
8
10
4A
4B
2Y
6
7
9
8
3A
3Y
12
13
11
GND
SV00435
SY00034
PIN DESCRIPTION
PIN NUMBER
SYMBOL
1A – 4A
1B – 4B
1Y – 4Y
GND
NAME AND FUNCTION
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
Data inputs
Data outputs
Ground (0 V)
14
V
CC
Positive supply voltage
2
1997 Jun 30
853-1996 18167
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
LOGIC SYMBOL (IEEE/IEC)
LOGIC DIAGRAM (ONE GATE)
A
&
1
3
6
8
2
Y
B
&
&
&
4
5
SV00415
9
FUNCTION TABLE
10
INPUTS
OUTPUTS
12
13
11
nA
nB
nY
SV00436
L
L
H
H
L
H
L
L
L
L
H
H
NOTES:
H = HIGH voltage level
L = LOW voltage level
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
UNIT
MIN
2.7
1.2
0
MAX
3.6
V
V
DC supply voltage (for max. speed performance)
DC supply voltage (for low-voltage applications)
DC input voltage range
V
V
CC
3.6
CC
V
I
5.5
V
V
DC output voltage range; output HIGH or LOW state
Operating ambient temperature range in free-air
0
V
V
O
CC
T
amb
–40
+85
°C
V
CC
V
CC
= 1.2 to 2.7V
= 2.7 to 3.6V
0
0
20
10
t , t
r
Input rise and fall times
ns/V
f
1
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0V).
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
–0.5 to +6.5
–50
UNIT
V
V
CC
I
IK
DC input diode current
V t 0
mA
V
I
V
I
DC input voltage
Note 2
–0.5 to +6.5
"50
I
DC output diode current
V
O
uV or V t 0
mA
V
OK
CC
O
V
O
DC output voltage; output HIGH or LOW state
DC output source or sink current
Note 2
= 0 to V
CC
–0.5 to V +0.5
CC
I
O
V
O
mA
mA
°C
"50
"100
I
, I
DC V or GND current
GND CC
CC
T
stg
Storage temperature range
–65 to +150
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
P
TOT
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
500
500
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3
1997 Jun 30
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
DC CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
1
MIN
TYP
MAX
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.2V
V
CC
V
HIGH level Input voltage
LOW level Input voltage
V
V
IH
= 2.7 to 3.6V
= 1.2V
2.0
GND
0.8
V
IL
= 2.7 to 3.6V
= 2.7V; V = V or V ; I = –12mA
V
V
V
V
*0.5
I
IH
IL
O
CC
CC
CC
CC
= 3.0V; V = V or V ; I = –100µA
*0.2
*0.6
*0.8
V
CC
I
IH
IL
O
V
OH
HIGH level output voltage
LOW level output voltage
V
V
= 3.0V; V = V or V I
= –18mA
I = –24mA
I
IH
IL; O
= 3.0V; V = V or V
IL; O
I
IH
= 2.7V; V = V or V ; I = 12mA
0.40
0.20
0.55
"5
10
I
IH
IL
O
V
OL
= 3.0V; V = V or V ; I = 100µA
I
IH
IL
O
= 3.0V; V = V or V
I = 24mA
IL; O
I
IH
"0.1
I
Input leakage current
= 3.6V; V = 5.5V or GND
µA
µA
I
I
I
Quiescent supply current
= 3.6V; V = V or GND; I = 0
0.1
CC
I
CC
O
Additional quiescent supply current per
input pin
∆I
CC
V
CC
= 2.7V to 3.6V; V = V –0.6V; I = 0
5
500
µA
I
CC
O
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
CC
amb
AC CHARACTERISTICS
GND = 0 V; t = t v 2.5 ns; C = 50 pF
r
f
L
LIMITS
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
CC
= 3.3V ±0.3V
V
CC
= 2.7V
V
CC
= 1.2V
1
MIN
1.5
TYP
MAX
5.1
MIN
TYP
3.0
MAX
6.1
TYP
16
t
t
/
Propagation delay
nA, nB to nY
PHL
1, 2
2.6
1.5
ns
PLH
NOTE:
1. These typical values are at V = 3.3V and T
= 25°C.
amb
CC
AC WAVEFORMS
TEST CIRCUIT
V
V
V
= 1.5 V at V w 2.7 V
M
CC
S
1
= 0.5 S V at V < 2.7 V
M
CC
CC
2 < V
Open
GND
CC
V
CC
and V are the typical output voltage drop that occur with the
OL
OH
output load.
500Ω
500Ω
V
V
O
I
PULSE
GENERATOR
V
D.U.T.
l
nA, nB INPUT
GND
V
M
50pF
C
L
R
T
t
t
PLH
PHL
V
OH
V
V
CC
I
Test
/t
S
1
nY OUTPUT
V
M
t 2.7V
2.7V – 3.6V
V
CC
t
Open
V
PLH PHL
OL
2.7V
SV00414
Waveform 1. Input (nA, nB) to output (nY) propagation delays.
SY00077
Waveform 2. Load circuitry for switching times.
4
1997 Jun 30
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
5
1997 Jun 30
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
6
1997 Jun 30
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
7
1997 Jun 30
Philips Semiconductors
Product specification
Quad 2-input AND gate
74LVC08A
DEFINITIONS
Data Sheet Identification
Product Status
Definition
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Objective Specification
Formative or in Design
Preproduction Product
Full Production
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Preliminary Specification
Product Specification
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1997
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04481
Document order number:
Philips
Semiconductors
相关型号：
©2020 ICPDF网 联系我们和版权申明