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74LVC125PWDH-T [NXP]

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74LVC125PWDH-T
型号： 74LVC125PWDH-T
厂家： NXP    NXP
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驱动器
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INTEGRATED CIRCUITS  
74LVC125  
Quad buffer/line driver; 3-State  
Product specification  
1997 Mar 18  
Supersedes data of February 1996  
IC24 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
FEATURES  
DESCRIPTION  
The 74LVC125 is a high performance, low-power, low-voltage  
Si-gate CMOS device and superior to most advanced CMOS  
compatible TTL families.  
• Wide supply voltage range of 1.2 to 3.6 V  
• In accordance with JEDEC standard no. 8-1A  
• Inputs accept voltages up to 5.5 V  
• CMOS lower power consumption  
• Direct interface with TTL levels  
The 74LVC125 consists of four non-inverting buffers/line drivers with  
3-State outputs. The 3-State outputs (nY) are controlled by the  
output enable input (nOE). A HIGH at nOE causes the outputs to  
assume a high impedance OFF-state.  
• Output drive capability 50 W transmission lines at 85°C  
QUICK REFERENCE DATA  
GND = 0 V; T  
= 25°C; t = t ≤ 2.5 ns  
amb  
r f  
SYMBOL  
PARAMETER  
CONDITIONS  
TYPICAL  
UNIT  
Propagation delay  
nA to nY  
C = 15 pF;  
L
t
/t  
3.5  
ns  
PHL PLH  
V
CC  
= 3.3 V  
C
Input capacitance  
5.0  
22  
pF  
pF  
I
C
Power dissipation capacitance per buffer Notes 1 and 2  
PD  
NOTES:  
1. C is used to determine the dynamic power dissipation (P in µW)  
PD  
D
2
2
P
= C × V  
× f +Σ (C × V  
× f ) where:  
D
PD  
CC  
i
L
CC o  
f = input frequency in MHz; C = output load capacity in pF;  
i
L
f = output frequency in MHz; V = supply voltage in V;  
o
CC  
2
Σ (C × V  
× f ) = sum of the outputs.  
L
CC  
o
2. The condition is V = GND to V  
I
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74LVC125 D  
PKG. DWG. #  
SOT108-1  
SOT337-1  
SOT402-1  
14-Pin Plastic SO  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74LVC125 D  
74LVC125 DB  
74LVC125 PW  
14-Pin Plastic SSOP Type II  
14-Pin Plastic TSSOP Type I  
74LVC125 DB  
74LVC125PW DH  
PIN CONFIGURATION  
LOGIC SYMBOL  
3
6
8
2
1A  
1Y  
2Y  
3Y  
4Y  
1OE  
1A  
1Y  
2OE  
1
14  
13  
V
CC  
2
4OE  
1OE  
2A  
1
5
3
4
5
6
7
12  
11  
10  
9
4A  
4Y  
4
9
2OE  
3A  
2A  
2Y  
3OE  
3A  
GND  
8
3Y  
3OE  
4A  
10  
SV00455  
11  
12  
13  
4OE  
PIN DESCRIPTION  
PIN  
SYMBOL  
NUMBER  
NAME AND FUNCTION  
SV00456  
1, 4, 10, 13 1OE – 4OE Data enable inputs (active LOW)  
2, 5, 9, 12  
1A – 4A  
1Y – 4Y  
GND  
Data inputs  
3, 6, 8, 11  
Data Outputs  
7
Ground (0 V)  
14  
V
CC  
Positive supply voltage  
2
1997 Mar 18  
853–1951 17865  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
FUNCTION TABLE  
LOGIC SYMBOL (IEEE/IEC)  
INPUTS  
OUTPUT  
2
1
nOE  
L
nA  
L
nY  
L
3
6
8
1
EN1  
L
H
H
Z
5
H
X
NOTES:  
4
9
H = HIGH voltage level  
L = LOW voltage level  
X = don’t care  
Z = high impedance OFF-state  
10  
12  
11  
13  
SV00457  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
UNIT  
MAX  
3.6  
V
V
DC supply voltage (for max. speed performance)  
DC supply voltage (for low-voltage applications)  
DC input voltage range  
2.7  
1.2  
0
V
V
CC  
3.6  
CC  
V
I
5.5  
V
V
DC input voltage range for I/Os  
0
V
CC  
V
CC  
V
I/O  
V
DC output voltage range  
0
V
O
T
amb  
Operating free-air temperature range  
–40  
+85  
°C  
V
CC  
V
CC  
= 1.2 to 2.7V  
= 2.7 to 3.6V  
0
0
20  
10  
t , t  
r
Input rise and fall times  
ns/V  
f
1
ABSOLUTE MAXIMUM RATINGS  
In accordance with the Absolute Maximum Rating System (IEC 134).  
Voltages are referenced to GND (ground = 0 V).  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +6.5  
–50  
UNIT  
V
V
CC  
IK  
I
DC input diode current  
DC input voltage  
V t 0  
mA  
V
I
V
I
Note 2  
–0.5 to +5.5  
V
DC input voltage range for I/Os  
DC output diode current  
DC output voltage  
–0.5 to V +0.5  
V
I/O  
OK  
CC  
I
V
uV or V t 0  
"50  
mA  
V
O
CC  
O
V
Note 2  
= 0 to V  
–0.5 to V +0.5  
OUT  
OUT  
CC  
I
DC output source or sink current  
V
O
"50  
"100  
mA  
mA  
°C  
CC  
I
, I  
DC V or GND current  
GND CC  
CC  
T
stg  
Storage temperature range  
–60 to +150  
Power dissipation per package  
– plastic mini-pack (SO)  
– plastic shrink mini-pack (SSOP and TSSOP)  
P
TOT  
above +70°C derate linearly with 8 mW/K  
above +60°C derate linearly with 5.5 mW/K  
500  
500  
mW  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
3
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
DC ELECTRICAL CHARACTERISTICS  
Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).  
LIMITS  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
Temp = -40°C to +85°C  
UNIT  
1
MIN  
TYP  
MAX  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.2V  
V
CC  
V
HIGH level Input voltage  
LOW level Input voltage  
V
V
IH  
= 2.7 to 3.6V  
= 1.2V  
2.0  
GND  
0.8  
V
IL  
= 2.7 to 3.6V  
= 2.7V; V = V or V ; I = –12mA  
V
V
V
V
*0.5  
I
IH  
IL  
O
CC  
CC  
CC  
CC  
= 3.0V; V = V or V ; I = –100µA  
*0.2  
*0.6  
*1.0  
V
CC  
I
IH  
IL  
O
V
OH  
HIGH level output voltage  
LOW level output voltage  
V
= 3.0V; V = V or V I  
= –12mA  
I = –24mA  
I
IH  
IL; O  
= 3.0V; V = V or V  
IL; O  
I
IH  
= 2.7V; V = V or V ; I = 12mA  
0.40  
0.20  
0.55  
"5  
I
IH  
IL  
O
= 3.0V; V = V or V ; I = 100µA  
GND  
V
OL  
V
I
IH  
IL  
O
= 3.0V; V = V or V  
I = 24mA  
IL; O  
I
IH  
I
Input leakage current  
= 3.6V; V = 5.5V or GND Not for I/O pins  
"0.1  
"0.1  
0.1  
µA  
µA  
µA  
µA  
I
I
I
/I  
Input current for common I/O pins  
3-State output OFF-state current  
Quiescent supply current  
= 3.6V; V = V or GND  
"15  
"10  
20  
IHZ ILZ  
I
CC  
I
= 3.6V; V = V or V ; V = V or GND  
I IH IL O CC  
OZ  
CC  
I
= 3.6V; V = V or GND; I = 0  
0.1  
I
CC  
O
Additional quiescent supply current per  
input pin  
∆I  
CC  
V
CC  
= 2.7V to 3.6V; V = V –0.6V; I = 0  
5
500  
µA  
I
CC  
O
NOTE:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
4
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
AC CHARACTERISTICS  
GND = 0 V; t = t = 2.5 ns; C = 50 pF; R = 500W; T  
= –40_C to +85_C.  
r
f
L
L
amb  
LIMITS  
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 3.3V ±0.3V  
V
CC  
= 2.7V  
V = 1.2V  
CC  
UNIT  
1
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
TYP  
t
t
Propagation delay  
nA to nY  
PHL  
PLH  
Figure 1, 3  
Figure 2, 3  
Figure 2, 3  
3.5  
6.5  
7.0  
5.5  
3.9  
4.4  
4.0  
7.0  
ns  
ns  
ns  
t
3-state output enable  
time nOE to nY  
PZH  
3.8  
3.3  
8.0  
6.5  
t
PZL  
t
3-state output disable  
time nOE to nY  
PHZ  
t
PLZ  
NOTE:  
1. These typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
AC WAVEFORMS  
TEST CIRCUIT  
V
V
V
= 1.5 V at V w 2.7 V  
M
CC  
S
= 0.5 × V at V < 2.7 V  
and V are the typical output voltage drop that occur with the  
1
M
CC  
CC  
2 < V  
Open  
CC  
V
CC  
OL  
OH  
GND  
output load.  
500Ω  
500Ω  
V
V
O
I
V
X
V
X
V
Y
V
Y
= V + 0.3 V at V ≥ 2.7 V;  
OL CC  
PULSE  
GENERATOR  
D.U.T.  
= V + 0.1 × V at V < 2.7 V;  
OL  
CC  
CC  
= V – 0.3 V at V ≥ 2.7 V;  
OH  
CC  
50pF  
C
L
R
T
= V – 0.1 × V at V < 2.7 V.  
OH  
CC  
CC  
V
l
Test  
/t  
S
1
nA INPUT  
GND  
V
M
V
V
CC  
I
t
Open  
PLH PHL  
t
t
PLH  
t 2.7V  
2.7V – 3.6V  
V
t
/t  
2 < V  
CC  
CC  
PLZ PZL  
PHL  
V
2.7V  
t
/t  
GND  
OH  
PHZ PZH  
SY00003  
nY OUTPUT  
V
M
Figure 3. Load circuitry for switching times.  
V
OL  
SV00459  
Figure 1. Input (nA) to output (nY) propagation delays.  
V
I
nOE Input  
GND  
V
M
t
t
PZL  
PLZ  
V
CC  
OUTPUT  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
PZH  
t
PHZ  
V
OH  
V
Y
OUTPUT  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
disabled  
outputs  
enabled  
outputs  
enabled  
SV00458  
Figure 2. 3-State enable and disable times.  
5
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
6
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm  
SOT337-1  
7
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
8
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
NOTES  
9
1997 Mar 18  
Philips Semiconductors  
Product specification  
Quad buffer/line driver; 3-State  
74LVC125  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
Preproduction Product  
Full Production  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1997  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Philips  
Semiconductors  

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