74LVC126APW [NXP]
Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state; 四缓冲器/与5V兼容输入/输出线路驱动器;三态
| 型号： | 74LVC126APW |
| 厂家： | 
NXP |
| 描述： | Quad buffer/line driver with 5 Volt tolerant input/outputs; 3-state |
| 文件： | 总20页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVC126A
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
Product specification
2003 Feb 28
Supersedes data of 2002 Mar 8
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
FEATURES
DESCRIPTION
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
The 74LVC126A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families.
Inputs can be driven from either 3.3 or 5 V devices.
In 3-state operation, outputs can handle 5 V.
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
The 74LVC126A consists of four non-inverting buffers/line
drivers with 3-state outputs (nY) which are controlled by
the output enable input (nOE). A LOW at nOE causes the
outputs to assume a high-impedance OFF-state.
• Complies with JEDEC standard no. 8-1A
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
PHL/tPLH
PARAMETER
propagation delay nA to nY
input capacitance
CONDITIONS
TYPICAL
2.4
UNIT
t
CL = 50 pF; VCC = 3.3 V
ns
pF
pF
CI
4.0
12
CPD
power dissipation capacitance per gate VCC = 3.3 V;
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
.
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
TEMPERATURE RANGE
PINS
PACKAGE MATERIAL
CODE
74LVC126AD
74LVC126ADB
74LVC126APW
74LVC126ABQ
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
14
14
14
14
SO14
plastic
plastic
plastic
plastic
SOT108-1
SOT337-1
SOT402-1
SOT762-1
SSOP14
TSSOP14
DHVQFN14
2003 Feb 28
2
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
nOE
nA
nY
H
H
L
L
H
X
L
H
Z
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
1OE
1A
data enable input (active HIGH)
data input
3
1Y
data output
4
2OE
2A
data enable input (active HIGH)
data input
5
6
2Y
data output
7
GND
3Y
ground (0 V)
8
data output
9
3A
data input
10
11
12
13
14
3OE
4Y
data enable input (active HIGH)
data output
4A
data input
4OE
VCC
data enable input (active HIGH)
supply voltage
2003 Feb 28
3
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
V
1OE
1
handbook, halfpage
CC
1OE
1A
1
2
3
4
5
6
7
V
CC
14
13
12
11
10
9
14
1A
2
3
13 4OE
12 4A
4OE
4A
1Y
1Y
2OE
2A
4Y
126
(1)
GND
2OE
2A
4
5
6
11 4Y
3OE
3A
10 3OE
2Y
8
3Y
GND
2Y
9
3A
MNA233
7
8
GND 3Y
Top view
MCE197
* The die substrate is attached to this pad using conductive die attach
material. It can not be used as a supply pin or input.
Fig.1 Pin configuration SO14 and (T)SSOP14.
Fig.2 Pin configuration DHVQFN14.
handbook, halfpage
1A
1Y
2Y
3Y
4Y
3
6
2
2
handbook, halfpage
1
3
1
1OE
2A
1
5
EN1
5
6
4
2OE
3A
4
9
9
8
8
10
3OE
4A
10
12
12
11
13
11
4OE
13
MNA236
MNA235
Fig.3 Logic symbol.
Fig.4 Logic symbol (IEEE/IEC).
2003 Feb 28
4
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
handbook, halfpage
nA
nY
nOE
MNA234
Fig.5 Logic diagram.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
2.7
MAX.
3.6
UNIT
VCC
for maximum speed performance
for low voltage applications
V
1.2
0
3.6
5.5
VCC
5.5
+125
20
V
VI
input voltage
V
VO
output voltage
output HIGH or LOW state
output 3-state
0
V
0
V
Tamb
tr, tf
operating ambient temperature
input rise and fall times
−40
0
°C
VCC = 1.2 to 2.7 V
VCC = 2.7 to 3.6 V
ns/V
ns/V
0
10
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+6.5
UNIT
VCC
IIK
V
input diode current
input voltage
VI < 0
note 1
−
−50
mA
V
VI
−0.5
−
+6.5
±50
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0
mA
V
output HIGH or LOW state; note 1 −0.5
VCC + 0.5
+6.5
±50
output 3-state; note 1
VO = 0 to VCC
−0.5
−
V
IO
output source or sink current
mA
mA
°C
mW
IGND, ICC VCC or GND current
−
±100
+150
500
Tstg
Ptot
storage temperature
power dissipation per package Tamb = −40 to +125 °C; note 2
−65
−
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO14 packages: above 70 °C the value of Ptot derates linearly with 8 mW/K.
For (T)SSOP14 packages: above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C the value of Ptot derates linearly with 4.5 mW/K.
2003 Feb 28
5
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 to +85 °C
VIH
VIL
HIGH-level input
voltage
1.2
VCC
−
−
−
−
−
−
V
V
V
V
2.7 to 3.6
1.2
2.0
−
LOW-level input
voltage
GND
0.8
2.7 to 3.6
−
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −100 µA
IO = −12 mA
IO = −18 mA
IO = −24 mA
VI = VIH or VIL
IO = 100 µA
2.7 to 3.6
2.7
V
V
V
V
CC − 0.2 VCC
−
−
−
−
V
V
V
V
CC − 0.5
CC − 0.6
CC − 0.8
−
−
−
3.0
3.0
VOL
LOW-level output
voltage
2.7 to 3.6
2.7
−
−
−
−
GND
−
0.2
0.4
0.55
±5
V
V
V
IO = 12 mA
IO = 24 mA
3.0
−
ILI
input leakage
current
VI = 5.5 V or GND
3.6
±0.1
µA
IOZ
3-state output
OFF-state current
VI = VIH or VIL;
VO = 5.5 V or GND;
note 2
3.6
−
±0.1
±5
µA
Ioff
power off leakage
supply
VI or VO = 5.5 V
0
−
−
−
±0.1
0.1
5
±10
10
µA
µA
µA
ICC
∆ICC
quiescent supply
current
VI = VCC or GND;
IO = 0
3.6
additional quiescent VI =VCC − 0.6 V;
2.7 to 3.6
500
supply current per
input pin
IO = 0
2003 Feb 28
6
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 to +125 °C
VIH
VIL
HIGH-level input
voltage
1.2
VCC
−
−
−
−
−
−
V
V
V
V
2.7 to 3.6
1.2
2.0
−
LOW-level input
voltage
GND
0.8
2.7 to 3.6
−
VOH
HIGH-level output
voltage
VI = VIH or VIL
IO = −100 µA
IO = −12 mA
IO = −18 mA
IO = −24 mA
VI = VIH or VIL
IO = 100 µA
2.7 to 3.6
2.7
V
V
V
V
CC − 0.3
−
−
−
−
−
−
−
−
V
V
V
V
CC − 0.65
CC − 0.75
CC − 1
3.0
3.0
VOL
LOW-level output
voltage
2.7 to 3.6
2.7
−
−
−
−
−
−
−
−
0.3
0.6
0.8
±20
V
V
V
IO = 12 mA
IO = 24 mA
3.0
ILI
input leakage
current
VI = 5.5 V or GND
3.6
µA
IOZ
3-state output
OFF-state current
VI = VIH or VIL;
VO = 5.5 V or GND;
note 2
3.6
−
−
±20
µA
Ioff
power off leakage
supply
VI or VO = 5.5 V
0.0
−
−
−
−
−
−
±20
40
µA
µA
µA
ICC
∆ICC
quiescent supply
current
VI = VCC or GND;
IO = 0
3.6
additional quiescent VI =VCC − 0.6 V;
2.7 to 3.6
5000
supply current per
input pin
IO = 0
Notes
1. All typical values are measured at Tamb = 25 °C.
2. For I/O ports the parameter IOZ includes the input leakage current.
2003 Feb 28
7
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5 ns.
TEST CONDITIONS
WAVEFORMS VCC (V)
SYMBOL
PARAMETER
MIN.
TYP.(1)
MAX.
UNIT
Tamb = −40 to +85 °C
tPHL/tPLH
propagation delay nA to nY see Figs 6 and 8 1.2
2.7
−
11
−
ns
1.5
1.0
−
2.7
2.4(2)
5.2
4.7
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
3.0 to 3.6
see Figs 7 and 8 1.2
tPZH/tPZL
3-state output enable time
nOE to nY
15
2.7
1.5
1.0
−
3.1
2.9(2)
6.3
5.7
−
3.0 to 3.6
tPHZ/tPLZ
3-state output disable time
nOE to nY
see Figs 7 and 8 1.2
8.0
2.7
1.5
1.3
−
3.8
2.8(2)
6.7
6.0
1.0
3.0 to 3.6
3.0 to 3.6
tsk(0)
skew
note 3
−
Tamb = −40 to +125 °C
tPHL/tPLH
propagation delay nA to nY see Figs 6 and 8 1.2
2.7
−
−
−
−
−
−
−
−
−
−
−
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.5
1.0
−
6.5
6.0
−
3.0 to 3.6
see Figs 7 and 8 1.2
tPZH/tPZL
3-state output enable time
nOE to nY
2.7
1.5
1.0
−
8.0
7.5
−
3.0 to 3.6
tPHZ/tPLZ
3-state output disable time
nOE to nY
see Figs 7 and 8 1.2
2.7
1.5
1.3
−
8.5
7.5
1.5
3.0 to 3.6
3.0 to 3.6
tsk(0)
skew
note 3
Notes
1. Typical values are measured at Tamb = 25 °C.
2. Typical values are measured at VCC = 3.3 V.
3. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
by design.
2003 Feb 28
8
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
AC WAVEFORMS
V
handbook, halfpage
nA input
I
V
M
GND
t
t
PHL
PLH
V
OH
V
nY output
M
V
OL
MNA237
VM = 1.5 V at VCC ≥ 2.7 V;
VM = 0.5VCC at VCC < 2.7 V;
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input nA to output nY propagation delays.
V
I
V
nOE input
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
V
X
OL
t
t
PHZ
PZH
V
OH
V
Y
output
V
HIGH-to-OFF
OFF-to-HIGH
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA684
VM = 1.5 V at VCC ≥ 2.7 V;
VM = 0.5VCC at VCC < 2.7 V;
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.1 V at VCC < 2.7 V;
VY = VOH + 0.3 V at VCC ≥ 2.7 V;
VY = VOH + 0.1 V at VCC < 2.7 V.
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 3-state enable and disable times.
2003 Feb 28
9
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
S1
2 × V
open
GND
CC
V
CC
R
L
500 Ω
V
I
V
O
PULSE
GENERATOR
D.U.T.
C
50 pF
R
L
L
R
T
500 Ω
MNA368
SWITCH POSITION
TEST S1
tPLH/tPHL
PLZ/tPZL
tPHZ/tPZH
VCC
<2.7 V
2.7 to 3.6 V
VI
VCC
2.7 V
open
t
2 × VCC
GND
Definitions for test circuits:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.8 Load circuitry for switching times.
2003 Feb 28
10
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
PACKAGE OUTLINES
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
2003 Feb 28
11
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
7
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT337-1
MO-150
2003 Feb 28
12
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
2003 Feb 28
13
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
14 terminals; body 2.5 x 3 x 0.85 mm
SOT762-1
B
A
D
A
A
1
E
c
detail X
terminal 1
index area
C
terminal 1
index area
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14
13
9
D
h
X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
A
(1)
(1)
UNIT
A
b
c
E
e
e
1
y
D
D
E
L
v
w
y
1
h
h
1
max.
0.05 0.30
0.00 0.18
3.1
2.9
1.65
1.35
2.6
2.4
1.15
0.85
0.5
0.3
mm
0.05
0.1
1
0.2
0.5
2
0.1
0.05
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
02-10-17
03-01-27
SOT762-1
- - -
MO-241
- - -
2003 Feb 28
14
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
SOLDERING
If wave soldering is used the following conditions must be
observed for optimal results:
Introduction to soldering surface mount packages
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
Reflow soldering
The footprint must incorporate solder thieves at the
downstream end.
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferably be kept:
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
• below 220 °C for all the BGA packages and packages
with a thickness 2.5mm and packages with a thickness
<2.5 mm and a volume ≥350 mm3 so called thick/large
packages
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
• below 235 °C for packages with a thickness <2.5 mm
and a volume <350 mm3 so called small/thin packages.
Wave soldering
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
2003 Feb 28
15
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE(1)
WAVE
not suitable
REFLOW(2)
BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA
suitable
DHVQFN, HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP,
HTSSOP, HVQFN, HVSON, SMS
not suitable(3)
suitable
PLCC(4), SO, SOJ
suitable
suitable
LQFP, QFP, TQFP
not recommended(4)(5) suitable
not recommended(6)
suitable
SSOP, TSSOP, VSO, VSSOP
Notes
1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy
from your Philips Semiconductors sales office.
2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder
cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.
4. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not
suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
6. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than
0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
2003 Feb 28
16
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Feb 28
17
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
NOTES
2003 Feb 28
18
Philips Semiconductors
Product specification
Quad buffer/line driver with 5 Volt
tolerant input/outputs; 3-state
74LVC126A
NOTES
2003 Feb 28
19
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
613508/05/pp20
Date of release: 2003 Feb 28
Document order number: 9397 750 10533
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明