74LVC14ADB,653 [NXP]
Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14;
| 型号： | 74LVC14ADB,653 |
| 厂家： | 
NXP |
| 描述： | Inverter, LVC/LCX/Z Series, 6-Func, 1-Input, CMOS, PDSO14 光电二极管 逻辑集成电路 |
| 文件： | 总18页 (文件大小：142K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC14A
Hex inverting Schmitt trigger with 5 V tolerant input
Rev. 6 — 10 June 2016
Product data sheet
1. General description
The 74LVC14A provides six inverting buffers with Schmitt trigger input. It is capable of
transforming slowly-changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage VT+ and the negative voltage VT is defined as the input
hysteresis voltage VH.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as a translator in mixed 3.3 V and 5 V applications.
2. Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
5 V tolerant input for interfacing with 5 V logic
CMOS low-power consumption
Direct interface with TTL levels
Unlimited input rise and fall times
Inputs accept voltages up to 5.5 V
Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Applications
Wave and pulse shapers for highly noisy environments
Astable multivibrators
Monostable multivibrators
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
4. Ordering information
Table 1.
Type number Package
Temperature range Name
Ordering information
Description
Version
74LVC14AD
40 C to +125 C
SO14
plastic small outline package; 14 leads;
body width 3.9 mm
SOT108-1
74LVC14ADB 40 C to +125 C
74LVC14APW 40 C to +125 C
74LVC14ABQ 40 C to +125 C
SSOP14
TSSOP14
plastic thin shrink small outline package; 14 leads;
body width 5.3 mm
SOT337-1
SOT402-1
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1
quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
5. Functional diagram
1
3
2
4
1A
2A
3A
4A
5A
6A
1Y
2Y
3Y
4Y
5Y
6Y
2
1
3
4
5
6
6
5
9
8
8
9
10
12
11
13
11
13
10
12
mna204
001aac497
Fig 1. Logic symbol
Fig 2. IEC logic symbol
A
Y
mna025
Fig 3. Logic diagram for one Schmitt trigger
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
2 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
6. Pinning information
6.1 Pinning
terminal 1
index area
2
3
4
5
6
13
12
11
10
9
1Y
2A
2Y
3A
3Y
6A
6Y
5A
5Y
4A
14A
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1Y
V
CC
6A
6Y
5A
5Y
4A
4Y
(1)
GND
2A
2Y
14A
3A
001aac519
3Y
GND
8
Transparent top view
001aac518
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4. Pin configuration SO14, SSOP14 and
TSSOP14
Fig 5. Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
Pin description
Pin
Description
data input
1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13
1Y, 2Y, 3Y, 4Y, 5Y, 6Y
2, 4, 6, 8, 10, 12
data output
ground (0 V)
supply voltage
GND
VCC
7
14
7. Functional description
Table 3.
Function table[1]
Input nA
Output nY
L
H
L
H
[1] H = HIGH voltage level; L = LOW voltage level
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
3 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
0.5
0.5
0.5
50
-
Max
+6.5
+6.5
VCC + 0.5
-
Unit
V
VCC
VI
supply voltage
[1]
[2]
input voltage
V
VO
IIK
output voltage
V
input clamping current
output clamping current
output current
VI < 0 V
mA
mA
mA
mA
mA
C
IOK
IO
VO > VCC or VO < 0 V
VO = 0 V to VCC
50
50
100
-
-
ICC
IGND
Tstg
Ptot
supply current
-
ground current
100
65
-
storage temperature
total power dissipation
+150
500
[3]
Tamb = 40 C to +125 C
mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO14 packages: Ptot derates linearly with 8 mW/K above 70 C.
For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C.
For DHVQFN14 packages: Ptot derates linearly with 4.5 mW/K above 60 C.
9. Recommended operating conditions
Table 5.
Symbol
VCC
Recommended operating conditions
Parameter
Conditions
Min
1.65
1.2
0
Typ
Max
3.6
-
Unit
V
supply voltage
-
-
-
-
-
functional
V
VI
input voltage
5.5
VCC
+125
V
VO
output voltage
0
V
Tamb
ambient temperature
40
C
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
4 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
40 C to +85 C
Min
Typ[1] Max
40 C to +125 C Unit
Min
Max
VOH
HIGH-level
VI = VT+ or VT
output voltage
IO = 100 A;
VCC 0.2
-
-
VCC 0.3
-
V
VCC = 1.65 V to 3.6 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
IO = 18 mA; VCC = 3.0 V
IO = 24 mA; VCC = 3.0 V
VI = VT+ or VT
1.2
1.8
2.2
2.4
2.2
-
-
-
-
-
-
-
-
-
-
1.05
1.65
2.05
2.25
2.0
-
-
-
-
-
V
V
V
V
V
VOL
LOW-level
voltage output
IO = 100 A; VCC = 1.65 V to 3.6 V
IO = 4 mA; VCC = 1.65 V
IO = 8 mA; VCC = 2.3 V
-
-
-
-
-
-
-
0.2
0.45
0.6
-
-
-
-
-
-
0.3
0.65
0.8
0.6
0.8
V
-
V
-
V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
VCC = 3.6 V; VI = 5.5 V or GND
-
0.4
0.55
5
V
-
V
II
input leakage
current
0.1
20
A
ICC
ICC
CI
supply current VCC = 3.6 V; VI = VCC or GND;
IO = 0 A
-
-
-
0.1
5
10
500
-
-
-
-
40
5000
-
A
A
pF
additional
per input pin; VCC = 2.7 V to 3.6 V;
supply current VI = VCC 0.6 V; IO = 0 A
input
VCC = 0 V to 3.6 V; VI = GND to VCC
4.0
capacitance
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 C.
11. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[2]
tpd
propagation delay
nA to nY; see Figure 6
VCC = 1.2 V
-
16
6.1
3.5
3.6
3.2
-
-
-
-
ns
ns
ns
ns
ns
ns
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
1.0
1.5
1.5
1.0
-
12.7
7.8
7.5
6.4
1.0
1.0
1.5
1.5
1.0
-
14.7
10.0
9.5
VCC = 3.0 V to 3.6 V
VCC = 3.0 V to 3.6 V
8.0
[3]
tsk(o)
output skew time
1.5
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
5 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
[4]
CPD
power dissipation
capacitance
per buffer; VI = GND to VCC
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
-
-
-
9.0
-
-
-
-
-
-
-
-
-
pF
pF
pF
12.5
15.6
VCC = 3.0 V to 3.6 V
[1] Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] PD is used to determine the dynamic power dissipation (PD in W).
.
C
PD = CPD VCC2 fi N + (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in Volts
N = number of inputs switching
(CL VCC2 fo) = sum of the outputs.
12. Waveforms
V
I
V
V
M
nA input
M
GND
t
t
PHL
PLH
V
OH
V
V
M
nY output
M
V
mna344
OL
VM = 1.5 V at VCC 2.7 V
VM = 0.5 VCC at VCC < 2.7 V.
OL and VOH are typical output voltage levels that occur with the output load.
V
Fig 6. Propagation delay input (nA) to output (nY)
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
6 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
t
W
V
I
90 %
negative
pulse
V
V
V
M
M
10 %
0 V
t
t
r
f
t
t
f
r
V
I
90 %
positive
pulse
V
M
M
10 %
0 V
t
W
V
CC
V
V
O
I
PULSE
GENERATOR
DUT
R
T
C
L
R
L
001aaf615
Test data is given in Table 8. Definitions for test circuit:
RL = Load resistance
CL = Load capacitance including jig and probe capacitance
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig 7. Load circuitry for measuring switching times
Table 8.
Test data
Supply voltage
Input
VI
Load
CL
tr, tf
RL
1.2 V
VCC
VCC
VCC
2.7 V
2.7 V
2 ns
2 ns
2 ns
2.5 ns
2.5 ns
30 pF
30 pF
30 pF
50 pF
50 pF
1 k
1 k
500
500
500
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
7 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
13. Transfer characteristics
Table 9.
Transfer characteristics
Voltages are referenced to GND (ground = 0 V); see Figure 8.
Symbol Parameter
Conditions
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit
Min
0.2
0.4
0.6
0.8
0.9
1.1
1.2
1.2
0.12
0.15
0.25
0.4
0.4
0.8
0.8
0.8
0.1
0.2
0.2
0.3
0.3
0.3
0.3
0.3
Max
1.0
1.3
1.5
1.7
1.7
2
Min
0.2
0.4
0.6
0.8
0.9
1.1
1.2
1.2
0.12
0.15
0.25
0.4
0.4
0.8
0.8
0.8
0.1
0.2
0.2
0.3
0.3
0.3
0.3
0.3
Max
1.0
1.3
1.5
1.7
1.7
2
VT+
VT
VH
positive-going
threshold voltage
VCC = 1.2 V
VCC = 1.65 V
VCC = 1.95 V
VCC = 2.3 V
VCC = 2.5 V
VCC = 2.7 V
VCC = 3 V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
2
2
VCC = 3.6 V
VCC = 1.2 V
VCC = 1.65 V
VCC = 1.95 V
VCC = 2.3 V
VCC = 2.5 V
VCC = 2.7 V
VCC = 3 V
2
2
negative-going
threshold voltage
0.75
0.85
0.95
1.1
1.2
1.4
1.5
1.5
1.0
1.15
1.25
1.3
1.3
1.1
1.2
1.2
0.75
0.85
0.95
1.1
1.2
1.4
1.5
1.5
1.0
1.15
1.25
1.3
1.3
1.1
1.2
1.2
V
V
CC = 3.6 V
CC = 1.2 V
hysteresis voltage
(VT+ VT)
VCC = 1.65 V
VCC = 1.95 V
VCC = 2.3 V
VCC = 2.5 V
VCC = 2.7 V
VCC = 3 V
[1]
VCC = 3.6 V
[1] Typical transfer characteristic is displayed in Figure 9.
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
8 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
14. Waveforms transfer characteristics
V
T+
V
O
V
I
V
H
V
T−
V
O
V
I
mna208
V
H
V
V
T+
T−
mna207
V
T at 20 % and VT+ at 70 %
Fig 8. Definition of VT+, VT and VH
mna582
5
I
CC
(mA)
4
3
2
1
0
0
0.6
1.2
1.8
2.4
3
V (V)
I
VCC = 3.3 V.
Fig 9. Typical transfer characteristic
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
9 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
15. Application information
mna581
2.5
I
CC
(mA)
2.0
1.5
1.0
0.5
(1)
(2)
2.1
2.4
2.7
3.0
3.3
3.6
(V)
3.9
V
CC
(1) Positive-going edge.
(2) Negative going-edge.
Linear change of VI between 0.8 V to 2.0 V.
All values given are typical unless otherwise specified.
Fig 10. Average supply current as a function of supply voltage
R
C
mna035
1
T
1
-- ---------------------
at VCC = 3.0 V
f =
0.8 RC
Fig 11. Relaxation oscillator
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
10 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
16. Package outline
SO14: plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
D
E
A
X
v
c
y
H
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
7
e
detail X
w
M
b
p
0
2.5
scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
0.25
0.10
1.45
1.25
0.49
0.36
0.25
0.19
8.75
8.55
4.0
3.8
6.2
5.8
1.0
0.4
0.7
0.6
0.7
0.3
mm
1.75
1.27
0.05
1.05
0.25
0.01
0.25
0.1
0.25
0.01
8o
0o
0.010 0.057
0.004 0.049
0.019 0.0100 0.35
0.014 0.0075 0.34
0.16
0.15
0.244
0.228
0.039 0.028
0.016 0.024
0.028
0.012
inches
0.041
0.01 0.004
0.069
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT108-1
076E06
MS-012
Fig 12. Package outline SOT108-1 (SO14)
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
11 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm
SOT337-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
7
1
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.4
0.9
mm
2
0.25
0.65
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT337-1
MO-150
Fig 13. Package outline SOT337-1 (SSOP14)
74LVC14A
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
12 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
SOT402-1
D
E
A
X
c
y
H
v
M
A
E
Z
8
14
Q
(A )
3
A
2
A
A
1
pin 1 index
θ
L
p
L
1
7
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.72
0.38
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-18
SOT402-1
MO-153
Fig 14. Package outline SOT402-1 (TSSOP14)
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
13 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
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74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
14 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
17. Abbreviations
Table 10. Abbreviations
Acronym
CDM
DUT
Description
Charged Device Model
Device Under Test
ESD
ElectroStatic Discharge
Human Body Model
Machine Model
HBM
MM
TTL
Transistor-Transistor Logic
18. Revision history
Table 11. Revision history
Document ID
74LVC14A v.6
Modifications:
74LVC14A v.5
Modifications:
Release date
20160610
Data sheet status
Change notice
Supersedes
Product data sheet
-
74LVC14A v.5
• Table 4: table note removed (errata).
20111223 Product data sheet
-
74LVC14A v.4
• The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
• Legal texts have been adapted to the new company name where appropriate.
• Table 4, Table 5, Table 6, Table 7 and Table 8: values added for lower voltage ranges.
74LVC14A v.4
74LVC14A v.3
74LVC14A v.2
74LVC14A v.1
20050215
20030228
20020315
19980428
Product data sheet
Product specification
Product specification
Product specification
-
-
-
74LVC14A v.3
74LVC14A v.2
74LVC14A v.1
-
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
15 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
19. Legal information
19.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
19.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
19.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
16 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
19.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
20. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
74LVC14A
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 6 — 10 June 2016
17 of 18
74LVC14A
NXP Semiconductors
Hex inverting Schmitt trigger with 5 V tolerant input
21. Contents
1
2
3
4
5
General description. . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Functional description . . . . . . . . . . . . . . . . . . . 3
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 4
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Transfer characteristics . . . . . . . . . . . . . . . . . . 8
Waveforms transfer characteristics. . . . . . . . . 9
Application information. . . . . . . . . . . . . . . . . . 10
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 15
8
9
10
11
12
13
14
15
16
17
18
19
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 17
19.1
19.2
19.3
19.4
20
21
Contact information. . . . . . . . . . . . . . . . . . . . . 17
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP Semiconductors N.V. 2016.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 10 June 2016
Document identifier: 74LVC14A
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IC LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT-402-1, TSSOP-14, Gate
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