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74LVC162244ADGG,11 [NXP]

74LVC162244A; 74LVCH162244A - 16-bit buffer/line driver TSSOP 48-Pin;
74LVC162244ADGG,11
型号： 74LVC162244ADGG,11
厂家： NXP    NXP
描述：

74LVC162244A; 74LVCH162244A - 16-bit buffer/line driver TSSOP 48-Pin

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74LVC162244A; 74LVCH162244A  
16-bit buffer/line driver; 30 series termination resistors; 5 V  
tolerant input/output; 3-state  
Rev. 6 — 16 December 2011  
Product data sheet  
1. General description  
The 74LVC162244A; 74LVCH162244A are 16-bit non-inverting buffer/line drivers with  
3-state bus compatible outputs. The device can be used as four 4-bit buffers, two 8-bit  
buffers or one 16-bit buffer. It features four output enable inputs, (1OE to 4OE) each  
controlling four of the 3-state outputs. A HIGH on nOE causes the outputs to assume a  
high-impedance OFF-state. The device is designed with 30 series termination resistors  
in both HIGH and LOW output stages to reduce line noise.  
Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be  
applied to the outputs. These features allow the use of these devices in mixed  
3.3 V and 5 V applications.  
The 74LVCH162244A bus hold on data inputs eliminates the need for external pull-up  
resistors to hold unused inputs.  
2. Features and benefits  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low power consumption  
Multibyte flow-through standard pin-out architecture  
Low inductance multiple power and ground pins for minimum noise and ground  
bounce  
Direct interface with TTL levels  
High-impedance when VCC = 0 V  
All data inputs have bus hold. (74LVCH162244A only)  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-B exceeds 200 V  
CDM JESD22-C101E exceeds 1000 V  
Specified from 40 C to +85 C and 40 C to +125 C  
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Temperature range Package  
Name  
SSOP48  
Description  
Version  
74LVC162244ADL  
40 C to +125 C  
40 C to +125 C  
plastic shrink small outline package; 48 leads;  
body width 7.5 mm  
SOT370-1  
74LVCH162244ADL  
74LVC162244ADGG  
74LVCH162244ADGG  
TSSOP48 plastic thin shrink small outline package;  
48 leads; body width 6.1 mm  
SOT362-1  
4. Functional diagram  
1
1A0  
1A1  
1A2  
1A3  
1OE  
2A0  
2A1  
2A2  
2A3  
2OE  
1Y0  
1Y1  
1Y2  
1Y3  
3A0  
3A1  
3A2  
3A3  
3OE  
4A0  
4A1  
4A2  
4A3  
4OE  
3Y0  
1OE  
2OE  
3OE  
4OE  
EN1  
EN2  
EN3  
EN4  
47  
46  
44  
43  
1
2
3
5
6
36  
35  
33  
32  
25  
30  
29  
27  
26  
24  
13  
14  
16  
17  
48  
25  
24  
3Y1  
3Y2  
3Y3  
47  
46  
44  
43  
41  
40  
38  
37  
36  
35  
33  
32  
30  
29  
27  
26  
2
3
1A0  
1A1  
1A2  
1A3  
2A0  
2A1  
2A2  
2A3  
3A0  
3A1  
3A2  
3A3  
4A0  
4A1  
4A2  
4A3  
1
1
1
1
1
2
3
4
1Y0  
1Y1  
1Y2  
1Y3  
2Y0  
2Y1  
2Y2  
2Y3  
3Y0  
3Y1  
3Y2  
3Y3  
4Y0  
4Y1  
4Y2  
4Y3  
5
6
8
9
11  
12  
13  
14  
16  
17  
19  
20  
22  
23  
2Y0  
2Y1  
2Y2  
2Y3  
4Y0  
4Y1  
4Y2  
4Y3  
41  
40  
38  
37  
48  
8
9
19  
20  
22  
23  
11  
12  
001aae506  
001aae231  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
V
CC  
data input  
to internal circuit  
mna705  
Fig 3. Bus hold circuit  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
2 of 15  
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
5. Pinning information  
5.1 Pinning  
1
2
3
4
5
6
7
8
9
48 2OE  
47 1A0  
46 1A1  
45 GND  
44 1A2  
43 1A3  
V
1OE  
1Y0  
1Y1  
GND  
1Y2  
1Y3  
V
CC  
42  
41  
40  
39  
38  
37  
CC  
2A0  
2A1  
GND  
2A2  
2A3  
2Y0  
2Y1  
GND 10  
2Y2 11  
2Y3 12  
162244A  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
36 3A0  
35 3A1  
34 GND  
33 3A2  
32 3A3  
3Y0  
3Y1  
GND  
3Y2  
3Y3  
V
CC  
31  
V
CC  
30 4A0  
29 4A1  
28 GND  
27 4A2  
26 4A3  
4Y0  
4Y1  
GND  
4Y2  
4Y3  
25  
3OE  
4OE  
001aaa252  
Fig 4. Pin configuration SOT370-1 (SSOP48) and SOT362-1 (TSSOP48)  
5.2 Pin description  
Table 2.  
Symbol  
1OE  
Pin description  
Pin  
Description  
1
output enable input (active LOW)  
output enable input (active LOW)  
output enable input (active LOW)  
output enable input (active LOW)  
ground (0 V)  
2OE  
48  
3OE  
25  
4OE  
24  
GND  
4, 10, 15, 21, 28, 34, 39, 45  
7, 18, 31, 42  
47, 46, 44, 43  
41, 40, 38, 37  
36, 35, 33, 32  
30, 29, 27, 26  
2, 3, 5, 6  
VCC  
supply voltage  
1A[0:3]  
2A[0:3]  
3A[0:3]  
4A[0:3]  
1Y[0:3]  
data input  
data input  
data input  
data input  
data output  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
3 of 15  
 
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
Table 2.  
Symbol  
2Y[0:3]  
3Y[0:3]  
4Y[0:3]  
Pin description …continued  
Pin  
Description  
data output  
data output  
dataoutput  
8, 9, 11, 12  
13, 14, 16, 17  
19, 20, 22, 23  
6. Functional description  
Table 3.  
Function table[1]  
Control  
Input  
Output  
nOE  
L
nAn  
L
nYn  
L
L
H
H
H
X
Z
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
IIK  
Parameter  
Conditions  
Min  
0.5  
50  
0.5  
-
Max  
+6.5  
-
Unit  
V
supply voltage  
input clamping current  
input voltage  
VI < 0 V  
mA  
V
[1]  
VI  
+6.5  
50  
VCC + 0.5  
+6.5  
50  
100  
-
IOK  
output clamping current  
output voltage  
VO > VCC or VO < 0 V  
output HIGH or LOW  
output 3-state  
mA  
V
[2]  
[2]  
VO  
0.5  
0.5  
-
V
IO  
output current  
VO = 0 V to VCC  
mA  
mA  
mA  
C  
ICC  
IGND  
Tstg  
Ptot  
supply current  
-
ground current  
100  
65  
-
storage temperature  
total power dissipation  
+150  
500  
[3]  
Tamb = 40 C to +125 C;  
mW  
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.  
[2] The output voltage ratings may be exceeded if the output current ratings are observed.  
[3] Above 60 C the value of Ptot derates linearly with 5.5 mW/K.  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
4 of 15  
 
 
 
 
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
8. Recommended operating conditions  
Table 5.  
Symbol  
VCC  
Recommended operating conditions  
Parameter  
Conditions  
Min  
1.65  
1.2  
0
Typ  
Max  
3.6  
Unit  
V
supply voltage  
-
-
-
-
-
-
-
-
functional  
3.6  
5.5  
V
VI  
input voltage  
V
VO  
output voltage  
output HIGH or LOW  
output 3-state  
0
VCC  
5.5  
+125  
20  
V
0
V
Tamb  
ambient temperature  
in free air  
40  
0
C  
ns/V  
ns/V  
t/V  
input transition rise and fall rate  
VCC = 1.65 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
0
10  
9. Static characteristics  
Table 6.  
Static characteristics  
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C  
Min Max  
1.08  
Unit  
Min  
Typ[1]  
Max  
VIH  
HIGH-level  
VCC = 1.2 V  
1.08  
-
-
-
-
-
-
-
-
-
-
-
-
-
V
V
V
V
V
V
V
V
input voltage  
VCC = 1.65 V to 1.95 V  
0.65 VCC  
-
0.65 VCC  
VCC = 2.3 V to 2.7 V  
1.7  
-
1.7  
VCC = 2.7 V to 3.6 V  
VCC = 1.2 V  
2.0  
-
2.0  
VIL  
LOW-level  
-
-
-
-
0.12  
-
-
-
-
0.12  
input voltage  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VI = VIH or VIL  
0.35 VCC  
0.7  
0.35 VCC  
0.7  
0.8  
0.8  
VOH  
HIGH-level  
output  
IO = 100 A;  
VCC = 1.65 V to 3.6 V  
VCC 0.2  
-
-
VCC 0.3  
-
V
voltage  
IO = 2 mA; VCC = 1.65 V  
IO = 4 mA; VCC = 2.3 V  
IO = 6 mA; VCC = 2.7 V  
IO = 12 mA; VCC = 3.0 V  
VI = VIH or VIL  
1.2  
1.7  
2.2  
2.2  
-
-
-
-
-
-
-
-
1.05  
1.55  
2.05  
2.0  
-
-
-
-
V
V
V
V
VOL  
LOW-level  
output  
voltage  
IO = 100 A;  
-
-
0.2  
-
0.3  
V
VCC = 1.65 V to 3.6 V  
IO = 2 mA; VCC = 1.65 V  
IO = 4 mA; VCC = 2.3 V  
IO = 6 mA; VCC = 2.7 V  
IO = 12 mA; VCC = 3.0 V  
-
-
-
-
-
-
-
-
-
0.45  
0.6  
-
-
-
-
-
0.65  
0.8  
V
V
0.4  
0.6  
V
0.55  
0.8  
V
II  
input  
VCC = 3.6 V;  
0.1 5  
20  
A  
leakage  
current  
VI = 5.5 V or GND  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
5 of 15  
 
 
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
Table 6.  
Static characteristics …continued  
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
40 C to +85 C  
40 C to +125 C  
Unit  
Min  
Typ[1]  
Max  
Min  
Max  
20  
[2]  
IOZ  
OFF-state  
output  
current  
VI = VIH or VIL; VCC = 3.6 V;  
VO = 5.5 V or GND;  
-
-
0.1 5  
-
-
A  
IOFF  
power-off  
leakage  
current  
VCC = 0 V; VI or VO = 5.5 V  
0.1 10  
20  
A  
ICC  
supply  
current  
VCC = 3.6 V;  
VI = VCC or GND; IO = 0 A  
-
-
0.1  
5
20  
-
-
80  
A  
A  
ICC  
additional  
supply  
current  
per input pin;  
VCC = 2.7 V to 3.6 V;  
VI = VCC 0.6 V; IO = 0 A  
500  
5000  
CI  
input  
VCC = 0 V to 3.6 V;  
-
5.0  
-
-
-
pF  
capacitance VI = GND to VCC  
[3][4]  
[3][4]  
[3][5]  
IBHL  
bus hold  
LOW current  
VCC = 1.65; VI = 0.58 V  
10  
30  
-
-
-
-
-
-
-
-
-
-
10  
25  
-
-
-
-
-
-
-
-
-
A  
A  
A  
A  
A  
A  
A  
A  
A  
VCC = 2.3; VI = 0.7 V  
VCC = 3.0; VI = 0.8 V  
VCC = 1.65; VI = 1.07 V  
VCC = 2.3; VI = 1.7 V  
VCC = 3.0; VI = 2.0 V  
VCC = 1.95 V  
-
-
-
-
-
-
-
-
75  
60  
IBHH  
bus hold  
HIGHcurrent  
10  
30  
75  
200  
300  
500  
10  
25  
60  
200  
300  
500  
IBHLO  
bus hold  
LOW  
overdrive  
current  
VCC = 2.7 V  
VCC = 3.6 V  
[3][5]  
IBHHO  
bus hold  
HIGH  
overdrive  
current  
VCC = 1.95 V  
VCC = 2.7 V  
VCC = 3.6 V  
200  
300  
500  
-
-
-
-
-
-
200  
300  
500  
-
-
-
A  
A  
A  
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 C.  
[2] The bus hold circuit is switched off when VI > VCC allowing 5.5 V on the input terminal.  
[3] Valid for data inputs only. Control inputs do not have a bus hold circuit.  
[4] The specified sustaining current at the data input holds the input below the specified VI level.  
[5] The specified overdrive current at the data input forces the data input to the opposite logic input state.  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
6 of 15  
 
 
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
10. Dynamic characteristics  
Table 7.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 7.  
Symbol Parameter  
Conditions  
40 C to +85 C  
Min  
Typ[2] Max  
40 C to +125 C Unit  
Min  
Max  
[1]  
[1]  
[1]  
[3]  
tpd  
propagation  
delay  
nAn to nYn; see Figure 5  
VCC = 1.2 V  
-
11.0  
6.0  
3.2  
3.3  
2.7  
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
1.5  
1.0  
1.0  
1.0  
15.0  
7.4  
6.7  
5.8  
1.5  
1.0  
1.0  
1.0  
17.2  
8.2  
8.5  
7.5  
VCC = 3.0 V to 3.6 V  
nOE to nYn; see Figure 6  
VCC = 1.2 V  
ten  
enable time  
-
15.0  
6.8  
3.8  
4.2  
3.1  
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
1.7  
1.5  
1.5  
1.0  
15.3  
8.0  
7.6  
6.0  
1.7  
1.5  
1.5  
1.0  
17.7  
8.9  
9.5  
7.5  
VCC = 3.0 V to 3.6 V  
nOE to nYn; see Figure 6  
VCC = 1.2 V  
tdis  
disable time  
-
10.0  
3.9  
2.1  
3.1  
2.8  
-
-
-
ns  
ns  
ns  
ns  
ns  
VCC = 1.65 V to 1.95 V  
2.2  
0.5  
1.5  
1.5  
8.2  
4.4  
4.7  
4.5  
2.2  
0.5  
1.5  
1.5  
9.5  
5.0  
6.0  
6.0  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V  
VCC = 3.0 V to 3.6 V  
per input; VI = GND to VCC  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
CPD  
power  
dissipation  
capacitance  
-
-
-
4.8  
8.3  
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
11.4  
[1] tpd is the same as tPLH and tPHL  
ten is the same as tPZL and tPZH  
tdis is the same as tPLZ and tPHZ  
.
.
.
[2] Typical values are measured at Tamb = 25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.  
[3] CPD is used to determine the dynamic power dissipation (PD in W).  
PD = CPD VCC2 fi N + (CL VCC2 fo) where:  
fi = input frequency in MHz; fo = output frequency in MHz  
CL = output load capacitance in pF  
VCC = supply voltage in Volts  
N = number of inputs switching  
(CL VCC2 fo) = sum of the outputs.  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
7 of 15  
 
 
 
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
11. Waveforms  
V
I
nAn input  
GND  
V
V
M
M
t
t
PLH  
PHL  
V
OH  
V
V
M
nYn output  
M
V
OL  
mna171  
Measurement points are given in Table 8.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 5. The input (nAn) to output (nYn) propagation delays  
V
I
nOE input  
GND  
V
M
t
t
PZL  
PLZ  
V
CC  
output  
LOW-to-OFF  
OFF-to-LOW  
V
M
V
X
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
outputs  
enabled  
outputs  
enabled  
outputs  
disabled  
mna362  
Measurement points are given in Table 8.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 6. 3-state enable and disable times.  
Table 8.  
Measurement points  
Supply voltage  
VCC  
VM  
Input  
VI  
Output  
tr = tf  
VX  
VY  
1.2 V  
0.5 VCC  
0.5 VCC  
0.5 VCC  
1.5 V  
VCC  
VCC  
VCC  
2.7 V  
2.7 V  
2.5 ns  
2.5 ns  
2.5 ns  
2.5 ns  
2.5 ns  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.15 V  
VOL + 0.3 V  
VOL + 0.3 V  
VOH 0.15 V  
VOH 0.15 V  
VOH 0.15 V  
VOH 0.3 V  
VOH 0.3 V  
1.65 V to 1.95 V  
2.3 V to 2.7 V  
2.7 V  
3.0 V to 3.6 V  
1.5 V  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
8 of 15  
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 9.  
Definitions for test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
VEXT = External voltage for measuring switching times.  
Fig 7. Test circuit for measuring switching times  
Table 9.  
Test data  
Supply voltage  
Input  
VI  
Load  
CL  
VEXT  
tr, tf  
RL  
tPLH, tPHL  
open  
tPLZ, tPZL  
2 VCC  
2 VCC  
2 VCC  
2 VCC  
2 VCC  
tPHZ, tPZH  
GND  
1.2 V  
VCC  
VCC  
VCC  
2.7 V  
2.7 V  
2 ns  
2 ns  
2 ns  
2.5 ns  
2.5 ns  
30 pF  
30 pF  
30 pF  
50 pF  
50 pF  
1 k  
1 k  
500   
500   
500   
1.65 V to 1.95 V  
2.3 V to 2.7 V  
2.7 V  
open  
GND  
open  
GND  
open  
GND  
3.0 V to 3.6 V  
open  
GND  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
9 of 15  
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
12. Package outline  
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm  
SOT370-1  
D
E
A
X
c
y
H
v
M
A
E
Z
25  
48  
Q
A
2
A
A
(A )  
3
1
θ
pin 1 index  
L
p
L
24  
1
detail X  
w
M
b
p
e
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
E
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
max.  
8o  
0o  
0.4  
0.2  
2.35  
2.20  
0.3  
0.2  
0.22 16.00  
0.13 15.75  
7.6  
7.4  
10.4  
10.1  
1.0  
0.6  
1.2  
1.0  
0.85  
0.40  
mm  
2.8  
0.25  
0.635  
1.4  
0.25  
0.18  
0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT370-1  
MO-118  
Fig 8. Package outline SOT370-1 (SSOP48)  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
10 of 15  
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm  
SOT362-1  
E
D
A
X
c
H
v
M
A
y
E
Z
48  
25  
Q
A
2
(A )  
3
A
A
1
pin 1 index  
θ
L
p
L
detail X  
1
24  
w
M
b
e
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions).  
A
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
8o  
0o  
0.15  
0.05  
1.05  
0.85  
0.28  
0.17  
0.2  
0.1  
12.6  
12.4  
6.2  
6.0  
8.3  
7.9  
0.8  
0.4  
0.50  
0.35  
0.8  
0.4  
mm  
1.2  
0.5  
1
0.25  
0.25  
0.08  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT362-1  
MO-153  
Fig 9. Package outline SOT362-1 (TSSOP48)  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
11 of 15  
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
13. Abbreviations  
Table 10. Abbreviations  
Acronym  
CDM  
CMOS  
DUT  
Description  
Charged Device Model  
Complementary Metal Oxide Semiconductor  
Device Under Test  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
TTL  
Transistor-Transistor Logic  
14. Revision history  
Table 11. Revision history  
Document ID  
Release date Data sheet status  
20111216 Product data sheet  
Change Supersedes  
notice  
74LVC_LVCH162244A v.6  
Modifications:  
-
74LVC_LVCH162244A v.5  
• Maximum propagation delay value for VCC = 1.65 V to 1.95 V at +125 C changed  
from 15.7 ns to 17.2 ns  
• Maximum enable time value for VCC = 1.65 V to 1.95 V at +125 C changed from  
16.1 ns to 17.7 ns  
• Maximum disable time value for VCC = 1.65 V to 1.95 V at +125 C changed from  
8.7 ns to 9.5 ns  
74LVC_LVCH162244A v.5  
Modifications:  
20111108  
Product data sheet  
-
74LVC_LVCH162244A v.4  
• The format of this document has been redesigned to comply with the new identity  
guidelines of NXP Semiconductors.  
• Legal texts have been adapted to the new company name where appropriate.  
• Table 5, Table 6, Table 7 and Table 9: values added for lower voltage ranges.  
74LVC_LVCH162244A v.4  
74LVC_H162244A v.3  
20031212  
Product specification  
Product specification  
Product specification  
Product specification  
-
-
-
-
74LVC_H162244A v.3  
74LVC162244A_LVCH162244A v.3  
74LVC162244A v.2  
19980217  
74LVC162244A_LVCH162244A v.3 19980217  
74LVC162244A v.2  
19970801  
74LVC162244A v.1  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
12 of 15  
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
15. Legal information  
15.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
15.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
15.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
13 of 15  
 
 
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
16. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74LVC_LVCH162244A  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 16 December 2011  
14 of 15  
 
 
74LVC162244A; 74LVCH162244A  
NXP Semiconductors  
16-bit buffer/line driver; 30 resistors; 5 V tolerance; 3-state  
17. Contents  
1
2
3
4
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
6
Functional description . . . . . . . . . . . . . . . . . . . 4  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 5  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 7  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 12  
7
8
9
10  
11  
12  
13  
14  
15  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
15.1  
15.2  
15.3  
15.4  
16  
17  
Contact information. . . . . . . . . . . . . . . . . . . . . 14  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2011.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 16 December 2011  
Document identifier: 74LVC_LVCH162244A  
 

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