74LVC16244A [NXP]
16-bit buffer/line driver; 5V input/output tolerant 3-State; 16位缓冲器/线路驱动器; 5V输入/输出宽容三态型号: | 74LVC16244A |
厂家: | NXP |
描述: | 16-bit buffer/line driver; 5V input/output tolerant 3-State |
文件: | 总18页 (文件大小:114K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVC16244A; 74LVCH16244A
16-bit buffer/line driver; 5 V
input/output tolerant; 3-state
Product specification
2003 Dec 08
Supersedes data of 2003 Jan 30
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
FEATURES
DESCRIPTION
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
• MULTIBYTETM flow-through standard pin-out
architecture
The 74LVC(H)16244A is a high-performance, low power,
low voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 or 5 V devices. In 3-state operation,
outputs can handle 5 Volt. These features allow the use of
these devices as a mixed 3.3 and 5 V environment.
• Low inductance multiple power and ground pins for
minimum noise and ground bounce
The 74LVC(H)16244A is a 16-bit non-inverting buffer/line
driver with 3-state outputs. The device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer. The
device features four Output Enables (1OE, 2OE, 3OE and
4OE), each controlling four of the 3-state outputs. A HIGH
on nOE causes the outputs to assume a high-impedance
OFF-state.
• Direct interface with TTL levels
• All data inputs have bushold (74LVCH16244A only).
• Complies with JEDEC standard no. 8-1A
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
The 74LVC(H)16244A is identical to the 74LVC16240A
but has non-inverting outputs.
• Specified from −40 to +85 °C and −40 to +125 °C.
The 74LVCH16244A bushold data inputs eliminates the
need for external pull-up resistors to hold unused inputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
PARAMETER
CONDITIONS
CL = 50 pF; VCC = 3.3 V
CL = 50 pF; VCC = 3.3 V
TYPICAL
3.0
UNIT
tPHL/tPLH
tPZH/tPZL
tPHZ/tPLZ
CI
propagation delay nAn to nYn
3-state output enable time nOE to nYn
ns
ns
ns
pF
3.5
3.7
5.0
3-state output disable time nOE to nYn CL = 50 pF; VCC = 3.3 V
input capacitance
CPD
power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2
outputs enabled
outputs disabled
12
pF
pF
4.0
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
.
2003 Dec 08
2
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
nYn
nOE
L
nAn
L
H
X
L
H
Z
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF-state.
ORDERING INFORMATION
TYPE NUMBER
PACKAGE
PINS PACKAGE MATERIAL
TEMPERATURE RANGE
−40 to +125 °C
CODE
74LVC16244ADL
74LVCH16244ADL
74LVC16244ADGG
74LVCH16244ADGG
74LVC16244AEV
74LVCH16244AEV
48
48
48
48
56
56
SSOP48
SSOP48
plastic
plastic
plastic
plastic
plastic
plastic
SOT370-1
SOT370-1
SOT362-1
SOT362-1
SOT702-1
SOT702-1
−40 to +125 °C
−40 to +125 °C
TSSOP48
TSSOP48
VFBGA56
VFBGA56
−40 to +125 °C
−40 to +125 °C
−40 to +125 °C
2003 Dec 08
3
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
PINNING
SYMBOL
PIN
BALL
DESCRIPTION
1OE
n.c.
1
−
2
3
A1
output enable input (active LOW)
not connected
data output
A2, A3, A4, A5, K2, K3, K4, K5
1Y0
1Y1
GND
1Y2
1Y3
VCC
2Y0
2Y1
2Y2
2Y3
3Y0
3Y1
3Y2
3Y3
4Y0
4Y1
4Y2
4Y3
4OE
3OE
4A3
4A2
4A1
4A0
3A3
3A2
3A1
3A0
2A3
2A2
2A1
2A0
1A3
1A2
1A1
1A0
2OE
B2
B1
data output
4, 10, 15, 21, 28, 34, 39, 45
B3, B4, D3, D4, G3, G4, J3, J4
ground (0 V)
data output
5
C2
6
C1
data output
7, 18, 31, 42
C3, H3, C4, H4
supply voltage
data output
8
D2
D1
E2
E1
F1
F2
G1
G2
H1
H2
J1
9
data output
11
12
13
14
16
17
19
20
22
23
24
25
26
27
29
30
32
33
35
36
37
38
40
41
43
44
46
47
48
data output
data output
data output
data output
data output
data output
data output
data output
data output
J2
data output
K1
K6
J5
output enable input (active LOW)
output enable input (active LOW)
data input
J6
data input
H5
H6
G5
G6
F5
F6
E6
E5
D6
D5
C6
C5
B6
B5
A6
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
data input
output enable input (active LOW)
2003 Dec 08
4
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
1OE
1Y0
1Y1
GND
1Y2
1Y3
1
2
3
4
5
6
7
8
9
48 2OE
47 1A0
46 1A1
45 GND
44 1A2
43 1A3
V
V
CC
42
CC
2Y0
2Y1
41 2A0
40 2A1
39 GND
38 2A2
37 2A3
36 3A0
35 3A1
34 GND
33 3A2
32 3A3
16244
K
J
H
G
F
E
D
C
B
A
GND 10
2Y2 11
2Y3 12
3Y0 13
16244
14
3Y1
GND 15
3Y2 16
3Y3 17
ball A1
index area
1
2 3 4 5 6
V
CC
V
CC
18
31
001aaa196
4Y0 19
4Y1 20
GND 21
4Y2 22
4Y3 23
4OE 24
30 4A0
29 4A1
28
GND
27 4A2
26 4A3
25 3OE
mna706
Fig.1 Pin configuration SSOP48 and TSSOP48.
Fig.2 Pin configuration VFBGA56.
2003 Dec 08
5
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
2
3
5
6
13
14
16
17
47
36
35
33
handbook, halfpage
1A0
1Y0
1Y1
1Y2
1Y3
3A0
3A1
3A2
3Y0
3Y1
3Y2
3Y3
1
48
25
24
1EN
2EN
3EN
4EN
1OE
2OE
3OE
4OE
46
1A1
44
1A2
2
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1A0
1A1
1A2
1A3
2A0
2A1
2A2
2A3
3A0
3A1
3A2
3A3
4A0
4A1
4A2
4A3
1Y0
1Y1
1Y2
1Y3
2Y0
2Y1
2Y2
2Y3
3Y0
3Y1
3Y2
3Y3
4Y0
4Y1
4Y2
4Y3
1
1
1
1
1
2
3
3
5
43
32
25
1A3
3A3
6
1
1OE
3OE
8
9
11
12
13
14
16
17
19
20
22
23
8
19
20
22
23
41
30
29
27
2A0
2Y0
2Y1
2Y2
2Y3
4A0
4A1
4A2
4Y0
4Y1
4Y2
4Y3
40
9
2A1
11
12
38
2A2
4
37
26
24
2A3
4A3
48
2OE
4OE
mna704
MNA996
Fig.3 Logic symbol.
Fig.4 Logic symbol (IEEE/IEC).
V
handbook, halfpage
CC
data input
to internal circuit
MNA705
Fig.5 Bushold circuit.
6
2003 Dec 08
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
MAX.
UNIT
VCC
for maximum speed
performance
2.7
3.6
V
for low voltage applications
1.2
0
3.6
5.5
V
VI
input voltage
V
VO
output voltage
output HIGH or LOW state
output 3-state
0
VCC
5.5
V
0
V
Tamb
tr, tf
operating ambient
temperature
in free air
−40
+125
°C
input rise and fall times
VCC = 1.2 to 2.7 V
VCC = 2.7 to 3.6 V
0
0
20
10
ns/V
ns/V
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+6.5
UNIT
VCC
IIK
V
input diode current
input voltage
VI < 0
note 1
−
−50
mA
V
VI
−0.5
−
+6.5
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0
±50
mA
V
output HIGH or LOW state;
note 1
−0.5
VCC + 0.5
output 3-state; note 1
VO = 0 to VCC
−0.5
−
+6.5
±50
V
IO
output source or sink current
mA
mA
°C
ICC, IGND VCC or GND current
−
±100
+150
Tstg
Ptot
storage temperature
power dissipation
−65
SSOP and TSSOP package Tamb = −40 to +125 °C; note 2
VFBGA package Tamb = −40 to +125 °C; note 3
−
−
500
mW
mW
1000
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 60 °C the value of Ptot derates linearly with 5.5 mW/K.
3. Above 70 °C the value of Ptot derates linearly with 1.8 mW/K.
2003 Dec 08
7
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 to +85 °C; note 1
VIH
VIL
HIGH-level input voltage
1.2
VCC
−
−
−
−
−
V
2.7 to 3.6
1.2
2.0
−
−
V
V
V
LOW-level input voltage
0
2.7 to 3.6
−
0.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −100 µA
IO = −12 mA
IO = −18 mA
IO = −24 mA
2.7 to 3.6
2.7
V
V
V
V
CC − 0.2
VCC
−
−
−
−
−
V
V
V
V
CC − 0.5
CC − 0.6
CC − 0.8
3.0
−
3.0
−
VOL
LOW-level output voltage
input leakage current
VI = VIH or VIL
IO = 100 µA
IO = 12 mA
IO = 24 mA
2.7 to 3.6
2.7
−
−
−
−
0
0.20
0.40
0.55
±5
V
−
V
3.0
−
V
ILI
VI = 5.5 V or GND;
note 2
3.6
±0.1
µA
IOZ
3-state output OFF-state
current
VI = VIH or VIL;
VO = 5.5 V or GND;
note 2
3.6
−
0.1
±5
µA
Ioff
power-off leakage supply
current
VI or VO = 5.5 V
0.0
−
−
−
0.1
0.1
5
±10
20
500
−
µA
µA
µA
µA
µA
µA
µA
ICC
quiescent supply current
VI = VCC or GND;
IO = 0
3.6
∆ICC
IBH
additional quiescent supply VI = VCC − 0.6 V;
current per input pin
2.7 to 3.6
3.0
IO = 0
bushold LOW sustaining
current
VI = 0.8 V;
notes 3 and 4
75
−
IBHH
IBHLO
IBHHO
bushold HIGH sustaining
current
VI = 2.0 V;
notes 3 and 4
3.0
−75
500
−500
−
−
bushold LOW overdrive
current
notes 3 and 5
3.6
−
−
bushold HIGH overdrive
current
notes 3 and 5
3.6
−
−
2003 Dec 08
8
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
TEST CONDITIONS
OTHER VCC (V)
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Tamb = −40 to +125 °C
VIH
VIL
HIGH-level input voltage
1.2
VCC
−
−
−
−
−
V
2.7 to 3.6
1.2
2.0
−
−
V
V
V
LOW-level input voltage
0
2.7 to 3.6
−
0.8
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −100 µA
IO = −12 mA
IO = −18 mA
IO = −24 mA
2.7 to 3.6
2.7
V
V
V
V
CC − 0.3
−
−
−
−
−
−
−
−
V
V
V
V
CC − 0.65
CC − 0.75
CC − 1
3.0
3.0
VOL
LOW-level output voltage
input leakage current
VI = VIH or VIL
IO = 100 µA
IO = 12 mA
IO = 24 mA
2.7 to 3.6
2.7
−
−
−
−
−
−
−
−
0.3
0.6
0.8
±20
V
V
3.0
V
ILI
VI = 5.5 V or GND;
note 2
3.6
µA
IOZ
3-state output OFF-state
current
VI = VIH or VIL;
VO = 5.5 V or GND;
note 2
3.6
−
−
±20
µA
Ioff
power-off leakage supply
current
VI or VO = 5.5 V
0.0
−
−
−
−
−
−
−
−
−
−
±20
80
5000
−
µA
µA
µA
µA
µA
µA
µA
ICC
quiescent supply current
VI = VCC or GND;
IO = 0
3.6
∆ICC
IBH
additional quiescent supply VI = VCC − 0.6 V;
current per input pin
2.7 to 3.6
3.0
IO = 0
bushold LOW sustaining
current
VI = 0.8 V;
notes 3 and 4
60
IBHH
IBHLO
IBHHO
bushold HIGH sustaining
current
VI = 2.0 V;
notes 3 and 4
3.0
−60
500
−500
−
bushold LOW overdrive
current
notes 3 and 5
3.6
−
bushold HIGH overdrive
current
notes 3 and 5
3.6
−
Notes
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2. For bushold parts, the bushold circuit is switched off when VI > VCC allowing 5.5 V on the input pin.
3. Valid for data inputs of bushold parts (74LVCH16244A) only. For data inputs only, control inputs do not have a
bushold circuit.
4. The specified sustaining current at the data inputs holds the input below the specified VI level.
5. The specified overdrive current at the data input forces the data input to the opposite logic input state.
2003 Dec 08
9
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; RL = 500 Ω.
CONDITIONS
WAVEFORMS VCC (V)
SYMBOL
PARAMETER
MIN.
TYP. MAX. UNIT
Tamb = −40 to +85 °C; note1
tPHL/tPLH propagation delay nAn to nYn
see Figs 6 and 8
1.2
2.7
3.0 to 3.6 1.1
−
11.0
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.0
−
4.7
3.0(2) 4.1
tPZH/tPZL
3-state output enable time nOE to nYn see Figs 7 and 8
3-state output disable time nOE to nYn see Figs 7 and 8
1.2
2.7
−
15.0
−
1.0
−
5.8
3.0 to 3.6 1.0
3.5(2) 4.6
tPHZ/tPLZ
1.2
2.7
−
10.0
−
1.0
−
6.2
3.0 to 3.6 1.8
3.7(2) 5.2
Tamb = −40 to +125 °C
tPHL/tPLH propagation delay nAn to nYn
see Figs 6 and 8
1.2
2.7
−
−
−
−
−
−
−
−
−
−
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.0
6.0
5.5
−
3.0 to 3.6 1.1
tPZH/tPZL
3-state output enable time nOE to nYn see Figs 7 and 8
3-state output disable time nOE to nYn see Figs 7 and 8
1.2
2.7
−
1.0
7.5
6.0
−
3.0 to 3.6 1.0
tPHZ/tPLZ
1.2
2.7
−
1.0
8.0
6.5
3.0 to 3.6 1.8
Notes
1. All typical values are measured at Tamb = 25 °C.
2. These typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2003 Dec 08
10
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
AC WAVEFORMS
V
handbook, halfpage
nAn input
I
V
V
M
M
GND
t
t
PLH
PHL
V
OH
V
V
M
nYn output
M
V
OL
MNA171
INPUT
VCC
VM
VI
tr = tf
1.2 V
2.7 V
0.5 × VCC VCC
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
1.5 V
1.5 V
2.7 V
2.7 V
3.0 to 3.6 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.6 The input nAn to output nYn propagation delays.
2003 Dec 08
11
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
V
I
nOE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PHZ
PZH
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA362
INPUT
VCC
VM
0.5 × VCC VCC
VI
tr = tf
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.1 V at VCC < 2.7 V;
VY = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.1 V at VCC < 2.7 V.
1.2 V
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
2.7 V
1.5 V
1.5 V
2.7 V
2.7 V
3.0 to 3.6 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.7 3-state enable and disable times.
2003 Dec 08
12
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
R
L
L
T
MNA616
VEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
VCC
VI
VCC
CL
RL
1.2 V
2.7 V
50 pF
50 pF
50 pF
500 Ω(1) open
GND
GND
GND
2 × VCC
2 × VCC
2 × VCC
2.7 V
2.7 V
500 Ω
500 Ω
open
open
3.0 to 3.6 V
Note
1. The circuit performs better when RL = 1000 Ω.
Definitions for test circuits:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.8 Load circuitry for switching times.
2003 Dec 08
13
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
PACKAGE OUTLINES
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm
SOT370-1
D
E
A
X
c
y
H
v
M
A
E
Z
25
48
Q
A
2
A
A
(A )
3
1
θ
pin 1 index
L
p
L
24
1
detail X
w
M
b
p
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
E
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
max.
8o
0o
0.4
0.2
2.35
2.20
0.3
0.2
0.22 16.00
0.13 15.75
7.6
7.4
10.4
10.1
1.0
0.6
1.2
1.0
0.85
0.40
mm
2.8
0.25
0.635
1.4
0.25
0.18
0.1
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT370-1
MO-118
2003 Dec 08
14
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
E
D
A
X
c
H
v
M
A
y
E
Z
48
25
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
detail X
1
24
w
M
b
e
p
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions).
A
(1)
(2)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.15
0.05
1.05
0.85
0.28
0.17
0.2
0.1
12.6
12.4
6.2
6.0
8.3
7.9
0.8
0.4
0.50
0.35
0.8
0.4
mm
1.2
0.5
1
0.25
0.25
0.08
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT362-1
MO-153
2003 Dec 08
15
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
VFBGA56: plastic very thin fine-pitch ball grid array package; 56 balls; body 4.5 x 7 x 0.65 mm
SOT702-1
B
A
D
ball A1
index area
A
2
A
E
A
1
detail X
e
1
C
v
M
C
C
A B
b
e
w
M
y
y
C
1
1/2
e
K
J
H
G
F
e
e
2
E
D
C
B
A
1/2
e
X
ball A1
index area
1
2
3
4
5
6
DIMENSIONS (mm are the original dimensions)
A
A
A
b
e
y
UNIT
D
E
e
e
v
w
y
1
1
2
0
2.5
5 mm
1
2
max.
0.3
0.2
0.7
0.6
0.45
0.35
4.6
4.4
7.1
6.9
scale
mm
1
3.25 5.85
0.08
0.1
0.65
0.15 0.08
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
02-08-08
03-07-01
SOT702-1
MO-225
2003 Dec 08
16
Philips Semiconductors
Product specification
16-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVC16244A;
74LVCH16244A
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2003 Dec 08
17
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2003
SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R20/07/pp18
Date of release: 2003 Dec 08
Document order number: 9397 750 12369
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