74LVC377DB,118 [NXP]
74LVC377 - Octal D-type flip-flop with data enable; positive-edge trigger SSOP2 20-Pin;
| 型号： | 74LVC377DB,118 |
| 厂家： | 
NXP |
| 描述： | 74LVC377 - Octal D-type flip-flop with data enable; positive-edge trigger SSOP2 20-Pin PC 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总16页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74LVC377
Octal D-type flip-flop with data enable; positive-edge trigger
Rev. 05 — 21 February 2005
Product data sheet
1. General description
The 74LVC377 is a low-voltage, Si-gate CMOS device superior to most advanced CMOS
compatible TTL families.
The 74LVC377 has eight edge-triggered D-type flip-flops with individual inputs (D) and
outputs (Q). A common clock input (CP) loads all flip-flops simultaneously when data
enable input (E) is LOW. The state of each D input, one set-up time before the
LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the
flip-flop. Input E must be stable only one set-up time prior to the LOW-to-HIGH transition
for predictable operation.
2. Features
■ Wide supply voltage range from 1.2 V to 3.6 V
■ Inputs accept voltages up to 5.5 V
■ CMOS low power consumption
■ Direct interface with TTL levels
■ Output drive capability 50 Ω transmission lines at 125 °C
■ Complies with JEDEC standard:
◆ JESD8-B/JESD36 (2.7 V to 3.6 V)
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; Tamb = 25 °C.
Symbol Parameter
Conditions
Min
Typ
Max Unit
tPHL
tPLH
,
propagation delay CP to VCC = 3.3 V; CL = 50 pF;
-
4.6
-
ns
Qn
RL = 500 Ω
CI
input capacitance
-
-
5.0
-
-
pF
fmax
maximum clock
frequency
VCC = 3.3 V
330
MHz
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
Table 1:
Quick reference data …continued
GND = 0 V; Tamb = 25 °C.
Symbol Parameter
CPD power dissipation
capacitance per flip-flop
Conditions
Min
Typ
Max Unit
[1] [2]
-
22
-
pF
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[2] The condition is VI = GND to VCC
.
4. Ordering information
Table 2:
Type number Package
Temperature range Name
Ordering information
Description
Version
74LVC377D
−40 °C to +125 °C
SO20
plastic small outline package; 20 leads;
body width 7.5 mm
SOT163-1
SOT339-1
SOT360-1
74LVC377DB −40 °C to +125 °C
74LVC377PW −40 °C to +125 °C
SSOP20
plastic shrink small outline package; 20 leads;
body width 5.3 mm
TSSOP20 plastic thin shrink small outline package; 20 leads;
body width 4.4 mm
5. Functional diagram
11
1C2
1
11
CP
G1
3
4
2
5
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
3
2
2D
7
6
4
7
8
5
6
9
8
9
13
14
17
18
12
15
16
19
13
14
17
18
12
15
16
19
E
1
mna918
mna919
Fig 1. Logic symbol
Fig 2. IEC logic symbol
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
2 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
6. Pinning information
6.1 Pinning
E
Q0
D0
D1
Q1
Q2
D2
D3
Q3
1
2
3
4
5
6
7
8
9
20 V
CC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 CP
377
GND 10
mna917
Fig 3. Pin configuration SO20 and (T)SSOP20
6.2 Pin description
Table 3:
Pin description
Symbol
E
Pin
1
Description
data enable input (active LOW)
flip-flop output 0
data input 0
Q0
D0
2
3
D1
4
data input 1
Q1
Q2
D2
5
flip-flop output 1
flip-flop output 2
data input 2
6
7
D3
8
data input 3
Q3
GND
CP
Q4
D4
9
flip-flop output 3
ground (0 V)
10
11
12
13
14
15
16
17
18
19
20
clock input (LOW-to-HIGH; edge-triggered)
flip-flop output 4
data input 4
D5
data input 5
Q5
Q6
D6
flip-flop output 5
flip-flop output 6
data input 6
D7
data input 7
Q7
VCC
flip-flop output 7
power supply
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
3 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
7. Functional description
7.1 Function table
Table 4:
Function table[1]
Operating mode Control
CP
Input
Output
E
I
Dn
h
Qn
Load 1
Load 0
Hold
↑
↑
↑
X
H
I
I
L
h
H
X
X
no change
no change
Do nothing
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;
↑ = LOW-to-HIGH CP transition;
X = don t care.
8. Limiting values
Table 5:
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
V
VCC
VI
supply voltage
input voltage
−0.5 +6.5
[1]
[1]
−0.5 +5.5
V
VO
IIK
output voltage
input diode current
−0.5 VCC + 0.5
V
VI < 0 V
-
-
−50
±50
mA
mA
IO
output source or sink
current
VO = 0 V to VCC
IOK
output diode current
VCC or GND current
VO > VCC or VO < 0 V
-
-
±50
mA
mA
ICC
,
±100
IGND
Tstg
Ptot
storage temperature
total power dissipation
−65
+150
500
°C
[2]
Tamb = −40 °C to +125 °C
-
mW
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SO20 packages: above 70 °C derate linearly with 8 mW/K.
For (T)SSOP20 packages: above 60 °C derate linearly with 5.5 mW/K.
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
4 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
9. Recommended operating conditions
Table 6:
Recommended operating conditions
Symbol Parameter
Conditions
Min
2.7
1.2
0
Typ
Max Unit
VCC
supply voltage
maximum speed performance
low-voltage applications
-
-
-
-
-
-
-
3.6
3.6
5.5
VCC
V
V
V
V
VI
input voltage
VO
output voltage
0
Tamb
tr, tf
ambient temperature in free air
−40
0
+125 °C
input rise and fall
times
VCC = 1.2 V to 2.7 V
VCC = 2.7 V to 3.6 V
20
10
ns/V
ns/V
0
10. Static characteristics
Table 7:
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0V).
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C[1]
VIH
VIL
HIGH-level input voltage
VCC = 1.2 V
VCC
-
-
-
-
-
V
V
V
V
VCC = 2.7 V to 3.6 V
VCC = 1.2 V
2.0
-
LOW-level input voltage
-
-
GND
0.8
VCC = 2.7 V to 3.6 V
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −100 µA; VCC = 2.7 V to 3.6 V
V
V
V
V
CC − 0.2 VCC
-
-
-
-
V
V
V
V
IO = −12 mA; VCC = 2.7 V
IO = −18 mA; VCC = 3.0 V
IO = −24 mA; VCC = 3.0 V
VI = VIH or VIL
CC − 0.5
CC − 0.6
CC − 0.8
-
-
-
VOL
LOW-level output voltage
IO = 100 µA; VCC = 2.7 V to 3.6 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
VCC = 3.6 V; VI = 5.5 V or GND
-
-
-
-
-
-
-
-
0.2
0.4
0.55
±5
V
V
V
ILI
input leakage current
±0.1
µA
µA
ICC
quiescent supply current
VCC = 3.6 V; VI = VCC or GND;
IO = 0 A
0.1
10
∆ICC
additional quiescent supply VCC = 2.7 V to 3.6 V; VI = VCC − 0.6 V;
-
-
5
500
-
µA
current
IO = 0 A
CI
input capacitance
5.0
pF
Tamb = −40 °C to +125 °C
VIH
HIGH-level input voltage
VCC = 1.2 V
VCC
-
-
-
-
-
V
V
V
V
VCC = 2.7 V to 3.6 V
VCC = 1.2 V
2.0
-
VIL
LOW-level input voltage
-
-
GND
0.8
VCC = 2.7 V to 3.6 V
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
5 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
Table 7:
Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0V).
Symbol Parameter Conditions Min
VOH HIGH-level output voltage VI = VIH or VIL
IO = −100 µA; VCC = 2.7 V to 3.6 V
Typ
Max
Unit
V
V
V
V
CC − 0.3 VCC
CC − 0.65 -
CC − 0.75 -
-
-
-
-
V
V
V
V
IO = −12 mA; VCC = 2.7 V
IO = −18 mA; VCC = 3.0 V
IO = −24 mA; VCC = 3.0 V
VI = VIH or VIL
CC − 1
-
VOL
LOW-level output voltage
IO = 100 µA; VCC = 2.7 V to 3.6 V
IO = 12 mA; VCC = 2.7 V
IO = 24 mA; VCC = 3.0 V
VCC = 3.6 V; VI = 5.5 V or GND
-
-
-
-
-
-
-
-
-
-
0.3
0.6
0.8
±20
40
V
V
V
ILI
input leakage current
µA
µA
ICC
quiescent supply current
VCC = 3.6 V; VI = VCC or GND;
IO = 0 A
∆ICC
additional quiescent supply VCC = 2.7 V to 3.6 V; VI = VCC − 0.6 V;
current IO = 0 A
-
-
5
mA
[1] All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
11. Dynamic characteristics
Table 8:
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Tamb = −40 °C to +85 °C[1]
tPHL
tPLH
,
propagation delay
CP to Qn
see Figure 4
VCC= 1.2 V
-
15.0
4.9
-
ns
ns
ns
VCC = 2.7 V
1.5
7.9
7.6
[2]
[2]
VCC = 3.0 V to 3.6 V
1.5
4.6
tW
clock pulse width HIGH or see Figure 4
LOW
VCC= 1.2 V
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
5.0
4
1.6
1.0
VCC = 3.0 V to 3.6 V
tsu
set-up time
E to CP
see Figure 5
VCC = 1.2 V
-
-
-
-
ns
ns
ns
VCC = 2.7 V
5.0
3
0.6
0.2
[2]
[2]
VCC = 3.0 V to 3.6 V
see Figure 5
Dn to CP
VCC = 1.2 V
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
3.0
2.0
1.0
0.7
VCC = 3.0 V to 3.6 V
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
6 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
Table 8:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
th
hold time E to CP
E to CP
see Figure 5
VCC = 1.2 V
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
0
−1.0
[2]
VCC = 3.0 V to 3.6 V
see Figure 5
1.0
0
Dn to CP
VCC = 1.2 V
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
0
0
−1.1
−1.0
VCC = 3.0 V to 3.6 V
fmax
maximum clock frequency see Figure 4
VCC = 1.2 V
-
-
-
MHz
MHz
MHz
ns
VCC = 2.7 V
150
-
-
[2]
[3]
VCC = 3.0 V to 3.6 V
150
330
-
-
tsk(0)
CPD
skew
VCC = 3.0 V to 3.6 V
-
-
1.0
-
[4] [5]
power dissipation
22
pF
capacitance per flip-flop
Tamb = −40 °C to +125 °C
tPHL
tPLH
,
propagation delay
CP to Qn
see Figure 4
VCC= 1.2 V
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
1.5
1.5
10
9.5
VCC = 3.0 V to 3.6 V
tW
clock pulse width HIGH or see Figure 4
LOW
VCC= 1.2 V
-
-
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
5.0
4.0
VCC = 3.0 V to 3.6 V
tsu
set-up time
E to CP
see Figure 5
VCC = 1.2 V
-
-
-
-
ns
ns
ns
VCC = 2.7 V
5.0
3.0
-
-
VCC = 3.0 V to 3.6 V
see Figure 5
Dn to CP
VCC = 1.2 V
-
-
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
3.0
2.0
VCC = 3.0 V to 3.6 V
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
7 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
Table 8:
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
th
hold time E to CP
E to CP
see Figure 5
VCC = 1.2 V
-
-
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
0
VCC = 3.0 V to 3.6 V
see Figure 5
1.0
Dn to CP
VCC = 1.2 V
-
-
-
-
-
-
-
ns
ns
ns
VCC = 2.7 V
0
0
VCC = 3.0 V to 3.6 V
fmax
maximum clock frequency see Figure 4
VCC = 1.2 V
-
-
-
-
-
-
MHz
MHz
MHz
ns
VCC = 2.7 V
150
150
-
-
VCC = 3.0 V to 3.6 V
VCC = 3.0 V to 3.6 V
-
[3]
tsk(0)
skew
1.5
[1] Typical values are measured at Tamb = 25 °C.
[2] Typical value is measured at VCC = 3.3 V.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(CL × VCC2 × fo) = sum of the outputs.
[5] The condition is VI = GND to VCC
.
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
8 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
12. Waveforms
1/f
max
V
I
CP input
V
M
GND
t
W
t
t
PLH
PHL
V
OH
V
Qn output
M
V
OL
mna894
Measurement points are given in Table 9.
Logic levels: VOL and VOH are typical output voltage drop that occur with the output load.
Fig 4. Propagation delay clock (CP) to output (Qn), pulse width clock (CP) and maximum
clock pulse frequency
t
V
W
CC
V
CP input
M
GND
t
t
su
su
V
CC
t
su
V
M
E input
GND
t
t
h
h
V
CC
V
Dn input
M
GND
mna921
Measurement points are given in Table 9.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
Fig 5. Data set-up and hold times of data input (Dn) and enable input (E) and pulse width
of enable input (E)
Table 9:
Measurement points
Supply voltage
VCC
Input
VM
Output
VM
1.2 V
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
1.5 V
2.7 V
3.0 V to 3.6 V
1.5 V
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
9 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
V
EXT
V
CC
R
L
V
I
V
O
PULSE
GENERATOR
D.U.T.
C
L
R
L
R
T
mna616
Test data is given in Table 10.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
CL = Load capacitance including jig and probe capacitance.
RL = Load resistor.
VEXT = Test voltage for switching times.
Fig 6. Load circuitry for switching times
Table 10: Test data
Supply voltage
VCC
Input
VI
Load
CL
VEXT
tr, tf
RL
tPLH, tPHL
open
1.2 V
VCC
≤ 2.5 ns
≤ 2.5 ns
≤ 2.5 ns
50 pF
50 pF
50 pF
500 Ω [1]
500 Ω
500 Ω
2.7 V
2.7 V
2.7 V
open
3.0 V to 3.6 V
open
[1] The circuit performs better when RL = 1000 Ω.
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
10 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
13. Package outline
SO20: plastic small outline package; 20 leads; body width 7.5 mm
SOT163-1
D
E
A
X
c
y
H
E
v
M
A
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
w
detail X
e
M
b
p
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
max.
(1)
(1)
(1)
UNIT
mm
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
θ
1
2
3
p
E
p
Z
0.3
0.1
2.45
2.25
0.49
0.36
0.32
0.23
13.0
12.6
7.6
7.4
10.65
10.00
1.1
0.4
1.1
1.0
0.9
0.4
2.65
0.1
0.25
0.01
1.27
0.05
1.4
0.25
0.01
0.25
0.1
8o
0o
0.012 0.096
0.004 0.089
0.019 0.013 0.51
0.014 0.009 0.49
0.30
0.29
0.419
0.394
0.043 0.043
0.016 0.039
0.035
0.016
inches
0.055
0.01 0.004
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT163-1
075E04
MS-013
Fig 7. Package outline SOT163-1 (SO20)
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
11 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm
SOT339-1
D
E
A
X
v
c
H
M
A
y
E
Z
20
11
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
7.4
7.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
0.9
0.5
mm
2
0.65
0.25
1.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT339-1
MO-150
Fig 8. Package outline SOT339-1 (SSOP20)
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
12 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
SOT360-1
D
E
A
X
c
H
v
M
A
y
E
Z
11
20
Q
A
2
(A )
3
A
A
1
pin 1 index
θ
L
p
L
1
10
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(2)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.
8o
0o
0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
6.6
6.4
4.5
4.3
6.6
6.2
0.75
0.50
0.4
0.3
0.5
0.2
mm
1.1
0.65
0.25
1
0.2
0.13
0.1
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
JEITA
99-12-27
03-02-19
SOT360-1
MO-153
Fig 9. Package outline SOT360-1 (TSSOP20)
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
13 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
14. Revision history
Table 11: Revision history
Document ID
74LVC377_5
Modifications:
Release date Data sheet status
20050221 Product data sheet
Change notice Doc. number
Supersedes
-
9397 750 14589 74LVC377_4
• The format of this data sheet has been redesigned to comply with the new presentation and
information standard of Philips Semiconductors.
• Table 8 “Dynamic characteristics”: changed maximum values of propagation delay tPHL and tPLH
at Tamb = −40 °C to +125 °C and 2.7 V from 7.9 ns into 10.0 ns and at 3.0 V to 3.6 V from 7.6 ns
into 9.5 ns.
74LVC377_4
74LVC377_3
74LVC377_2
74LVC377_1
20040528
20021023
19980729
19960606
Product specification
Product specification
Product specification
Product specification
-
-
-
-
9397 750 10615 74LVC377_3
9397 750 10513 74LVC377_2
9397 750 04508 74LVC377_1
-
-
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
14 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
15. Data sheet status
Level Data sheet status[1] Product status[2] [3]
Definition
I
Objective data
Development
This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II
Preliminary data
Qualification
This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III
Product data
Production
This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1]
[2]
Please consult the most recently issued data sheet before initiating or completing a design.
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3]
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
16. Definitions
17. Disclaimers
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition — Limiting values given are in accordance with
the Absolute Maximum Rating System (IEC 60134). Stress above one or
more of the limiting values may cause permanent damage to the device.
These are stress ratings only and operation of the device at these or at any
other conditions above those given in the Characteristics sections of the
specification is not implied. Exposure to limiting values for extended periods
may affect device reliability.
Right to make changes — Philips Semiconductors reserves the right to
make changes in the products - including circuits, standard cells, and/or
software - described or contained herein in order to improve design and/or
performance. When the product is in full production (status ‘Production’),
relevant changes will be communicated via a Customer Product/Process
Change Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no
license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are
free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
make no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
18. Contact information
For additional information, please visit: http://www.semiconductors.philips.com
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com
9397 750 14589
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 21 February 2005
15 of 16
74LVC377
Philips Semiconductors
Octal D-type flip-flop with data enable; positive-edge trigger
19. Contents
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 1
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
6
6.1
6.2
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
7.1
8
Functional description . . . . . . . . . . . . . . . . . . . 4
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4
Recommended operating conditions. . . . . . . . 5
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 15
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Contact information . . . . . . . . . . . . . . . . . . . . 15
9
10
11
12
13
14
15
16
17
18
© Koninklijke Philips Electronics N.V. 2005
All rights are reserved. Reproduction in whole or in part is prohibited without the prior
written consent of the copyright owner. The information presented in this document does
not form part of any quotation or contract, is believed to be accurate and reliable and may
be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under
patent- or other industrial or intellectual property rights.
Date of release: 21 February 2005
Document number: 9397 750 14589
Published in The Netherlands
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