74LVT126DB-T [NXP]

IC LVT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, 5.30 MM, PLASTIC, MO-150, SOT-337-1, SSOP-14, Bus Driver/Transceiver;
74LVT126DB-T
型号: 74LVT126DB-T
厂家: NXP    NXP
描述:

IC LVT SERIES, QUAD 1-BIT DRIVER, TRUE OUTPUT, PDSO14, 5.30 MM, PLASTIC, MO-150, SOT-337-1, SSOP-14, Bus Driver/Transceiver

驱动 信息通信管理 光电二极管 输出元件 逻辑集成电路
文件: 总15页 (文件大小:81K)
中文:  中文翻译
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74LVT126  
3.3 V quad buffer; 3-state  
Rev. 04 — 11 February 2005  
Product data sheet  
1. General description  
The LVT126 is a high-performance BiCMOS product designed for VCC operation at 3.3 V.  
This device combines low static and dynamic power dissipation with high speed and high  
output drive. The 74LVT126 device is a quad buffer that is ideal for driving bus lines. The  
device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each controlling one  
of the 3-state outputs.  
2. Features  
Quad bus interface  
3-state buffers  
Output capability: +64 mA and 32 mA  
TTL input and output switching levels  
Input and output interface capability to systems at 5 V supply  
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused  
inputs  
Live insertion and extraction permitted  
No bus current loading when output is tied to 5 V bus  
Power-up 3-state  
Latch-up protection:  
JESD78: exceeds 500 mA  
ESD protection:  
MIL STD 883 method 3015: exceeds 2000 V  
Machine model: exceeds 200 V  
3. Quick reference data  
Table 1:  
Quick reference data  
GND = 0 V; Tamb = 25 °C.  
Symbol Parameter  
Conditions  
Min  
Typ  
2.3  
2.4  
4
Max Unit  
tPLH  
tPHL  
CI  
propagation delay nA to nY CL = 50 pF; VCC = 3.3 V  
propagation delay nA to nY CL = 50 pF; VCC = 3.3 V  
-
-
-
-
-
-
-
-
ns  
ns  
pF  
pF  
input capacitance  
output capacitance  
VI = 0 V or VCC  
CO  
outputs disabled;  
VO = 0 V or 3.0 V  
8
ICC  
quiescent supply current  
outputs disabled;  
-
0.13  
-
mA  
VCC = 3.6 V  
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
4. Ordering information  
Table 2:  
Type number Package  
Temperature range Name  
Ordering information  
Description  
Version  
74LVT126D  
40 °C to +85 °C  
SO14  
plastic small outline package; 14 leads; body width 3.9 mm SOT108-1  
74LVT126DB 40 °C to +85 °C  
74LVT126PW 40 °C to +85 °C  
74LVT126BQ 40 °C to +85 °C  
SSOP14  
plastic shrink small outline package; 14 leads; body width SOT337-1  
5.3 mm  
TSSOP14  
plastic thin shrink small outline package; 14 leads; body  
width 4.4 mm  
SOT402-1  
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin SOT762-1  
quad flat package; no leads; 14 terminals;  
body 2.5 × 3 × 0.85 mm  
5. Functional diagram  
2
2
1
5
4
9
1A  
1Y  
2Y  
3Y  
3
6
8
1
3
6
1
5
1OE  
2A  
EN1  
4
2OE  
3A  
9
8
10  
12  
13  
10 3OE  
12 4A  
4Y 11  
11  
13 4OE  
001aac483  
001aac482  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
2 of 15  
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
6. Pinning information  
6.1 Pinning  
terminal 1  
index area  
2
3
4
5
6
13  
12  
11  
10  
9
1A  
4OE  
4A  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1OE  
1A  
V
CC  
1Y  
2OE  
2A  
4OE  
4A  
126  
4Y  
1Y  
(1)  
3OE  
3A  
GND  
2OE  
2A  
126  
4Y  
2Y  
3OE  
3A  
001aac485  
2Y  
Transparent top view  
8
GND  
3Y  
001aac484  
(1) The die substrate is attached to the  
exposed die pad using conductive die  
attach material. It can not be used as  
a supply pin or input.  
Fig 3. Pin configuration SO14, SSOP14  
and TSSOP14  
Fig 4. Pin configuration DHVQFN14  
6.2 Pin description  
Table 3:  
Pin description  
Symbol  
1OE  
1A  
Pin  
1
Description  
1 output enable input  
1 data input  
2
1Y  
3
1 data output  
2OE  
2A  
4
2 output enable input  
2 data input  
5
2Y  
6
2 data output  
GND  
3Y  
7
ground (0 V)  
8
3 data output  
3A  
9
3 data input  
3OE  
4Y  
10  
11  
12  
13  
14  
3 output enable input  
4 data output  
4A  
4 data input  
4OE  
VCC  
4 output enable input  
supply voltage  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
3 of 15  
 
 
 
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
7. Functional description  
7.1 Function table  
Table 4:  
Function table[1]  
Input  
nOE  
H
Output  
nA  
L
nY  
L
H
H
H
Z
L
X
[1] H = HIGH voltage level;  
L = LOW voltage level;  
X = don’t care;  
Z = high-impedance OFF-state.  
8. Limiting values  
Table 5:  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to  
GND (ground = 0 V).  
Symbol  
VCC  
VI  
Parameter  
Conditions  
Min  
0.5  
0.5  
0.5  
Max  
+4.6  
+7.0  
+7.0  
Unit  
V
supply voltage  
input voltage  
output voltage  
[1]  
[1]  
V
VO  
output in OFF-state or  
HIGH-state  
V
IIK  
IOK  
IO  
input diode current  
output diode current  
output current  
VI < 0 V  
-
50  
50  
128  
64  
+150  
150  
mA  
mA  
mA  
mA  
°C  
VO < 0 V  
-
output in LOW-state  
output in HIGH-state  
-
-
Tstg  
Tj  
storage temperature  
junction temperature  
65  
[2]  
-
°C  
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings  
are observed.  
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal  
environment can create junction temperatures which are detrimental to reliability.  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
4 of 15  
 
 
 
 
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
9. Recommended operating conditions  
Table 6:  
Recommended operating conditions  
Conditions  
Symbol Parameter  
Min  
Typ  
Max  
3.6  
5.5  
-
Unit  
V
VCC  
VI  
supply voltage  
2.7  
-
-
-
-
-
-
-
input voltage  
0
V
VIH  
VIL  
IOH  
IOL  
HIGH-level input voltage  
LOW-level input voltage  
HIGH-level output current  
2.0  
V
-
-
-
-
0.8  
32  
32  
V
mA  
mA  
mA  
LOW-level output current none  
current duty cycle  
50 %; f 1 kHz  
64  
t/V  
input transition rise or fall outputs enabled  
rate  
-
-
-
10  
ns/V  
Tamb  
ambient temperature  
in free air  
40  
+85  
°C  
10. Static characteristics  
Table 7:  
Static characteristics  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = 40 °C to +85 °C[1]  
VIK  
input diode voltage  
IIK = 18 mA; VCC = 2.7 V  
-
0.9  
CC 0.1  
1.2  
V
V
VOH  
HIGH-level output voltage IOH = 100 µA;  
V
CC 0.2  
V
-
VCC = 2.7 V to 3.6 V;  
IOH = 8 mA; VCC = 2.7 V  
IOH = 32 mA; VCC = 3.0 V  
VCC = 2.7 V  
2.4  
2.0  
2.5  
2.2  
-
-
V
V
VOL  
LOW-level output voltage  
IOL = 100 µA  
IOL = 24 mA  
-
-
0.1  
0.3  
0.2  
0.5  
V
V
VCC = 3.0 V  
IOL = 16 mA  
-
-
-
0.25  
0.3  
0.4  
V
V
V
IOL = 32 mA  
0.5  
IOL = 64 mA  
0.4  
0.55  
ILI  
input leakage current  
all input pins  
control pins  
VCC = 0 V or 3.6 V; VI = 5.5 V  
VCC = 3.6 V; VCC or GND  
VCC = 3.6 V; VI = VCC  
-
1
10  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
µA  
-
±0.1  
0.1  
1  
±1  
[2]  
[2]  
data pins  
-
1
VCC = 3.6 V; VI = 0 V  
-
5  
IOFF  
power-down output current VCC = 0 V; VI or VO = 0 V to 4.5 V  
-
1
±100  
[3]  
IHOLD  
bus hold current A input  
VCC = 3 V; VI = 0.8 V  
75  
150  
150  
-
-
-
-
VCC = 3 V; VI = 2.0 V  
75  
±500  
VCC = 0 V to 3.6 V; VI = 3.6 V  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
5 of 15  
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
Table 7:  
Static characteristics …continued  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
IEX  
external current into output output in HIGH-state when  
VO > VCC; VO = 5.5 V and  
-
60  
125  
µA  
VCC = 3.0 V  
[4]  
IPU, IPD power-up or power-down  
3-state output current  
V
CC 1.2 V; VO = 0.5 V to VCC  
;
-
±1  
±100  
µA  
VI = GND or VCC; nOE = don’t care  
IOZ  
3-state output current  
VCC = 3.6 V  
output HIGH: VO = 3.0 V  
output LOW: VO = 0.5 V  
-
-
1
5
µA  
µA  
1  
5  
ICC  
quiescent supply current  
VCC = 3.6 V; VI = GND or VCC  
IO = 0 A  
;
outputs HIGH  
outputs LOW  
outputs disabled  
-
-
-
-
0.13  
2
0.19  
7
mA  
mA  
mA  
mA  
[5]  
[6]  
0.13  
0.1  
0.19  
0.2  
ICC  
additional supply current  
per input pin  
VCC = 3 V to 3.6 V; one input at  
VCC 0.6 V and other inputs at  
VCC or GND  
CI  
input capacitance  
output capacitance  
VI = 0 V or VCC  
-
-
4
8
-
-
pF  
pF  
CO  
outputs disabled; VO = 0 V or 3.0 V  
[1] Typical values are measured at nominal VCC and Tamb = 25 °C.  
[2] Unused pins at VCC or GND.  
[3] This is the bus hold overdrive current required to force the input to the opposite logic state.  
[4] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.3 V ± 0.3 V  
a transition time of 100 µs is permitted. This parameter is valid for Tamb = 25 °C only.  
[5] Measured with outputs pulled up to VCC or GND.  
[6] This is the increase in supply current for each input at the specified voltage level other than VCC or GND.  
11. Dynamic characteristics  
Table 8:  
Dynamic characteristics  
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 ; for test circuit see Figure 7.  
Symbol Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Tamb = 40 °C to +85 °C[1]  
tPLH  
tPHL  
tPZH  
tPZL  
propagation delay nA to nY  
VCC = 2.7 V  
-
-
4.5  
3.8  
4.4  
3.9  
6.1  
5.4  
5.8  
5.2  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
VCC = 3.3 V ± 0.3 V  
VCC = 2.7 V  
1.0  
-
2.3  
-
propagation delay nA to nY  
output enable time nOE to nY  
output enable time nOE to nY  
VCC = 3.3 V ± 0.3 V  
VCC = 2.7 V  
1.0  
-
2.4  
-
VCC = 3.3 V ± 0.3 V  
VCC = 2.7 V  
1.0  
-
3.6  
-
VCC = 3.3 V ± 0.3 V  
1.1  
3.6  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
6 of 15  
 
 
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
Table 8:  
Dynamic characteristics …continued  
GND = 0 V; tr = tf = 2.5 ns; CL = 50 pF; RL = 500 ; for test circuit see Figure 7.  
Symbol Parameter  
tPHZ output disable time nOE to nY  
Conditions  
Min  
-
Typ  
-
Max  
4.3  
3.8  
6.1  
5.5  
Unit  
ns  
VCC = 2.7 V  
VCC = 3.3 V ± 0.3 V  
VCC = 2.7 V  
1.0  
-
2.2  
-
ns  
tPLZ  
output disable time nOE to nY  
ns  
VCC = 3.3 V ± 0.3 V  
1.3  
3.6  
ns  
[1] Typical values are at VCC = 3.3 V and Tamb = 25 °C.  
12. Waveforms  
V
I
nA input  
V
M
V
M
GND  
t
t
PLH  
PHL  
V
OH  
V
V
M
nY output  
M
V
OL  
mnb072  
VM = 1.5 V.  
VOL and VOH are typical voltage output drop that occur with the output load.  
Fig 5. Propagation delay input (nA) to output (nY)  
V
I
nOE input  
nY output  
nY output  
V
M
t
GND  
3.5 V  
t
PZL  
PLZ  
V
V
M
M
V
+ 0.3 V  
OL  
V
OL  
t
t
PHZ  
PZH  
V
OH  
V
0.3 V  
OH  
0 V  
001aac486  
VM = 1.5 V.  
VOL and VOH are typical voltage output drop that occur with the output load.  
Fig 6. Enable and disable times of 3-state outputs  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
7 of 15  
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
t
W
V
I
90 %  
90 %  
negative  
pulse  
V
V
M
M
10 %  
0 V  
t
(t )  
f
t
(t )  
TLH r  
THL  
t
(t )  
t
(t )  
THL f  
TLH  
r
V
I
90 %  
positive  
pulse  
V
M
V
M
10 %  
10 %  
0 V  
t
W
001aac221  
VM = 1.5 V.  
a. Input pulse definition  
V
EXT  
V
CC  
R
L
V
I
V
O
PULSE  
GENERATOR  
D.U.T.  
C
L
R
L
R
T
mna616  
Test data is given in Table 9.  
Definitions test circuit:  
RL = Load resistor.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.  
VEXT = Test voltage for switching times.  
b. Test circuit  
Fig 7. Load circuitry for switching times  
Table 9:  
Input  
VI  
Test data  
Load  
CL  
VEXT  
fi  
tW  
tr, tf  
RL  
tPHZ, tPZH tPLZ, tPZL  
tPLH, tPHL  
2.7 V  
10 MHz 500 ns  
2.5 ns 50 pF  
500 GND  
6 V  
open  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
8 of 15  
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
13. Package outline  
SO14: plastic small outline package; 14 leads; body width 3.9 mm  
SOT108-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
1
7
e
detail X  
w
M
b
p
0
2.5  
scale  
5 mm  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.  
0.25  
0.10  
1.45  
1.25  
0.49  
0.36  
0.25  
0.19  
8.75  
8.55  
4.0  
3.8  
6.2  
5.8  
1.0  
0.4  
0.7  
0.6  
0.7  
0.3  
mm  
1.75  
1.27  
0.05  
1.05  
0.25  
0.01  
0.25  
0.1  
0.25  
0.01  
8o  
0o  
0.010 0.057  
0.004 0.049  
0.019 0.0100 0.35  
0.014 0.0075 0.34  
0.16  
0.15  
0.244  
0.228  
0.039 0.028  
0.016 0.024  
0.028  
0.012  
inches  
0.041  
0.01 0.004  
0.069  
Note  
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT108-1  
076E06  
MS-012  
Fig 8. Package outline SO14 (SOT108-1)  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
9 of 15  
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm  
SOT337-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
7
1
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
E
max.  
8o  
0o  
0.21  
0.05  
1.80  
1.65  
0.38  
0.25  
0.20  
0.09  
6.4  
6.0  
5.4  
5.2  
7.9  
7.6  
1.03  
0.63  
0.9  
0.7  
1.4  
0.9  
mm  
2
0.25  
0.65  
1.25  
0.2  
0.13  
0.1  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT337-1  
MO-150  
Fig 9. Package outline SSOP14 (SOT337-1)  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
10 of 15  
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm  
SOT402-1  
D
E
A
X
c
y
H
v
M
A
E
Z
8
14  
Q
(A )  
3
A
2
A
A
1
pin 1 index  
θ
L
p
L
1
7
detail X  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
Q
v
w
y
Z
θ
1
2
3
p
E
p
max.  
8o  
0o  
0.15  
0.05  
0.95  
0.80  
0.30  
0.19  
0.2  
0.1  
5.1  
4.9  
4.5  
4.3  
6.6  
6.2  
0.75  
0.50  
0.4  
0.3  
0.72  
0.38  
mm  
1.1  
0.65  
0.25  
1
0.2  
0.13  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-18  
SOT402-1  
MO-153  
Fig 10. Package outline TSSOP14 (SOT402-1)  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
11 of 15  
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;  
14 terminals; body 2.5 x 3 x 0.85 mm  
SOT762-1  
B
A
D
A
A
1
E
c
detail X  
terminal 1  
index area  
C
terminal 1  
index area  
e
1
y
y
e
b
v
M
C
C
A
B
C
1
w
M
2
6
L
1
7
8
E
h
e
14  
13  
9
D
h
X
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
(1)  
(1)  
UNIT  
A
1
b
c
E
e
e
1
y
D
D
E
L
v
w
y
h
h
1
max.  
0.05 0.30  
0.00 0.18  
3.1  
2.9  
1.65  
1.35  
2.6  
2.4  
1.15  
0.85  
0.5  
0.3  
mm  
0.05  
0.1  
1
0.2  
0.5  
2
0.1  
0.05  
Note  
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
02-10-17  
03-01-27  
SOT762-1  
- - -  
MO-241  
- - -  
Fig 11. Package outline DHVQFN14 (SOT762-1)  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
12 of 15  
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
14. Revision history  
Table 10: Revision history  
Document ID  
74LVT126_4  
Modifications:  
Release date Data sheet status  
20050211 Product data sheet  
Change notice Doc. number  
Supersedes  
-
9397 750 14553 74LVT126_3  
The format of this data sheet has been redesigned to comply with the new presentation and  
information standard of Philips Semiconductors.  
Figure 4: added Figure note 1.  
74LVT126_3  
74LVT126_2  
74LVT126_1  
20040624  
19980219  
-
Product data sheet  
-
-
-
9397 750 13542 74LVT126_2  
9397 750 03515 74LVT126_1  
Product specification  
-
-
-
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
13 of 15  
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
15. Data sheet status  
Level Data sheet status[1] Product status[2] [3]  
Definition  
I
Objective data  
Development  
This data sheet contains data from the objective specification for product development. Philips  
Semiconductors reserves the right to change the specification in any manner without notice.  
II  
Preliminary data  
Qualification  
This data sheet contains data from the preliminary specification. Supplementary data will be published  
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in  
order to improve the design and supply the best possible product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant  
changes will be communicated via a Customer Product/Process Change Notification (CPCN).  
[1]  
[2]  
Please consult the most recently issued data sheet before initiating or completing a design.  
The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at  
URL http://www.semiconductors.philips.com.  
[3]  
For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
16. Definitions  
17. Disclaimers  
Short-form specification The data in a short-form specification is  
extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Life support — These products are not designed for use in life support  
appliances, devices, or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors  
customers using or selling these products for use in such applications do so  
at their own risk and agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in accordance with  
the Absolute Maximum Rating System (IEC 60134). Stress above one or  
more of the limiting values may cause permanent damage to the device.  
These are stress ratings only and operation of the device at these or at any  
other conditions above those given in the Characteristics sections of the  
specification is not implied. Exposure to limiting values for extended periods  
may affect device reliability.  
Right to make changes — Philips Semiconductors reserves the right to  
make changes in the products - including circuits, standard cells, and/or  
software - described or contained herein in order to improve design and/or  
performance. When the product is in full production (status ‘Production’),  
relevant changes will be communicated via a Customer Product/Process  
Change Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no  
license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are  
free from patent, copyright, or mask work right infringement, unless otherwise  
specified.  
Application information Applications that are described herein for any  
of these products are for illustrative purposes only. Philips Semiconductors  
make no representation or warranty that such applications will be suitable for  
the specified use without further testing or modification.  
18. Contact information  
For additional information, please visit: http://www.semiconductors.philips.com  
For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com  
9397 750 14553  
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.  
Product data sheet  
Rev. 04 — 11 February 2005  
14 of 15  
 
 
 
 
74LVT126  
Philips Semiconductors  
3.3 V quad buffer; 3-state  
19. Contents  
1
2
3
4
5
General description . . . . . . . . . . . . . . . . . . . . . . 1  
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Quick reference data . . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
6
6.1  
6.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
7.1  
8
Functional description . . . . . . . . . . . . . . . . . . . 4  
Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 5  
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 6  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 14  
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Contact information . . . . . . . . . . . . . . . . . . . . 14  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
© Koninklijke Philips Electronics N.V. 2005  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior  
written consent of the copyright owner. The information presented in this document does  
not form part of any quotation or contract, is believed to be accurate and reliable and may  
be changed without notice. No liability will be accepted by the publisher for any  
consequence of its use. Publication thereof does not convey nor imply any license under  
patent- or other industrial or intellectual property rights.  
Date of release: 11 February 2005  
Document number: 9397 750 14553  
Published in The Netherlands  

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