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74LVT240DB,112 [NXP]

74LVT240 - ABT octal inverting buffer (3-State) SSOP2 20-Pin;
74LVT240DB,112
型号： 74LVT240DB,112
厂家： NXP    NXP
描述：

74LVT240 - ABT octal inverting buffer (3-State) SSOP2 20-Pin

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INTEGRATED CIRCUITS  
74LVT240  
ABT octal inverting buffer (3-State)  
Product specification  
1998 Feb 19  
Supersedes data of 1994 May 16  
IC23 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
FEATURES  
• Octal bus interface  
• 3-State buffers  
• Output capability: +64mA/-32mA  
• TTL input and output switching levels  
• Input and output interface capability to systems at 5V supply  
DESCRIPTION  
The LVT240 is a high-performance BiCMOS product designed for  
operation at 3.3V.  
V
CC  
This device is an octal inverting buffer that is ideal for driving bus  
lines. The device features two Output Enables (1OE, 2OE), each  
controlling four of the 3-State outputs.  
• Bus-hold data inputs eliminate the need for external pull-up  
resistors to hold unused inputs  
• Power-up 3-State  
• Live insertion/extraction permitted  
• No bus current loading when output is tied to 5V bus  
• Latch-up protection exceeds 500mA per JEDEC Std 17  
• ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
nAx to nYx  
C = 50pF;  
2.5  
2.6  
PLH  
PHL  
L
ns  
V
CC  
= 3.3V  
C
Input capacitance  
Output capacitance  
Total supply current  
V = 0V or 3.0V  
4
8
pF  
pF  
IN  
I
C
Outputs disabled; V = 0V or 3.0V  
O
OUT  
CCZ  
I
Outputs disabled; V = 3.6V  
0.12  
mA  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
DWG NUMBER  
SOT163-1  
20-Pin Plastic SOL  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74LVT240 D  
74LVT240 DB  
74LVT240 PW  
74LVT240 D  
74LVT240 DB  
20-Pin Plastic SSOP Type II  
20-Pin Plastic TSSOP Type I  
SOT339-1  
74LVT240PW DH  
SOT360-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN NUMBER  
2, 4, 6, 8  
11, 13, 15, 17  
18, 16, 14, 12  
9, 7, 5, 3  
1, 19  
SYMBOL  
NAME AND FUNCTION  
Data inputs  
1A0 – 1A3  
2A0 – 2A3  
1Y0 – 1Y3  
2Y0 – 2Y3  
1OE, 2OE  
GND  
Data inputs  
20  
1OE  
1A0  
2Y3  
1A1  
2Y2  
1A2  
2Y1  
1A3  
2Y0  
1
2
3
4
5
6
7
8
9
V
CC  
19 2OE  
18 1Y0  
17 2A3  
16 1Y1  
15 2A2  
14 1Y2  
13 2A1  
12 1Y3  
Data outputs  
Data outputs  
Output enables  
Ground (0V)  
10  
20  
V
CC  
Positive supply voltage  
GND 10  
11  
2A0  
SV00006  
2
1998 Feb 19  
853-1744 18991  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
LOGIC SYMBOL  
LOGIC SYMBOL (IEEE/IEC)  
1Y0  
1A0  
2
18  
1
EN  
1Y1  
1Y2  
1Y3  
1A1  
1A2  
1A3  
1OE  
2A0  
2A1  
4
6
16  
14  
12  
2
4
6
8
18  
16  
14  
12  
8
1
2Y0  
2Y1  
11  
13  
9
7
19  
EN  
2Y2  
2Y3  
2A2  
2A3  
2OE  
15  
17  
5
3
11  
13  
15  
17  
9
7
5
3
19  
SV00007  
SV00008  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
nOE  
L
nAx  
L
nYx  
H
L
H
L
H
X
Z
H = High voltage level  
L = Low voltage level  
X = Don’t care  
Z = High impedance “Off” state  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
CONDITIONS  
RATING  
UNIT  
V
DC supply voltage  
–0.5 to +4.6  
–0.5 to +7.0  
–0.5 to +7.0  
128  
V
V
V
CC  
3
V
DC input voltage  
I
3
V
OUT  
DC output voltage  
DC output current  
Output in Off or High state  
Output in Low state  
I
mA  
OUT  
Output in High state  
–64  
I
DC input diode current  
DC output diode current  
Storage temperature range  
V < 0  
–50  
mA  
mA  
°C  
IK  
I
I
V
O
< 0  
–50  
OK  
T
stg  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.  
3
1998 Feb 19  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
SYMBOL  
PARAMETER  
UNIT  
MIN  
2.7  
0
MAX  
3.6  
V
CC  
DC supply voltage  
V
V
V
I
Input voltage  
5.5  
V
High-level input voltage  
Low-level Input voltage  
High-level output current  
Low-level output current  
2.0  
V
IH  
V
0.8  
–32  
32  
V
IL  
I
mA  
OH  
I
OL  
mA  
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz  
Input transition rise or fall rate; outputs enabled  
Operating free-air temperature range  
64  
∆t/∆v  
10  
ns/V  
T
amb  
–40  
+85  
°C  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
SYMBOL  
PARAMETER  
Input clamp voltage  
TEST CONDITIONS  
T
= -40°C to +85°C  
UNIT  
amb  
1
MIN  
TYP  
MAX  
V
IK  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 2.7V; I = –18mA  
0.9  
–1.2  
V
V
V
V
I
= 2.7 to 3.6V; I = –100µA  
V
-0.2  
V
CC  
-0.1  
OH  
CC  
V
OH  
High-level output voltage  
= 2.7V; I = –8mA  
2.4  
2.5  
OH  
= 3V; I = –32mA  
2
2.2  
0.1  
0.3  
0.25  
0.3  
0.4  
1
OH  
= 2.7V; I = 100µA  
0.2  
0.5  
0.4  
0.5  
0.55  
10  
OL  
= 2.7V; I = 24mA  
OL  
V
OL  
Low-level output voltage  
= 3V; I = 16mA  
V
OL  
= 3V; I = 32mA  
OL  
= 3V; I = 64mA  
OL  
= 0 or 3.6V; V = 5.5V  
I
= 3.6V; V = V or GND  
Control pins  
±0.1  
0.1  
–1  
±1  
I
CC  
CC  
I
I
Input leakage current  
µA  
= 3.6V; V = V  
1
I
4
Data pins  
= 3.6V; V = 0  
-5  
I
I
Output off current  
Bus Hold current A  
= 0V; V or V = 0 to 4.5V  
1
±100  
µA  
µA  
OFF  
I
O
= 3V; V = 0.8V  
75  
150  
–150  
I
= 3V; V = 2.0V  
–75  
I
I
HOLD  
NO TAG  
inputs  
= 0V to 3.6V; V = 3.6V  
±500  
CC  
Current into an output in the  
I
V
= 5.5V; V = 3.0V  
60  
125  
µA  
µA  
EX  
O
CC  
High state when V > V  
O
CC  
Power up/down 3-State  
V
CC  
= ≤ 1.2V; V = 0.5V to V ; V = GND or V  
;
CC  
O
CC  
I
I
±1  
±100  
PU/PD  
3
output current  
OE/OE = Don’t care  
I
3-State output High current  
3-State output Low current  
V
V
V
V
V
= 3.6V; V = 3.0V  
1
–1  
0.12  
3
5
–5  
µA  
µA  
OZH  
CC  
CC  
CC  
CC  
CC  
O
I
= 3.6V; V = 0.5V  
O
OZL  
I
I
= 3.6V; Outputs High, V = GND or V I 0  
CC, O =  
0.19  
12  
CCH  
I
I
Quiescent supply current  
= 3.6V; Outputs Low, V = GND or V I 0  
CC, O =  
mA  
mA  
CCL  
I
= 3.6V; Outputs Disabled; V = GND or V  
I
CC, O =  
I
0.12  
0.1  
0.19  
0.2  
CCZ  
NO TAG  
0
Additional supply current  
V
CC  
= 3.0 to 3.6V; One input at V -0.6V;  
CC  
∆I  
CC  
2
per input pin  
Other inputs at V or GND  
CC  
NOTES:  
1. All typical values are at T  
= 25°C.  
amb  
2. This is the increase in supply current for each input at V –0.6V.  
CC  
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 10% a  
CC  
CC  
CC  
transition time of 100µsec is permitted. This parameter is valid for T  
= 25°C, only.  
amb  
4. Unused pins at V or GND  
CC  
5. I  
is measured with outputs pulled to V or GND.  
CCZ  
CC  
6. This is the bus hold overdrive current required to force the input to the opposite logic state.  
4
1998 Feb 19  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
AC CHARACTERISTICS  
GND = 0V; t = t = 2.5ns; C = 50pF; R = 500Ω;T  
= –40°C to +85°C.  
R
F
L
L
amb  
LIMITS  
T
= –40°C to +85°C  
amb  
V
SYMBOL  
PARAMETER  
WAVEFORM  
V
CC  
= 2.7V  
UNIT  
= +3.3V ±0.3V  
CC  
1
MIN  
TYP  
MAX  
MAX  
t
t
Propagation delay  
nAx to nYx  
1
1
2.5  
2.5  
4.3  
4.3  
5.2  
5.0  
PLH  
PHL  
1
2
2
ns  
ns  
ns  
t
Output enable time  
to High and Low level  
1
1
3.7  
3.1  
5.2  
5.2  
6.3  
6.7  
PZH  
t
PZL  
t
Output disable time  
from High and Low level  
2
1.6  
3.4  
3.2  
5.6  
5.1  
6.3  
5.6  
PHZ  
t
PLZ  
NOTE:  
1. All typical values are at V = 3.3V and T  
= 25°C.  
amb  
CC  
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 2.7V  
IN  
V
IN  
VIN  
V
V
nOE INPUT  
MI  
MI  
t
nAx INPUT  
V
V
M
t
M
0V  
3.0V  
t
PLZ  
PZL  
t
PHL  
PLH  
V
V
MO  
nYx OUTPUT  
nYx OUTPUT  
V
V
+ 0.3V  
– 0.3V  
OL  
OL  
V
M
nYx OUTPUT  
V
M
t
t
PHZ  
PZH  
V
OH  
V
OH  
MO  
SA00037  
0V  
SV00104  
Waveform 1. Input (nAx) to Output (nYx) Propagation Delays  
Waveform 2. 3-State Output Enable and Disable Times  
5
1998 Feb 19  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
TEST CIRCUIT AND WAVEFORMS  
6.0V  
V
CC  
t
W
AMP (V)  
90%  
Open  
GND  
90%  
NEGATIVE  
PULSE  
V
V
M
V
V
OUT  
M
10%  
R
R
IN  
L
10%  
90%  
PULSE  
GENERATOR  
D.U.T.  
0V  
t
t
(t  
(t  
)
t
t
(t  
)
R
THL  
F
TLH  
R
T
C
L
L
)
(t  
)
F
TLH  
R
THL  
AMP (V)  
90%  
M
Test Circuit for 3-State Outputs  
POSITIVE  
PULSE  
V
V
M
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
= 1.5V  
M
TEST  
SWITCH  
Open  
6V  
Input Pulse Definition  
t
/t  
PLH PHL  
t
/t  
PLZ PZL  
t
/t  
GND  
PHZ PZH  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
FAMILY  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
Amplitude  
Rep. Rate  
t
t
R
t
F
W
C = Load capacitance includes jig and probe capacitance;  
L
see AC CHARACTERISTICS for value.  
74LVT  
2.7V  
v10MHz  
500ns v2.5ns v2.5ns  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SV00092  
6
1998 Feb 19  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
7
1998 Feb 19  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
8
1998 Feb 19  
Philips Semiconductors  
Product specification  
3.3V Octal inverting buffer (3-State)  
74LVT240  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
9
1998 Feb 19  
Philips Semiconductors  
Product specification  
74LVT240  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
Production  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make chages at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1998  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
print code  
Date of release: 05-96  
9397-750-03806  
Document order number:  
Philips  
Semiconductors  

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