7ABT543APWDH [NXP]
Octal latched transceiver with dual enable 3-State; 八进制锁存收发器，双能三态
| 型号： | 7ABT543APWDH |
| 厂家： | 
NXP |
| 描述： | Octal latched transceiver with dual enable 3-State |
| 文件： | 总12页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74ABT543A
Octal latched transceiver
with dual enable (3-State)
Product specification
1998 Sep 24
Supersedes data of 1995 Apr 19
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.
FEATURES
• Combines 74ABT245 and 74ABT373 type functions in one device
• 8-bit octal transceiver with D-type latch
• Back-to-back registers for storage
• Separate controls for data flow in each direction
• Output capability: +64mA/–32mA
• Live insertion/extraction permitted
• Power-up 3-State
FUNCTIONAL DESCRIPTION
The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
• Power-up reset
• Latch-up protection exceeds 500mA per Jedec Std 17
• ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
DESCRIPTION
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
An to Bn or Bn to An
Input capacitance
2.9
3.6
PLH
PHL
C = 50pF; V = 5V
ns
pF
pF
µA
L
CC
C
V = 0V or V
I CC
4
IN
Outputs disabled;
= 0V or V
C
I/O capacitance
7
I/O
V
O
CC
I
Total supply current
Outputs disabled; V =5.5V
110
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74ABT543A N
DWG NUMBER
SOT222-1
24-Pin Plastic DIP
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74ABT543A N
74ABT543A D
74ABT543A DB
74ABT543A PW
24-Pin plastic SO
74ABT543A D
SOT137-1
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
74ABT543A DB
7ABT543APW DH
SOT340-1
SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
LEBA
OEBA
A0
1
2
3
4
5
24
23
22
21
20
V
CC
A to B / B to A Latch Enable
input (active-Low)
14, 1
LEAB / LEBA
EAB / EBA
OEAB / OEBA
A0 – A7
EBA
B0
B1
B2
B3
B4
B5
B6
A to B / B to A Enable input
(active-Low)
11, 23
13, 2
A1
A to B / B to A Output Enable
input (active-Low)
A2
6
7
8
9
19
18
17
16
A3
3, 4, 5, 6,
7, 8, 9, 10
Port A, 3-State outputs
Port B, 3-State outputs
A4
A5
22, 21, 20, 19,
18, 17, 16, 15
B0 – B7
GND
A6
12
24
Ground (0V)
A7 10
15 B7
14
V
CC
Positive supply voltage
11
EAB
LEAB
GND 12
13 OEAB
SA00168
2
1998 Sep 24
853-1794 20080
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
2
(BA)
1EN3
G1
23
1
1C5
2EN4
G2
13
22
24
(AB)
3
4
5
6
7
8
9
10
2C6
A0 A1 A2 A3 A4 A5 A6 A7
EAB
3
4
22
21
20
19
18
17
16
15
5D
3
11
23
14
1
6D
2
EBA
OEAB
OEBA
13
2
5
LEAB
LEBA
6
B0 B1 B2 B3 B4 B5 B6 B7
7
8
22 21 20 19 18 17 16 15
9
10
SA00169
SA00170
LOGIC DIAGRAM
DETAIL A
22
B0
D
Q
LE
3
A0
Q
D
LE
4
5
21
20
19
18
17
16
15
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
6
7
DETAIL A X 7
8
9
10
2
OEBA
13
OEAB
23
1
EBA
11
14
EAB
LEBA
LEAB
SA00171
3
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
FUNCTION TABLE
INPUTS
LEXX
OUTPUTS
Bn or An
STATUS
OEXX
EXX
An or Bn
H
X
X
H
X
X
X
X
Z
Z
Disabled
Disabled
L
L
↑
↑
L
L
h
l
Z
Z
Disabled + Latch
Latch + Display
L
L
L
L
↑
↑
h
l
H
L
L
L
L
L
L
L
H
L
H
L
Transparent
Hold
L
L
H
X
NC
H
h
L
l
X
↑
=
=
=
=
=
=
High voltage level
High voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA)
Low voltage level
Low voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA)
Don’t care
Low-to-High transition of LEXX or EXX (XX = AB or BA)
NC= No change
High impedance or “off” state
Z
=
1, 2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
DC supply voltage
CONDITIONS
RATING
UNIT
V
CC
I
IK
–0.5 to +7.0
–18
V
mA
V
DC input diode current
V < 0
I
3
V
I
DC input voltage
–1.2 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
DC output voltage
output in Off or High state
output in Low state
–0.5 to +5.5
128
OUT
OUT
I
DC output current
mA
°C
T
stg
Storage temperature range
–65 to 150
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
Min
4.5
0
Max
V
DC supply voltage
5.5
V
V
CC
V
Input voltage
V
CC
I
V
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
2.0
V
IH
V
0.8
–32
64
V
IL
I
mA
mA
ns/V
°C
OH
I
OL
∆t/∆v
0
10
T
amb
Operating free-air temperature range
–40
+85
4
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
DC ELECTRICAL CHARACTERISTICS
LIMITS
= +25°C
T
= –40°C
to +85°C
amb
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
UNIT
Min
Typ
Max
Min
Max
V
Input clamp voltage
V
V
V
V
V
= 4.5V; I = –18mA
–0.9
3.2
3.7
2.3
0.3
–1.2
–1.2
V
V
V
V
V
IK
CC
CC
CC
CC
CC
IK
= 4.5V; I = –3mA; V = V or V
2.5
3.0
2.0
2.5
3.0
2.0
OH
I
IL
IH
IH
V
OH
High-level output voltage
= 5.0V; I = –3mA; V = V or V
OH I IL
= 4.5V; I = –32mA; V = V or V
IH
OH
I
IL
V
OL
Low-level output voltage
Power-up output low
= 4.5V; I = 64mA; V = V or V
IH
0.55
.55
0.55
.55
OL
I
IL
V
RST
V
CC
= 5.5V; I = 1mA; VI = GND or V
CC
0.13
V
O
3
voltage
I
Input leakage Control pins
V
CC
V
CC
V
CC
= 5.5V; V = GND or 5.5V
±0.01
±5
±1.0
±100
±100
±1.0
±100
±100
µA
µA
µA
I
I
current
Data pins
= 5.5V; V = GND or 5.5V
I
I
Power-off leakage current
= 0.0V; V or V ≤ 4.5V
±5.0
OFF
O
I
Power-up/down 3-State
output current
V
V
= 2.1V; V = 0.5V; V = GND or V
= Don’t care
;
CC
OE
O
I
CC
CC
I
±5.0
±50
±50
µA
PU/PD
4
I
+ I
+ I
3-State output High current
3-State output Low current
Output high leakage current
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5V; V = 2.7V; V = V or V
5.0
–5.0
5.0
50
–50
50
50
–50
50
µA
µA
µA
mA
µA
mA
IH
OZH
OZL
O
I
IL
IH
IH
I
= 5.5V; V = 0.5V; V = V or V
O I IL
IL
I
= 5.5V; V = 5.5V; V = GND or V
O I
CEX
1
I
O
Output current
= 5.5V; V = 2.5V
–40
–65
110
20
–180
250
30
–40
–180
250
30
O
I
= 5.5V; Outputs High, V = GND or V
CCH
I
CC
I
Quiescent supply current
= 5.5V; Outputs Low, V = GND or V
CCL
I
CC
= 5.5V; Outputs 3-State;
I
110
0.3
250
1.5
250
1.5
µA
CCZ
V = GND or V
I
CC
Additional supply current per
V
CC
= 5.5V; one input at 3.4V,
∆I
CC
mA
2
input pin
other inputs at V or GND; V = 5.5V
CC CC
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V between 0V and 2.1V, with a transition time of up to 10msec. From V = 2.1V to V = 5V ± 10%, a
CC
CC
CC
transition time of up to 100µsec is permitted.
5
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
Max
T
= -40 to
+85 C
= +5.0V ±0.5V
amb
o
T
V
= +25 C
amb
CC
o
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V
V
CC
Min
Typ
Min
Max
t
t
Propagation delay
An to Bn, Bn to An
1.0
1.9
2.9
3.6
4.5
5.2
1.0
1.9
5.2
5.7
PLH
PHL
2
ns
ns
ns
ns
ns
ns
t
t
Propagation delay
LEBA to An, LEAB to Bn
1
2
1.0
2.1
3.4
4.3
5.1
6.0
1.0
2.1
6.2
6.7
PLH
PHL
t
Output enable time
OEBA to An, OEAB to Bn
4
5
1.0
2.0
3.2
4.3
5.1
5.9
1.0
2.0
6.2
6.6
PZH
t
PZL
t
Output disable time
OEBA to An, OEAB to Bn
4
5
2.0
1.0
4.0
3.0
5.7
4.6
2.0
1.0
6.2
5.0
PHZ
t
PLZ
t
Output enable time
EBA to An, EAB to Bn
4
5
1.0
2.0
3.4
4.4
5.1
6.1
1.0
2.0
6.2
6.8
PZH
t
PZL
t
Output disable time
EBA to An, EAB to Bn
4
5
2.0
1.0
3.6
3.0
5.4
4.6
2.0
1.0
5.9
5.0
PHZ
t
PLZ
AC SETUP REQUIREMENTS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω
R
F
L
L
LIMITS
o
o
T
V
= +25 C
= +5.0V
T
V
= -40 to +85 C
amb
CC
amb
CC
SYMBOL
PARAMETER
WAVEFORM
UNIT
= +5.0V ±0.5V
Min
Typ
Min
t (H)
t (L)
s
Setup time
An to LEAB, Bn to LEBA
2.5
3.0
1.0
1.4
2.5
3.0
s
3
3
3
ns
ns
ns
t (H)
Hold time
An to LEAB, Bn to LEBA
0.5
0.5
–0.8
–0.6
0.5
0.5
h
t (L)
h
t (H)
Setup time
An to EAB, Bn to EBA
3.5
3.0
1.3
1.4
3.5
3.0
s
t (L)
s
t (H)
t (L)
h
Hold time
An to EAB, Bn to EBA
0.5
0.5
–0.8
–0.6
0.5
0.5
h
3
3
ns
ns
t (L)
w
Latch enable pulse width, Low
3.5
1.0
3.5
AC WAVEFORMS
V
M
= 1.5V, V = GND to 3.0V
IN
V
V
IN
IN
V
V
V
V
M
M
M
M
t
t
t
t
PHL
PLH
PLH
PHL
V
V
OUT
OUT
V
V
V
M
V
M
M
M
SA00172
SA00173
Waveform 1. Propagation Delay For Inverting Output
Waveform 2. Propagation Delay For Non-Inverting Output
6
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
OEAB, OEBA,
EAB, EBA
An, Bn
V
V
M
V
V
V
V
M
M
M
M
M
M
t
t (H)
s
t (L)
s
t
t (H)
h
t (L)
h
PZL
PLZ
V
M
An, Bn
V
V
V
+0.3V
M
OL
t
w
(L)
LEAB,
LEBA
0V
SA00176
NOTE: For all waveforms, V = 1.5V, the shaded areas indicate when the input
M
Waveform 5. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
is permitted to change for predictable output performance.
SA00174
Waveform 3. Data Setup and Hold Times And Latch Enable
Pulse Width
OEAB, OEBA,
V
V
M
EAB, EBA
M
t
t
PHZ
PZH
V
V
OH
OH
–0.3V
0V
An, Bn
V
M
SA00175
Waveform 4. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
TEST CIRCUIT AND WAVEFORM
7 V
500 Ω
S1
From Output
Under Test
Open
GND
500 Ω
C
= 50 pF
L
Load Circuit
TEST
S1
t
open
7 V
pd
t
/t
PLZ PZL
t
/t
open
PHZ PZH
DEFINITIONS
C
=
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
L
SA00012
7
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
8
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
9
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
10
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
11
1998 Sep 24
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-04611
Document order number:
Philips
Semiconductors
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SI9122E
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