933378970005 [NXP]
IC HEX 1-BIT DRIVER, INVERTED OUTPUT, UUC, DIE, Bus Driver/Transceiver;
| 型号： | 933378970005 |
| 厂家： | 
NXP |
| 描述： | IC HEX 1-BIT DRIVER, INVERTED OUTPUT, UUC, DIE, Bus Driver/Transceiver 驱动 输出元件 逻辑集成电路 |
| 文件： | 总4页 (文件大小：39K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
• The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF40098B
buffers
3-state hex inverting buffer
January 1995
Product specification
File under Integrated Circuits, IC04
Philips Semiconductors
Product specification
HEF40098B
buffers
3-state hex inverting buffer
DESCRIPTION
The HEF40098B is a hex inverting buffer with 3-state
outputs. The 3-state outputs are controlled by two enable
inputs (EO4 and EO2). A HIGH on EO4 causes four of the
six buffer elements to assume a high impedance or
OFF-state regardless of the other input conditions and a
HIGH on EO2 causes the outputs of the remaining two
buffer elements to assume a high impedance or OFF-state
regardless of the other input conditions.
Fig.2 Pinning diagram.
HEF40098BP(N):
HEF40098BD(F):
HEF40098BT(D):
16-lead DIL; plastic
(SOT38-1)
16-lead DIL; ceramic (cerdip)
(SOT74)
16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
PINNING
I1 to I6
buffer inputs
EO4, EO2
O1 to O6
enable inputs (active LOW)
buffer outputs (active LOW)
FAMILY DATA, IDD LIMITS category BUFFERS
Fig.1 Functional diagram.
See Family Specifications
January 1995
2
Philips Semiconductors
Product specification
HEF40098B
buffers
3-state hex inverting buffer
Fig.3 Logic diagram.
DC CHARACTERISTICS
VSS = 0 V
Tamb (°C)
+25
VDD
V
VOH VOL
HEF
SYMBOL
−40
+85
V
V
MIN. MAX. MIN. MAX. MIN. MAX.
Output current
HIGH
5
10
15
5
4,6
9,5
1,2
3,8
1,0
3,2
0,8
2,5
mA
mA
mA
mA
mA
mA
mA
−IOH
−IOH
13,5
2,5
12,0
3,8
10,0
3,2
8,0
HIGH
2,5
Output current
LOW
4,75
10
15
0,4
3,5
2,9
2,3
0,5 IOL
1,5
12,0
24,0
10,0
20,0
8,0
16,0
Tamb (°C)
+25
MIN. MAX. MIN. MAX. MIN. MAX.
VDD
V
VOH VOL
HEC
SYMBOL
−55
+125
V
V
Output current
HIGH
5
10
15
5
4,6
9,5
1,25
4,0
1,0
3,2
0,6
2,1
mA
mA
mA
mA
mA
mA
mA
−IOH
−IOH
12,5
2,5
12,5
4,0
10,0
3,2
6,7
HIGH
2,1
Output current
LOW
4,75
10
15
0,4
3,6
2,9
1,9
0,5 IOL
1,5
12,5
25,0
10,0
20,0
6,7
13,0
January 1995
3
Philips Semiconductors
Product specification
HEF40098B
buffers
3-state hex inverting buffer
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
TYPICAL EXTRAPOLATION
FORMULA
SYMBOL
TYP. MAX.
Propagation delays
In → On
HIGH to LOW
5
80
35
25
65
30
25
30
15
10
35
20
15
160 ns
70 ns
50 ns
130 ns
60 ns
50 ns
60 ns
30 ns
20 ns
70 ns
40 ns
30 ns
70 ns + (0,20 ns/pF) CL
31 ns + (0,08 ns/pF) CL
22 ns + (0,06 ns/pF) CL
50 ns + (0,30 ns/pF) CL
24 ns + (0,13 ns/pF) CL
23 ns + (0,05 ns/pF) CL
15 ns + (0,30 ns/pF) CL
10 ns + (0,11 ns/pF) CL
7 ns + (0,07 ns/pF) CL
10 ns + (0,50 ns/pF) CL
8 ns + (0,24 ns/pF) CL
6 ns + (0,18 ns/pF) CL
10
15
5
tPHL
LOW to HIGH
10
15
5
tPLH
tTHL
tTLH
Output transition times
HIGH to LOW
10
15
5
LOW to HIGH
10
15
3-state propagation delays
Output disable times
EO2, EO4 → On
HIGH
5
10
15
5
45
35
30
65
40
35
85 ns
65 ns
60 ns
135 ns
80 ns
70 ns
tPHZ
LOW
10
15
tPLZ
Output enable times
EO2, EO4 → On
HIGH
5
10
15
5
70
35
30
90
40
35
140 ns
75 ns
65 ns
185 ns
85 ns
70 ns
tPZH
LOW
10
15
tPZL
VDD
V
TYPICAL FORMULA FOR P (µW)
2
Dynamic power
dissipation per
package (P)
5
10
15
5 000 fi + ∑ (foCL) × VDD
where
2
22 800 fi + ∑ (foCL) × VDD
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load cap. (pF)
2
81 000 fi + ∑ (foCL) × VDD
∑ (foCL) = sum of outputs
VDD = supply voltage (V)
January 1995
4
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