933713820653 [NXP]
Decoder/Driver, HC/UH Series, Inverted Output, CMOS, PDSO24;型号: | 933713820653 |
厂家: | NXP |
描述: | Decoder/Driver, HC/UH Series, Inverted Output, CMOS, PDSO24 驱动 输入元件 光电二极管 逻辑集成电路 |
文件: | 总11页 (文件大小:147K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT154
4-to-16 line decoder/demultiplexer
September 1993
Product specification
File under Integrated Circuits, IC06
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer
74HC/HCT154
The 74HC/HCT154 decoders accept four active HIGH
binary address inputs and provide 16 mutually exclusive
active LOW outputs.
The 2-input enable gate can be used to strobe the decoder
to eliminate the normal decoding “glitches” on the outputs,
or it can be used for the expansion of the decoder.
FEATURES
• 16-line demultiplexing capability
• Decodes 4 binary-coded inputs into one of 16 mutually
exclusive outputs
• 2-input enable gate for strobing or expansion
• Output capability: standard
• ICC category: MSI
The enable gate has two AND’ed inputs which must be
LOW to enable the outputs.
The “154” can be used as a 1-to-16 demultiplexer by using
one of the enable inputs as the multiplexed data input.
GENERAL DESCRIPTION
When the other enable is LOW, the addressed output will
follow the state of the applied data.
The 74HC/HCT154 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
TYPICAL
SYMBOL
PARAMETER
CONDITIONS
UNIT
HC
HCT
tPHL/ tPLH
CI
propagation delay An, En to Yn
input capacitance
CL = 15 pF; VCC = 5 V
11
13
3.5
60
ns
pF
pF
3.5
60
CPD
power dissipation capacitance per package notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
2
PD = CPD × VCC2 × fi + ∑ (CL × VCC × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ (CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
September 1993
2
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer
74HC/HCT154
PIN DESCRIPTION
PIN NO.
SYMBOL
NAME AND FUNCTION
1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 15, 16, 17
Y0 to Y15
E0, E1
GND
outputs (active LOW)
enable inputs (active LOW)
ground (0 V)
18, 19
12
23, 22, 21, 20
24
A0 to A3
VCC
address inputs
positive supply voltage
(a)
(b)
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
Fig.4 Functional diagram.
September 1993
3
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer
74HC/HCT154
FUNCTION TABLE
INPUTS
OUTPUTS
E0 E1 A0 A1 A2 A3 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 Y10 Y11 Y12 Y13 Y14 Y15
H
H
L
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
L
L
L
L
L
L
L
L
L
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Fig.5 Logic diagram.
September 1993
4
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer
74HC/HCT154
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HC
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
An to Yn
36
13
10
150
30
26
190
38
33
225
45
38
ns
ns
ns
2.0 Fig.6
4.5
6.0
t
t
PHL/ tPLH propagation delay
En to Yn
39
14
11
150
30
26
190
38
33
225
45
38
2.0 Fig.7
4.5
6.0
THL/ tTLH output transition time
19
7
6
75
15
13
95
19
16
110
22
19
2.0 Figs 6 and 7
4.5
6.0
September 1993
5
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer
74HC/HCT154
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (∆ ICC) for a unit load of 1 is given in the family specifications.
To determine ∆ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT
UNIT LOAD COEFFICIENT
An
En
1.0
1.0
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
74HCT
SYMBOL PARAMETER
UNIT
WAVEFORMS
VCC
(V)
+25
−40 to +85 −40 to +125
min. typ. max. min. max. min. max.
tPHL/ tPLH propagation delay
An to Yn
16
15
7
35
32
15
44
40
19
53
48
22
ns
ns
ns
4.5 Fig.6
t
PHL/ tPLH propagation delay
En to Yn
4.5 Fig.7
t
THL/ tTLH output transition time
4.5 Figs 6 and 7
September 1993
6
Philips Semiconductors
Product specification
4-to-16 line decoder/demultiplexer
74HC/HCT154
AC WAVEFORMS
(1) HC : VM = 50%; VI = GND to VCC
.
(1) HC : VM = 50%; VI = GND to VCC
.
HCT: VM = 1.3 V; VI = GND to 3 V.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the enable input (En)
to output (Yn) propagation delays and the
output transition times.
Fig.6 Waveforms showing the address input (An) to
output (Yn) propagation delays and the output
transition times.
APPLICATION INFORMATION
Fig.9 1-of-16 demultiplexer; logic level on selected
outputs follow the logic level on the data input.
Fig.8 1-of-16 decoder; LOW level output is selected.
PACKAGE OUTLINES
See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.
September 1993
7
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General description
The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC standard no. 7A.
Catalog by
System
•
Cross-reference
Packages
•
•
The 74HC/HCT154 decoders accept four active HIGH binary address inputs and provide 16 mutually exclusive active
LOW outputs.
End of Life
information
Distributors Go
Here!
•
•
The 2-input enable gate can be used to strobe the decoder to eliminate the normal decoding 'glitches' on the outputs, or it
can be used for the expansion of the decoder.
The enable gate has two AND’ed inputs which must be LOW to enable the outputs.
Models
•
•
SoC solutions
The '154' can be used as a 1-to-16 demultiplexer by using one of the enable inputs as the multiplexed data input. When the
other enable is LOW, the addressed output will follow the state of the applied data.
Features
●
●
●
●
●
16-line demultiplexing capability
Decodes 4 binary-coded inputs into one of 16 mutually exclusive outputs
2-input enable gate for strobing or expansion
Output capability: standard
I
category: MSI
CC
Datasheet
Type number Title
Publication
release date
Datasheet status Page
File Datasheet
count size
(kB)
74HC/HCT154 4-to-16 line
9/1/1993
Product
specification
7
57
Download
decoder/demultiplexer
Additional datasheet info
To complete the device datasheet with package and family information, also download the following PDF files. The
"Logic Package Information" document is required to determine in which package(s) this device is available.
Document
Description
1
2
3
HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family
Specifications
HCT_PACKAGE_INFO
HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package
Information
HCT_PACKAGE_OUTLINES
HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package
Outlines
Parametrics
Type number Package Description
Propagation Voltage No. Power
Logic
Output
Delay(ns)
of Dissipation
Pins Considerations Levels
Low Power or
24 Battery
Switching Drive
Capability
SOT137
(SO24)
4-to-16 Line
Decoder/Demultiplexer
5 Volts
+
74HC154D
15
15
15
15
CMOS
CMOS
CMOS
CMOS
TTL
Low
Applications
Low Power or
24 Battery
SOT340-1
(SSOP24)
4-to-16 Line
Decoder/Demultiplexer
5 Volts
+
74HC154DB
74HC154N
Low
Low
Low
Low
Low
Low
Low
Applications
Low Power or
24 Battery
SOT101-1
(DIP24)
4-to-16 Line
Decoder/Demultiplexer
5 Volts
+
Applications
Low Power or
24 Battery
SOT355-1
(TSSOP24)
4-to-16 Line
Decoder/Demultiplexer
5 Volts
+
74HC154PW
74HCT154D
74HCT154DB
74HCT154N
74HCT154PW
Applications
4-to-16 Line
Low Power or
24 Battery
SOT137
(SO24)
5 Volts
+
Decoder/Demultiplexer; 15
TTL Enabled
Applications
4-to-16 Line
Low Power or
SOT340-1
(SSOP24)
5 Volts
+
Decoder/Demultiplexer; 15
TTL Enabled
24 Battery
TTL
Applications
4-to-16 Line
Low Power or
SOT101-1
(DIP24)
5 Volts
+
Decoder/Demultiplexer; 15
TTL Enabled
24 Battery
TTL
Applications
4-to-16 Line
Low Power or
SOT355-1
(TSSOP24)
5 Volts
+
Decoder/Demultiplexer; 15
TTL Enabled
24 Battery
Applications
TTL
Products, packages, availability and ordering
Type number North
Ordering code
Marking/Packing Package Device status Buy online
Discretes packing
American type (12NC)
number
info
SOT137
(SO24)
Standard Marking *
Bulk Pack, CECC
74HC154D
74HC154D
9337 138 20652
Full production
Full production
Full production
Full production
-
-
Standard Marking *
9337 138 20653 Reel Pack, SMD,
13", CECC
SOT137
(SO24)
74HC154D-T
SOT340-1
(SSOP24)
Standard Marking *
9351 825 70112
74HC154DB 74HC154DB
74HC154DB-T
Bulk Pack
Standard Marking *
9351 825 70118 Reel Pack, SMD,
13"
SOT340-1
(SSOP24)
SOT101-1
(DIP24)
Standard Marking *
Bulk Pack, CECC
74HC154N
74HC154N
9336 710 20652
9351 825 80112
Full production
Full production
SOT355-1
Standard Marking *
Bulk Pack
74HC154PW 74HC154PW
(TSSOP24)
Standard Marking *
SOT355-1
74HC154PW-T
74HCT154D 74HCT154D
74HCT154D-T
9351 825 80118 Reel Pack, SMD,
13"
Full production
Full production
Full production
Full production
Full production
(TSSOP24)
SOT137
(SO24)
Standard Marking *
9337 138 30652
Bulk Pack, CECC
Standard Marking *
9337 138 30653 Reel Pack, SMD,
13", CECC
SOT137
(SO24)
SOT340-1
(SSOP24)
Standard Marking *
9351 825 50112
74HCT154DB 74HCT154DB
Bulk Pack
Standard Marking *
9351 825 50118 Reel Pack, SMD,
13"
SOT340-1
(SSOP24)
74HCT154DB-
T
SOT101-1
(DIP24)
Standard Marking *
9336 710 50652
74HCT154N 74HCT154N
74HCT154PW 74HCT154PW
Full production
Full production
Bulk Pack, CECC
SOT355-1
Standard Marking *
9351 825 60112
(TSSOP24)
Bulk Pack
Standard Marking *
9351 825 60118 Reel Pack, SMD,
13"
SOT355-1
74HCT154PW-
T
Full production
(TSSOP24)
Products in the above table are all in production. Some variants are discontinued; click here for information on these
variants.
Similar products
74HC/HCT154 links to the similar products page containing an overview of products that are similar in function or
related to the type number(s) as listed on this page. The similar products page includes products from the same catalog
tree(s), relevant selection guides and products from the same functional category.
Support & tools
HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-Mar-98)
HC/T User Guide(date 01-Nov-97)
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