933739600623 [NXP]

IC F/FAST SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013AC, SOT-163-1, SO-20, Bus Driver/Transceiver;
933739600623
型号: 933739600623
厂家: NXP    NXP
描述:

IC F/FAST SERIES, OCTAL 1-BIT DRIVER, INVERTED OUTPUT, PDSO20, 7.50 MM, PLASTIC, MS-013AC, SOT-163-1, SO-20, Bus Driver/Transceiver

驱动 光电二极管 输出元件 逻辑集成电路
文件: 总10页 (文件大小:82K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
74F534  
Octal D flip-flop, inverting (3-State)  
Product specification  
2000 Aug 01  
Supersedes data of 1999 Jan 08  
IC15 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
active Low Output Enable (OE) controls all eight 3-State buffers  
independent of the latch operation. When OE is Low, the latched or  
transparent data appears at the outputs. When OE is High, the  
outputs are in high impedance “off” state, which means they will  
neither drive nor load the bus.  
FEATURES  
8-bit positive edge-triggered register  
3-State inverting output buffers  
Common 3-State Output register  
TYPICAL SUPPLY  
Independent register and 3-State buffer operation  
CURRENT  
(TOTAL)  
TYPE  
TYPICAL f  
MAX  
74F534  
165MHz  
51mA  
DESCRIPTION  
The 74F534 is an 8-bit edge-triggered register coupled to eight  
3-State output buffers. The two sections of the device are controlled  
independently by the Clock (CP) and Output Enable (OE) control  
gates.  
ORDERING INFORMATION  
COMMERCIAL  
RANGE  
= 5V ±10%,  
DESCRIPTION  
PKG DWG #  
The register is fully edge-triggered. The state of each D input, one  
setup time before the Low-to-High clock transition is transferred to  
the corresponding flip-flop’s Q output.  
V
CC  
T
amb  
= 0°C to +70°C  
20-Pin Plastic DIP  
20-Pin Plastic SOL  
N74F534N  
N74F534D  
SOT146-1  
SOT163-1  
The 3-State output buffers are designed to drive heavily loaded  
3-State buses, MOS memories, or MOS microprocessors. The  
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE  
74F (U.L.)  
HIGH/LOW  
LOAD VALUE  
HIGH/LOW  
PINS  
DESCRIPTION  
D0 - D7  
Data inputs  
1.0/1.0  
1.0/1.0  
1.0/1.0  
150/40  
20µA/0.6mA  
20µA/0.6mA  
20µA/0.6mA  
3.0mA/24mA  
OE  
Output Enable input (active Low)  
CP  
Clock Pulse input (active rising edge)  
Data outputs  
Q0 - Q7  
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.  
PIN CONFIGURATION  
LOGIC SYMBOL  
OE  
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
1
2
3
4
5
6
7
8
9
20  
V
CC  
19 Q7  
18 D7  
17 D6  
16 Q6  
15 Q5  
14 D5  
13 D4  
12 Q4  
3
4
7
8
13  
14  
17  
18  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
11  
1
CP  
OE  
Q0  
2
Q1  
5
Q2  
6
Q3  
9
Q4  
12  
Q5  
15  
Q6  
16  
Q7  
GND 10  
11  
CP  
19  
V
=Pin 20  
CC  
SF00982  
GND=Pin 10  
SF00984  
2
2000 Aug 01  
853-0374 24250  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
LOGIC SYMBOL (IEEE/IEC)  
1
EN1  
11  
C1  
2
3
2D  
1
5
4
6
7
9
8
12  
15  
16  
19  
13  
14  
17  
18  
SF00986  
LOGIC DIAGRAM  
D0  
3
D1  
D2  
D3  
D4  
13  
D5  
14  
D6  
17  
D7  
18  
4
7
8
D
D
D
D
D
D
D
D
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
CP  
Q
11  
CP  
1
OE  
2
5
6
9
12  
Q4  
15  
Q5  
16  
Q6  
19  
Q7  
SF00988  
V
=Pin 20  
CC  
Q0  
Q1  
Q2  
Q3  
GND=Pin 10  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
Q0 – Q7  
INTERNAL  
REGISTER  
OPERATING MODES  
OE  
CP  
Dn  
L
L
l
L
H
L
Load and read register  
Hold  
h
H
L
X
NC  
NC  
H
H
X
NC  
Dn  
Z
Z
Disable outputs  
Dn  
H = High voltage level  
h
L
l
= High voltage level one setup time prior to the Low-to-High clock transition  
= Low voltage level  
= Low voltage level one setup time prior to the Low-to-High clock transition  
NC= No change  
X = Don’t care  
Z = High impedance “off” state  
= Low-to-High clock transition  
= Not a Low-to-High clock transition  
3
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
ABSOLUTE MAXIMUM RATINGS  
(Operation beyond the limits set forth in this table may impair the useful life of the device.  
Unless otherwise noted these limits are over the operating free-air temperature range.)  
SYMBOL  
PARAMETER  
RATING  
UNIT  
V
V
Supply voltage  
Input voltage  
Input current  
–0.5 to +7.0  
–0.5 to +7.0  
–30 to +5.0  
V
V
CC  
IN  
I
IN  
mA  
V
V
Voltage applied to output in High output state  
Current applied to output in Low output state  
Operating free-air temperature range  
Storage temperature  
–0.5 to +V  
48  
OUT  
OUT  
CC  
I
mA  
°C  
°C  
T
amb  
0 to +70  
T
stg  
–65 to +125  
RECOMMENDED OPERATING CONDITIONS  
LIMITS  
TYP  
SYMBOL  
PARAMETER  
UNIT  
MAX  
MIN  
4.5  
V
CC  
V
IH  
V
IL  
Supply voltage  
5.0  
5.5  
V
V
High-level input voltage  
Low-level input voltage  
Input clamp current  
2.0  
0.8  
–18  
–3  
V
I
I
I
mA  
mA  
mA  
°C  
IK  
High-level output current  
Low-level output current  
Operating free-air temperature range  
OH  
OL  
24  
T
amb  
0
70  
4
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
DC ELECTRICAL CHARACTERISTICS  
(Over recommended operating free-air temperature range unless otherwise noted.)  
LIMITS  
1
SYMBOL  
PARAMETER  
TEST CONDITIONS  
UNIT  
MAX  
2
MIN  
2.4  
TYP  
±10%V  
V
V
CC  
V
V
= MIN, V = MAX,  
CC  
IL  
V
OH  
High-level output voltage  
V
IH  
= MIN, I = MAX  
OH  
±5%V  
2.7  
3.3  
0.35  
0.35  
–0.73  
CC  
±10%V  
0.50  
0.50  
–1.2  
V
V
V
CC  
CC  
= MIN, V = MAX,  
CC  
IH  
IL  
V
V
Low-level output voltage  
Input clamp voltage  
OL  
V
= MIN, I = MAX  
OL  
±5%V  
V
CC  
= MIN, I = I  
I IK  
IK  
Input current at  
maximum input voltage  
I
I
V
CC  
= MAX, V = 7.0V  
100  
µA  
I
I
I
High-level input current  
Low-level input current  
V
V
= MAX, V = 2.7V  
20  
µA  
IH  
CC  
I
= MAX, V = 0.5V  
–0.6  
mA  
IL  
CC  
I
Off-state output current,  
High-level voltage applied  
I
I
V
= MAX, V = 2.7V  
50  
µA  
µA  
OZH  
CC  
CC  
O
Off-state output current,  
Low-level voltage applied  
V
= MAX, V = 0.5V  
–50  
OZL  
O
3
I
I
Short-circuit output current  
Supply current (total)  
V
CC  
= MAX  
–60  
–150  
86  
mA  
mA  
OS  
V
CC  
= MAX  
OE=4.5V, Dn=GND  
51  
CC  
NOTES:  
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.  
2. All typical values are at V = 5V, T = 25°C.  
CC  
amb  
3. Not more than one output should be shorted at a time. For testing I , the use of high-speed test apparatus and/or sample-and-hold  
OS  
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting  
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any  
sequence of parameter tests, I tests should be performed last.  
OS  
AC ELECTRICAL CHARACTERISTICS  
LIMITS  
TEST  
CONDITIONS  
T
V
= +25°C  
T
= 0°C to +70°C  
amb  
amb  
V
SYMBOL  
PARAMETER  
= +5V  
= +5V ± 10%  
UNIT  
CC  
CC  
C = 50pF, R = 500Ω  
C = 50pF, R = 500Ω  
L
L
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
f
Maximum Clock frequency  
Waveform 1  
Waveform 1  
150  
165  
135  
MHz  
ns  
MAX  
t
t
Propagation delay  
CP to Qn  
3.0  
3.0  
4.5  
4.5  
7.0  
7.0  
2.5  
2.5  
7.5  
7.5  
PLH  
PHL  
t
t
Output Enable time  
to High or Low level  
Waveform 3  
Waveform 4  
2.0  
2.0  
4.5  
5.0  
7.5  
7.5  
2.0  
2.0  
8.5  
8.5  
PZH  
PZL  
ns  
ns  
t
t
Output Disable time  
from High or Low level  
Waveform 3  
Waveform 4  
2.0  
2.0  
3.5  
3.5  
6.5  
5.5  
2.0  
2.0  
7.5  
6.5  
PHZ  
PLZ  
AC SETUP REQUIREMENTS  
LIMITS  
T
V
= +25°C  
T
V
= 0°C to +70°C  
= +5.0V ± 10%  
CC  
amb  
amb  
TEST  
CONDITIONS  
SYMBOL  
PARAMETER  
= +5V  
UNIT  
CC  
C = 50pF, R = 500Ω  
C = 50pF, R = 500Ω  
L
L
L
L
MIN  
TYP  
MAX  
MIN  
MAX  
t (H)  
t (L)  
s
Setup time,  
Dn to CP  
2.0  
2.0  
2.5  
2.5  
s
Waveform 2  
Waveform 2  
Waveform 1  
ns  
ns  
ns  
t (H)  
Hold time,  
Dn to CP  
0
0
0
0
h
t (L)  
h
t (H)  
CP pulse width,  
High or Low  
3.0  
3.5  
3.5  
4.0  
w
t (L)  
w
5
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
AC WAVEFORMS  
For all waveforms, V = 1.5V  
M
The shaded areas indicate when the input is permitted to change for predictable output performance.  
1/f  
MAX  
Dn  
V
V
t
V
V
M
M
M
M
CP  
Qn  
V
t
V
V
t
M
t
M
t
M
t (H)  
(H)  
t (L)  
t (L)  
h
s
h
s
(H)  
(L)  
W
W
PLH  
PHL  
CP  
V
V
M
M
V
V
M
M
SF00191  
SF00989  
Waveform 2. Data Setup and Hold Times  
Waveform 1. Propagation Delay, Clock and Enable Inputs  
to Output, Enable, Clock Pulse Widths,  
and Maximum Clock Frequency  
OE  
Qn  
V
t
V
M
M
OE  
Qn  
V
V
t
M
t
M
t
PZL  
PLZ  
V
-0.3V  
0V  
OH  
PZH  
PHZ  
V
M
V
M
V
+0.3V  
OL  
SF00994  
SF00995  
Waveform 3. 3-State Output Enable Time to High Level  
and Output Disable Time from High Level  
Waveform 4. 3-State Output Enable Time to Low Level  
and Output Disable Time from Low Level  
TEST CIRCUIT AND WAVEFORM  
V
CC  
t
w
AMP (V)  
0V  
7.0V  
90%  
90%  
NEGATIVE  
PULSE  
V
V
M
R
M
L
V
V
OUT  
IN  
10%  
10%  
PULSE  
GENERATOR  
D.U.T.  
t
t )  
t
t )  
THL ( f  
TLH ( r  
R
C
R
L
T
L
t
t )  
t
t )  
TLH ( r  
THL ( f  
AMP (V)  
0V  
90%  
M
90%  
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
w
SWITCH POSITION  
TEST  
SWITCH  
closed  
closed  
open  
Input Pulse Definition  
t
t
PLZ  
PZL  
All other  
DEFINITIONS:  
R
L
C
L
R
T
=
=
=
Load resistor;  
see AC electrical characteristics for value.  
Load capacitance includes jig and probe capacitance;  
see AC electrical characteristics for value.  
Termination resistance should be equal to Z  
pulse generators.  
INPUT PULSE REQUIREMENTS  
family  
V
M
rep. rate  
t
w
t
t
THL  
amplitude  
TLH  
of  
OUT  
2.5ns  
2.5ns  
74F  
3.0V  
1.5V  
1MHz  
500ns  
SF00777  
6
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
7
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
8
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
NOTES  
9
2000 Aug 01  
Philips Semiconductors  
Product specification  
Octal D flip-flop, inverting (3-State)  
74F534  
Data sheet status  
[1]  
Data sheet  
status  
Product  
status  
Definition  
Objective  
specification  
Development  
This data sheet contains the design target or goal specifications for product development.  
Specification may change in any manner without notice.  
Preliminary  
specification  
Qualification  
This data sheet contains preliminary data, and supplementary data will be published at a later date.  
Philips Semiconductors reserves the right to make changes at any time without notice in order to  
improve design and supply the best possible product.  
Product  
specification  
Production  
This data sheet contains final specifications. Philips Semiconductors reserves the right to make  
changes at any time without notice in order to improve design and supply the best possible product.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 2000  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Date of release: 08-00  
Document order number:  
9397-750-07377  
Philips  
Semiconductors  

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