934020440215 [NXP]
TRANSISTOR 2 CHANNEL, UHF BAND, Si, N-CHANNEL, RF SMALL SIGNAL, MOSFET, MICRO MINIATURE, PLASTIC, SMD, SC-61B, 4 PIN, FET RF Small Signal;型号: | 934020440215 |
厂家: | NXP |
描述: | TRANSISTOR 2 CHANNEL, UHF BAND, Si, N-CHANNEL, RF SMALL SIGNAL, MOSFET, MICRO MINIATURE, PLASTIC, SMD, SC-61B, 4 PIN, FET RF Small Signal |
文件: | 总14页 (文件大小:303K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BF904; BF904R
N-channel dual gate MOS-FETs
Rev. 06 — 13 November 2007
Product data sheet
IMPORTANT NOTICE
Dear customer,
As from October 1st, 2006 Philips Semiconductors has a new trade name
- NXP Semiconductors, which will be used in future data sheets together with new contact
details.
In data sheets where the previous Philips references remain, please use the new links as
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(email)
The copyright notice at the bottom of each page (or elsewhere in the document,
depending on the version)
- © Koninklijke Philips Electronics N.V. (year). All rights reserved -
is replaced with:
- © NXP B.V. (year). All rights reserved. -
If you have any questions related to the data sheet, please contact our nearest sales
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NXP Semiconductors
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
and substrate interconnected and an internal bias circuit to
ensure good cross-modulation performance during AGC.
FEATURES
• Specially designed for use at 5 V supply voltage
• Short channel transistor with high transfer admittance to
input capacitance ratio
CAUTION
This product is supplied in anti-static packing to
prevent damage caused by electrostatic discharge
during transport and handling. For further information,
refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A
and SNW-FQ-302B.
• Low noise gain controlled amplifier up to 1 GHz
• Superior cross-modulation performance during AGC.
APPLICATIONS
• VHF and UHF applications with 3 to 7 V supply voltage
such as television tuners and professional
communications equipment.
PINNING
PIN
SYMBOL
DESCRIPTION
1
2
3
4
s, b
d
source
drain
DESCRIPTION
Enhancement type field-effect transistor in a plastic
microminiature SOT143B and SOT143R package. The
transistor consists of an amplifier MOS-FET with source
g2
g1
gate 2
gate 1
d
d
handbook, halfpage
handbook, halfpage
3
4
4
3
2
g
2
g
2
g
g
1
1
2
1
1
s,b
s,b
Top view
MAM125 - 1
Top view
MAM124
BF904R marking code: %MD.
BF904 marking code: %MC.
Fig.1 Simplified outline (SOT143B) and symbol.
Fig.2 Simplified outline (SOT143R) and symbol.
QUICK REFERENCE DATA
SYMBOL
VDS
PARAMETER
drain-source voltage
CONDITIONS
MIN.
TYP.
MAX.
UNIT
−
−
−
−
−
−
−
−
7
V
ID
drain current
30
mA
mW
°C
Ptot
Tj
total power dissipation
operating junction temperature
forward transfer admittance
input capacitance at gate 1
reverse transfer capacitance
noise figure
200
150
30
yfs
22
−
25
2.2
25
2
mS
pF
Cig1-s
Crs
F
2.6
35
f = 1 MHz
−
fF
f = 800 MHz
−
−
dB
Rev. 06 - 13 November 2007
2 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
ID
drain-source voltage
drain current
−
−
−
−
7
V
30
mA
mA
mA
IG1
IG2
Ptot
gate 1 current
±10
±10
gate 2 current
total power dissipation
BF904
see Fig.3
Tamb ≤ 50 °C; note 1
amb ≤ 40 °C; note 1
−
−
200
200
+150
150
mW
mW
°C
BF904R
T
Tstg
Tj
storage temperature
operating junction temperature
−65
−
°C
Note
1. Device mounted on a printed-circuit board.
MRA770
250
handbook, halfpage
P
tot
(mW)
200
BF904
150
100
50
BF904R
0
0
50
100
150
T
200
( C)
o
amb
Fig.3 Power derating curves.
Rev. 06 - 13 November 2007
3 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
note 1
VALUE
UNIT
Rth j-a
thermal resistance from junction to ambient
BF904
500
550
K/W
K/W
BF904R
Rth j-s
thermal resistance from junction to soldering point
note 2
BF904
Ts = 92 °C
Ts = 78 °C
290
360
K/W
K/W
BF904R
Notes
1. Device mounted on a printed-circuit board.
2. Ts is the temperature at the soldering point of the source lead.
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
15
UNIT
V(BR)G1-SS
V(BR)G2-SS
V(F)S-G1
V(F)S-G2
VG1-S(th)
VG2-S(th)
IDSX
gate 1-source breakdown voltage
gate 2-source breakdown voltage
forward source-gate 1 voltage
forward source-gate 2 voltage
gate 1-source threshold voltage
gate 2-source threshold voltage
drain-source current
VG2-S = VDS = 0; IG1-S = 10 mA
VG1-S = VDS = 0; IG2-S = 10 mA
VG2-S = VDS = 0; IS-G1 = 10 mA
VG1-S = VDS = 0; IS-G2 = 10 mA
VG2-S = 4 V; VDS = 5 V; ID = 20 µA
VG1-S = VDS = 5 V; ID = 20 µA
6
V
6
15
1.5
1.5
1
V
0.5
0.5
0.3
0.3
8
V
V
V
1.2
13
V
VG2-S = 4 V; VDS = 5 V;
mA
RG1 = 120 kΩ; note 1
IG1-SS
IG2-SS
gate 1 cut-off current
gate 2 cut-off current
VG2-S = VDS = 0; VG1-S = 5 V
VG1-S = VDS = 0; VG2-S = 5 V
−
−
50
50
nA
nA
Note
1. RG1 connects gate 1 to VGG = 5 V; see Fig.20.
DYNAMIC CHARACTERISTICS
Common source; Tamb = 25 °C; VDS = 5 V; VG2-S = 4 V; ID = 10 mA; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
22
TYP.
25
MAX.
UNIT
yfs
Cig1-s
Cig2-s
Cos
Crs
forward transfer admittance pulsed; Tj = 25 °C
30
2.6
2
mS
pF
pF
pF
fF
input capacitance at gate 1
input capacitance at gate 2
drain-source capacitance
f = 1 MHz
f = 1 MHz
f = 1 MHz
−
1
1
−
−
−
2.2
1.5
1.3
25
1
1.6
35
1.5
2.8
reverse transfer capacitance f = 1 MHz
noise figure f = 200 MHz; GS = 2 mS; BS = BSopt
F
dB
dB
f = 800 MHz; GS = GSopt; BS = BSopt
2
Rev. 06 - 13 November 2007
4 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
MRA769
MLD268
40
0
handbook, halfpage
gain
reduction
Y
fs
(dB)
10
(mS)
30
20
30
40
20
10
0
50
0
1
2
3
4
50
0
50
100
150
( C)
o
V
(V)
T
AGC
j
f = 50 MHz.
Fig.4 Transfer admittance as a function of the
junction temperature; typical values.
Fig.5 Typical gain reduction as a function of
the AGC voltage.
MRA771
MLD270
120
20
handbook, halfpage
V
V
= 4 V
S
3 V 2.5 V
2 V
unw
G2
I
D
(dB µV)
(mA)
110
15
100
90
10
5
1.5 V
1 V
80
0
0
10
20
30
40
50
0
0.4
0.8
1.2
1.6
V
2.0
(V)
gain reduction (dB)
G1
S
VDS = 5 V; VGG = 5 V; fw = 50 MHz.
funw = 60 MHz; Tamb = 25 °C; RG1 = 120 kΩ.
VDS = 5 V.
Fig.6 Unwanted voltage for 1% cross-modulation
as a function of gain reduction; typical
values; see Fig.20.
Tj = 25 °C.
Fig.7 Transfer characteristics; typical values.
Rev. 06 - 13 November 2007
5 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
MLD269
MLD271
20
150
handbook, halfpage
handbook, halfpage
V
= 1.4 V
S
V
= 4 V
G2 S
I
G1
D
I
3.5 V
(mA)
G1
16
(µA)
1.3 V
3 V
100
1.2 V
1.1 V
12
8
2.5 V
2 V
1.0 V
0.9 V
50
4
0
0
0
0
2
4
6
8
10
(V)
0.5
1.0
1.5
2.0
2.5
(V)
V
V
G1
DS
S
VDS = 5 V.
VG2-S = 4 V.
Tj = 25 °C.
Tj = 25 °C.
Fig.9 Gate 1 current as a function of gate 1
voltage; typical values.
Fig.8 Output characteristics; typical values.
MLD272
MLD273
16
40
handbook, halfpage
handbook, halfpage
I
y
D
fs
(mS)
(mA)
V
= 4 V
S
G2
12
30
3.5 V
3 V
8
4
0
20
2.5 V
10
0
2 V
0
10
20
30
40
50
(µA)
0
4
8
12
16
20
(mA)
I
I
G1
D
VDS = 5 V.
VG2-S = 4 V.
Tj = 25 °C.
VDS = 5 V.
Tj = 25 °C.
Fig.10 Forward transfer admittance as a
function of drain current; typical values.
Fig.11 Drain current as a function of gate 1 current;
typical values.
Rev. 06 - 13 November 2007
6 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
MLD274
MLD275
20
12
handbook, halfpage
handbook, halfpage
R
= 47 kΩ 68 kΩ
G1
I
D
I
D
82 kΩ
(mA)
(mA)
15
100 kΩ
120 kΩ
150 kΩ
8
10
5
180 kΩ
220 kΩ
4
0
0
0
2
4
6
8
0
1
2
3
4
5
V
(V)
V
= V (V)
DS
GG
GG
VDS = 5 V; VG2-S = 4 V.
G1 = 120 kΩ (connected to VGG); Tj = 25 °C.
VG2-S = 4 V.
R
RG1 connected to VGG; Tj = 25 °C.
Fig.12 Drain current as a function of gate 1
supply voltage (= VGG); typical values;
see Fig.20.
Fig.13 Drain current as a function of gate 1
(= VGG) and drain supply voltage;
typical values; see Fig.20.
MLD276
MLB945
12
40
handbook, halfpage
handbook, halfpage
V
= 5 V
4.5 V
GG
I
G1
(µA)
I
D
V
= 5 V
GG
4 V
(mA)
30
3.5 V
3 V
4.5 V
8
4 V
3.5 V
3 V
20
10
4
0
0
0
0
2
4
6
2
4
6
V
(V)
S
V
(V)
S
G2
G2
VDS = 5 V; Tj = 25 °C.
VDS = 5 V; Tj = 25 °C.
RG1 = 120 kΩ (connected to VGG).
RG1 = 120 kΩ (connected to VGG).
Fig.14 Drain current as a function of gate 2 voltage;
typical values; see Fig.20.
Fig.15 Gate 1 current as a function of gate 2
voltage; typical values; see Fig.20.
Rev. 06 - 13 November 2007
7 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
MLD277
MLD278
2
10
3
2
3
10
rs
10
handbook, halfpage
y
y
ϕ
is
(mS)
rs
(deg)
(µS)
ϕ
rs
2
10
10
10
y
rs
b
is
1
10
10
g
is
1
1
10
1
2
3
2
3
10
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 5 V; VG2 = 4 V.
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
ID = 15 mA; Tamb = 25 °C.
Fig.16 Input admittance as a function of frequency;
typical values.
Fig.17 Reverse transfer admittance and phase as
a function of frequency; typical values.
MLD280
MLD279
2
2
10
fs
10
10
handbook, halfpage
y
os
(mS)
ϕ
y
fs
y
fs
fs
(deg)
b
g
(mS)
os
os
1
ϕ
10
10
1
2
10
10
1
1
2
3
2
3
10
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 5 V; VG2 = 4 V.
VDS = 5 V; VG2 = 4 V.
ID = 15 mA; Tamb = 25 °C.
ID = 15 mA; Tamb = 25 °C.
Fig.18 Forward transfer admittance and phase as
a function of frequency; typical values.
Fig.19 Output admittance as a function of
frequency; typical values.
Rev. 06 - 13 November 2007
8 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
V
AGC
R1
10 kΩ
C1
4.7 nF
C3 12 pF
R
L
L1
C2
DUT
50 Ω
≈450 nH
C4
4.7 nF
R
R2
GEN
R
G1
50 Ω
50Ω
4.7 nF
V
I
V
MLD171
GG
V
DS
Fig.20 Cross-modulation test set-up.
Rev. 06 - 13 November 2007
9 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
Table 1 Scattering parameters: VDS =5 V; VG2-S = 4 V; ID = 10 mA
S11
S21
S12
S22
f
MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE MAGNITUDE ANGLE
(MHz)
(ratio)
(deg)
(ratio)
(deg)
(ratio)
(deg)
(ratio)
(deg)
40
100
0.989
0.985
0.976
0.958
0.942
0.918
0.899
0.876
0.852
0.823
0.800
0.750
0.719
0.682
0.642
0.602
0.547
0.596
0.682
0.771
0.793
−3.4
−8.3
2.420
2.414
2.368
2.301
2.251
2.170
2.080
2.001
1.924
1.829
1.747
1.621
1.535
1.424
1.349
1.283
1.130
1.018
0.979
0.804
0.541
175.7
169.1
158.8
148.5
138.8
129.5
120.7
112.1
103.2
94.7
0.000
0.001
0.003
0.004
0.005
0.005
0.005
0.005
0.005
0.005
0.005
0.005
0.008
0.010
0.013
0.018
0.014
0.040
0.077
0.120
0.149
79.9
78.3
0.993
0.992
0.987
0.980
0.974
0.966
0.958
0.951
0.944
0.937
0.933
0.928
0.930
0.924
0.928
0.928
0.887
0.837
0.778
0.629
0.479
−1.6
−3.9
200
−16.4
−24.1
−32.0
−39.3
−46.0
−52.6
−58.8
−64.9
−70.9
−82.4
−92.7
−102.5
−109.8
−116.5
−124.9
−128.7
−132.6
−142.5
−157.5
80.3
−7.8
300
73.7
−11.4
−15.2
−18.7
−22.2
−25.5
−28.9
−32.1
−35.2
−41.7
−48.4
−54.9
−62.9
−73.1
−81.0
−95.8
−109.6
−119.5
−119.9
400
70.7
500
67.2
600
67.8
700
68.6
800
72.9
900
78.7
1000
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
86.5
88.3
70.7
120.5
139.8
137.8
156.8
175.1
172.6
−163.9
−164.0
178.8
158.3
54.6
39.4
22.5
1.1
−15.1
−49.1
−79.4
−116.2
−153.5
Table 2 Noise data: VDS = 5 V; VG2-S = 4 V; ID = 10 mA
Γopt
f
Fmin
(dB)
rn
50.40
(MHz)
(ratio)
(deg)
49.6
800
2.00
0.686
Rev. 06 - 13 November 2007
10 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
PACKAGE OUTLINES
Plastic surface mounted package; 4 leads
SOT143B
D
B
E
A
X
y
H
v
M
A
E
e
b
p
w
M
B
4
3
Q
A
A
1
c
1
2
L
p
b
1
e
1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
max
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
E
1.1
0.9
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
0.1
mm
1.9
1.7
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT143B
Rev. 06 - 13 November 2007
11 of 14
NXP Semiconductors
Product specification
N-channel dual gate MOS-FETs
BF904; BF904R
Plastic surface mounted package; reverse pinning; 4 leads
SOT143R
D
B
E
A
X
y
H
v
M
A
E
e
b
w
M
B
p
3
4
Q
A
A
1
c
2
1
L
p
b
1
e
1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
max
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
E
1.1
0.9
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.55
0.25
0.45
0.25
0.1
mm
1.9
1.7
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-03-10
SOT143R
Rev. 06 - 13 November 2007
12 of 14
BF904; BF904R
NXP Semiconductors
N-channel dual gate MOS-FETs
Legal information
Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
malfunction of an NXP Semiconductors product can reasonably be expected
Definitions
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
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Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
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any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
Disclaimers
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Contact information
For additional information, please visit: http://www.nxp.com
For sales office addresses, send an email to: salesaddresses@nxp.com
Rev. 06 - 13 November 2007
13 of 14
BF904; BF904R
NXP Semiconductors
N-channel dual gate MOS-FETs
Revision history
Revision history
Document ID
Release date
20071113
Data sheet status
Change notice
Supersedes
BF904_904R_N_6
Modifications:
Product data sheet
-
BF904_904R_5
• Fig. 1 and 2 on page 2; Figure note changed
BF904_904R_5
(9397 750 05898)
19990517
Product specification
-
BF904R_4
BF904R_3
BF904R_4
19970905
Product specification
-
(9397 750 02668)
BF904R_3
BF904R_2
BF904R_1
19950425
Product specification
-
-
-
BF904R_2
BF904R_1
-
-
-
-
-
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2007.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 13 November 2007
Document identifier: BF904_904R_N_6
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