934054713235 [NXP]
TRANSISTOR 850 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal;
| 型号： | 934054713235 |
| 厂家： | 
NXP |
| 描述： | TRANSISTOR 850 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, FET General Purpose Small Signal 开关 光电二极管 晶体管 |
| 文件： | 总14页 (文件大小：128K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
andbook, halfpage
BSH103
N-channel enhancement mode
MOS transistor
1998 Feb 11
Product specification
Supersedes data of 1998 Jan 30
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
FEATURES
PINNING - SOT23
PIN
• Very low threshold
SYMBOL
DESCRIPTION
• High-speed switching
1
2
3
g
s
d
gate
• No secondary breakdown
• Direct interface to C-MOS, TTL etc.
source
drain
APPLICATIONS
3
• Power management
handbook, halfpage
d
s
• DC to DC converters
• Battery powered applications
• ‘Glue-logic’; interface between logic blocks and/or
periphery
g
• General purpose switch.
1
2
Top view
MAM273
DESCRIPTION
N-channel enhancement mode MOS transistor in a SOT23
SMD package.
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
VDS
PARAMETERS
CONDITIONS
MIN.
MAX.
30
UNIT
drain-source voltage (DC)
source-drain diode forward voltage
gate-source voltage (DC)
gate-source threshold voltage
drain current (DC)
−
−
−
V
V
V
V
A
Ω
W
VSD
VGS
VGSth
ID
VGD = 0; IS = 0.5 A
1
±8
−
VDS = VGS; ID = 1 mA
Ts = 80 °C
0.4
−
0.85
0.5
0.5
RDSon
Ptot
drain-source on-state resistance
total power dissipation
VGS = 2.5 V; ID = 0.5 A
Ts = 80 °C
−
−
CAUTION
This product is supplied in anti-static packing to prevent damage caused by electrostatic discharge during transport
and handling. For further information, refer to Philips specs.: SNW-EQ-608, SNW-FQ-302A and SNW-FQ-302B.
1998 Feb 11
2
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
drain-source voltage (DC)
CONDITIONS
MIN.
MAX.
30
UNIT
VDS
VGS
ID
−
−
−
−
−
−
−
V
V
A
A
gate-source voltage (DC)
drain current (DC)
±8
Ts = 80 °C; note 1
note 2
0.85
3.4
IDM
Ptot
peak drain current
total power dissipation
Ts = 80 °C
0.5
W
W
W
°C
°C
T
T
amb = 25 °C; note 3
amb = 25 °C; note 4
0.75
0.54
+150
+150
Tstg
Tj
storage temperature
−55
−55
operating junction temperature
Source-drain diode
IS
source current (DC)
peak pulsed source current
Ts = 80 °C
−
−
0.5
2
A
A
ISM
note 2
Notes
1. Ts is the temperature at the soldering point of the drain lead.
2. Pulse width and duty cycle limited by maximum junction temperature.
3. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 27.5 K/W.
4. Device mounted on printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W.
MGM190
MBK502
0.6
10
handbook, halfpage
handbook, halfpage
I
DS
P
tot
(A)
(W)
(2)
1
(1)
0.4
−1
10
t
p
P
DC
=
δ
0.2
T
−2
10
t
t
p
T
−3
10
10
0
0
2
−1
1
10
10
40
80
120
160
V
(V)
DS
T
(°C)
s
δ = 0.01; Ts = 80 °C.
(1) DSon limitation.
(2) Pulsed.
R
Fig.2 Power derating curve.
Fig.3 SOAR.
1998 Feb 11
3
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
thermal resistance from junction to soldering point
VALUE
UNIT
Rth j-s
140
K/W
MBK503
3
10
R
th j-s
(K/W)
δ = 1
0.75
2
10
0.5
0.33
0.2
0.1
t
10
p
P
δ =
0.05
T
0.02
0.01
t
t
p
T
0
1
10
−6
−5
−4
−3
−2
−1
10
10
10
10
10
1
t
(s)
p
Fig.4 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.
1998 Feb 11
4
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VGS = 0; ID = 10 µA
MIN.
30
TYP.
MAX. UNIT
V(BR)DSS drain-source breakdown voltage
−
−
V
VGSth
IDSS
gate-source threshold voltage
drain-source leakage current
gate leakage current
VGS = VDS; ID = 1 mA
VGS = 0; VDS = 24 V
VGS = ±8 V; VDS = 0
0.4
−
−
−
V
−
100
±100
0.4
0.5
0.6
−
nA
nA
Ω
IGSS
−
−
RDSon
drain-source on-state resistance VGS = 4.5 V; ID = 0.5 A
GS = 2.5 V; ID = 0.5 A
−
−
V
−
−
Ω
VGS = 1.8 V; ID = 0.25 A
−
−
Ω
Ciss
Coss
Crss
QG
input capacitance
VGS = 0; VDS = 24 V; f = 1 MHz
VGS = 0; VDS = 24 V; f = 1 MHz
VGS = 0; VDS = 24 V; f = 1 MHz
−
83
27
14
2100
pF
pF
pF
pC
output capacitance
reverse transfer capacitance
total gate charge
−
−
−
−
VGS = 4.5 V; VDD = 15 V;
−
−
ID = 0.5 A; Tamb = 25 °C
QGS
QGD
gate-source charge
gate-drain charge
VDD = 15 V; ID = 0.5 A;
Tamb = 25 °C
−
−
95
−
−
pC
pC
VDD = 15 V; ID = 0.5 A;
670
Tamb = 25 °C
Switching times
td(on) turn-on delay time
VGS = 0 to 8 V; VDD = 15 V;
ID = 0.5 A; Rgen = 6 Ω
−
−
−
−
−
−
2.5
3.5
6
−
−
−
−
−
−
ns
ns
ns
ns
ns
ns
tf
fall time
VGS = 0 to 8 V; VDD = 15 V;
ID = 0.5 A; Rgen = 6 Ω
ton
turn-on switching time
turn-off delay time
rise time
VGS = 0 to 8 V; VDD = 15 V;
ID = 0.5 A; Rgen = 6 Ω
td(off)
tr
VGS = 8 to 0 V; VDD = 15 V;
ID = 0.5 A; Rgen = 6 Ω
20
7
VGS = 8 to 0 V; VDD = 15 V;
ID = 0.5 A; Rgen = 6 Ω
toff
turn-off switching time
VGS = 8 to 0 V; VDD = 15 V;
27
ID = 0.5 A; Rgen = 6 Ω
Source-drain diode
VSD source-drain diode forward
VGD = 0; IS = 0.5 A
−
−
−
1
V
voltage
trr
reverse recovery time
IS = 0.5 A; di/dt = −100 A/µs
25
−
ns
1998 Feb 11
5
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
h
V
90 %
DD
V
in
R
L
10 %
0
V
out
90 %
V
out
V
in
10 %
0
t
t
d(on)
t
d(off)
t
t
t
r
f
MAM274
on
off
Fig.5 Switching times test circuit with input and output waveforms.
MBK507
MBK505
(6)
5
16
14
12
10
8
4
handbook, halfpage
V
handbook, halfpage
(1)(2) (3)(4) (5)
V
DS
(V)
GS
I
D
(A)
(V)
4
3
3
(7)
2
1
0
(1)
(2)
2
1
0
6
(8)
(9)
4
2
0
2
4
6
8
10
(V)
V
DS
0
Q
(pC)
G
Tamb = 25 °C; tp = 300 µs; δ = 0.
(1) VGS = 7.5 V.
(5) VGS = 3 V.
(6) VGS = 2.5 V.
(7) VGS = 2 V.
(8) VGS = 1.5 V.
(9) VGS = 1 V.
VDD = 15 V; ID = 0.5 A; Tamb = 25 °C.
(1) VDS
(2) VGS.
(2) VGS = 5.5 V.
.
(3) VGS = 4.5 V.
(4) VGS = 3.5 V.
Fig.6 Gate-source and drain-source voltages as
functions of total gate charge; typical values.
Fig.7 Output characteristics; typical values.
1998 Feb 11
6
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
MBK504
MBK506
300
4
handbook, halfpage
handbook, halfpage
I
D
C
(pF)
(A)
3
200
100
2
1
0
C
iss
C
C
oss
rss
0
0
10
20
30
0
1
2
3
V
(V)
V
(V)
GS
DS
VGS = 0 ; f = 1 MHz; Tamb = 25 °C.
VDS = 10 V; Tamb = 25 °C; tp = 300 µs; δ = 0.
Fig.9 Capacitance as a function of drain-source
voltage; typical values.
Fig.8 Transfer characteristic; typical values.
MBK508
MBK509
10
2
handbook, halfpage
handbook, halfpage
I
S
(A)
R
DSon
1.6
(Ω)
(1)(2)(3)(4)
1.2
0.8
(5) (6)
1
(1)
(2)
(3)
0.4
0
−1
10
0
2
4
6
8
10
(V)
0
0.4
0.8
1.2
V
(V)
SD
V
GS
Tamb = 25 °C; tp = 300 µs; δ = 0.
(1) ID = 0.1 A.
VGD = 0.
(4) ID = 0.9 A.
(5) ID = 1.8 A.
(6) ID = 3.6 A.
(1) Tamb = 150 °C.
(2) Tamb = 25 °C.
(3) Tamb = −65 °C.
(2) ID = 0.22 A.
(3) ID = 0.45 A.
Fig.10 Source current as a function of source-drain
diode forward voltage; typical values.
Fig.11 Drain-source on-state resistance as a function
of gate-source voltage; typical values.
1998 Feb 11
7
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
MBK510
MBK511
1.6
1.2
handbook, halfpage
handbook, halfpage
(1)
(2)
k
k
1.2
0.8
0.8
0.4
0.4
0
−65
0
−65
−15
35
85
135
185
T (°C)
−15
35
85
135
185
T (°C)
j
j
RDSon at Tj
VGSth at Tj
VGSth at VDS = VGS; ID = 1 mA.
(1) RDSon at VGS = 4.5 V; ID = 0.5 mA.
(2) RDSon at VGS = 2.5 V; ID = 0.5 mA.
k =
.
-----------------------------------------
k =
.
--------------------------------------
RDSon at 25 °C
VGSth at 25°C
Fig.12 Temperature coefficient of gate-source
threshold voltage as a function of junction
temperature; typical values.
Fig.13 Temperature coefficient of drain-source
on-resistance as a function of junction
temperature; typical values.
1998 Feb 11
8
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
PACKAGE OUTLINE
Plastic surface mounted package; 3 leads
SOT23
D
B
E
A
X
H
v
M
A
E
3
Q
A
A
1
c
1
2
e
1
b
p
w M
B
L
p
e
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
UNIT
b
c
D
E
e
e
H
L
Q
v
w
A
p
p
1
E
max.
1.1
0.9
0.48
0.38
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
mm
0.1
1.9
0.95
0.2
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT23
1998 Feb 11
9
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1998 Feb 11
10
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
BSH103
NOTES
1998 Feb 11
11
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© Philips Electronics N.V. 1998
SCA57
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
135108/00/04/pp12
Date of release: 1998 Feb 11
Document order number: 9397 750 03303
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N-channel enhancement mode MOS transistor in a SOT23 SMD package.
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Cross reference
Features
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l Very low threshold
l High-speed switching
l No secondary breakdown
l Direct interface to C-MOS, TTL etc.
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l Power management
l DC to DC converters
l Battery powered applications
l ‘Glue-logic’; interface between logic blocks and/or periphery
l General purpose switch.
BSH103
BSH103
Datasheet
File
Page size
Publication
Type nr. Title
release date Datasheet status count (kB
BSH103 N-channel enhancement
mode MOS transistor
11-Feb-98
Product
Specification
12
96
Products, packages, availability and ordering
2 of 2
North
Partnumber American
Partnumber
Order code
(12nc)
marking/packing package device statu
Standard
BSH103
Marking * Reel
SOT23 Full producti
Pack, SMD,
BSH103
T/R
9340 547 13215
Low Profile
Standard
Marking * Reel
BSH103 /T3 9340 547 13235 Pack, SMD,
SOT23 Full producti
Low Profile,
Large
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NXP
934054728118
TRANSISTOR 10.3 A, 60 V, 0.15 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252AA, PLASTIC, SMD, SC-63, DPAK-3, FET General Purpose Power
NXP
934054743113
DIODE 0.05 A, 3000 V, SILICON, SIGNAL DIODE, HERMETIC SEALED, GLASS PACKAGE-2, Signal Diode
NXP
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