935012710623 [NXP]
IC F/FAST SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, 7.50 MM, PLASTIC, MS-013AD, SOT-137-1, SO-24, Bus Driver/Transceiver;
| 型号： | 935012710623 |
| 厂家： | 
NXP |
| 描述： | IC F/FAST SERIES, OCTAL 1-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, 7.50 MM, PLASTIC, MS-013AD, SOT-137-1, SO-24, Bus Driver/Transceiver 输入元件 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总14页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
74F651A/74F652A
Transceivers/registers
Product specification
1999 Jun 23
Replaces datasheet 74F651/74F652/74F651A/74F652A of 1990 Oct 23
IC15 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
74F651A Octal transceiver/register, inverting (3-State)
74F652A Octal transceiver/register, non-inverting (3-State)
FEATURES
DESCRIPTION
The 74F651A and 74F652A transceivers/registers consist of bus
transceiver circuits with 3–State outputs, D–type flip–flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or the internal registers. Data on the A or
B bus will be clocked into the registers as the appropriate clock pin
goes high. Output enable (OEAB, OEBA) and select (SAB, SBA)
pins are provided for bus management.
• Combines 74F245 and two 74F374 type functions in one chip
• High impedance base inputs for reduced loading (70µA in high
and low states)
• Independent registers for A and B buses
• Multiplexed real-time and stored data
• Choice of non-inverting and inverting data paths
• 3-State outputs
• Industrial temperature range available (–40°C to +85°C) for
74F652A
TYPE
74F651/74F652
TYPICAL f
TYPICAL SUPPLY CURRENT( TOTAL)
max
110MHz
175MHz
140mA
110mA
74F651A/74F652A
ORDERING INFORMATION
ORDER CODE
COMMERCIAL RANGE
= 5V ±10%,
INDUSTRIAL RANGE
= 5V ±10%,
DESCRIPTION
PKG DWG #
V
V
CC
CC
T
amb
= 0°C to +70°C
T
amb
= –40°C to +85°C
24–pin plastic slim DIP (300mil)
24–pin plastic SOL
N74F651AN, N74F652AN
N74F651AD, N74F652AD
I74F652AN
SOT222-1
SOT137-1
I74F652AD
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
3.5/0.116
LOAD VALUE HIGH/LOW
70µA/70µA
A0 – A7, B0 – B7
CPAB, CPBA
SAB, SBA
A, B inputs
A–to–B, B–to–A clock inputs
1.0/0.033
20µA/20µA
A–to–B, B–to–A select inputs
1.0/0.033
20µA/20µA
OEAB, OEBA
A0 – A7, B0 – B7
A0 – A7, B0 – B7
A0 – A7, B0 – B7
A–to–B, B–to–A output enable inputs
A, B outputs for N74F651, N74F652
A, B outputs for N74F651A, N74F652A
A, B outputs for I74F652A
1.0/0.033
20µA/20µA
750/106.7
750/80
15mA/64mA
15mA/48mA
15mA/36mA
750/60
Note to input and output loading and fan out table
1. One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
2
1999 Jun 23
853–1126 21852
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
PIN CONFIGURATION
LOGIC SYMBOL
74F651A
74F651A
CPAB
SAB
OEAB
A0
1
2
3
4
5
24
23
22
21
20
V
CC
4
5
6
7
8
9
10 11
CPBA
SBA
OEBA
B0
A0 A1 A2 A3 A4 A5 A6 A7
A1
CPAB
SAB
1
2
6
7
8
9
19 B1
18 B2
A2
OEAB
CPBA
SBA
3
23
22
21
A3
A4
17
16
15
14
B3
B4
B5
B6
OEBA
B0 B1 B2 B3 B4 B5 B6 B7
A5
A6 10
A7 11
20 19 18 17 16 15 14 13
GND 12
13 B7
V
= Pin 24
CC
GND = Pin 12
SF00401
SF00402
IEC/IEEE SYMBOL
LOGIC DIAGRAM
21
74F651A
74F651A
OEBA
3
23
22
1
OEAB
CPBA
SBA
CPAB
21
3
EN1 [BA]
EN1 [AB]
2
23
22
1
SAB
G3
G5
C6
2
I of 8 channels
1D
C1
G7
20
1
1
5
5
4D
4
1
4
20
7
7
1
6D
1
A0
B0
2
1D
C1
19
18
17
16
15
14
13
5
6
7
8
9
10
11
to 7 other channels
V
= Pin 24
CC
GND = Pin 12
SF00404
SF00403
3
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
PIN CONFIGURATION
LOGIC SYMBOL
74F652A
74F652A
CPAB
SAB
OEAB
A0
1
2
3
4
5
24
23
22
21
20
V
CC
4
5
6
7
8
9
10 11
CPBA
SBA
OEBA
B0
A0 A1 A2 A3 A4 A5 A6 A7
A1
CPAB
SAB
1
2
6
7
8
9
19 B1
18 B2
A2
OEAB
CPBA
SBA
3
23
22
21
A3
A4
17
16
15
14
B3
B4
B5
B6
OEBA
B0 B1 B2 B3 B4 B5 B6 B7
A5
A6 10
A7 11
20 19 18 17 16 15 14 13
GND 12
13 B7
V
= Pin 24
CC
GND = Pin 12
SF00405
SF00406
IEC/IEEE SYMBOL
LOGIC DIAGRAM
21
74F652A
74F652A
OEBA
3
OEAB
23
21
3
CPBA
22
EN1 [BA]
SBA
1
EN1 [AB]
CPAB
2
23
22
1
SAB
G3
G5
C6
2
I of 8 channels
G7
1D
C1
20
5
5
1
1
4D
4
1
4
7
7
1
6D
1
A0
20
2
B0
19
18
17
16
15
14
13
5
6
1D
C1
7
8
9
10
11
to 7 other channels
SF00407
SF00408
4
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the 74F651A
and 74F652A. The select pins determine whether data is stored or
transferred through the device in real time. The output enable pins
determine the direction of the data flow.
BUS MANAGEMENT FUNCTIONS
STORAGE FROM
A, B, OR A AND B
REAL TIME BUS TRANSFER
BUS A TO BUS B
TRANSFER STORED DATA
TO A AND/OR B
REAL TIME BUS TRANSFER
BUS B TO BUS A
BUS A
BUS A
BUS A
BUS B
BUS B
BUS A
BUS B
BUS B
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
H or L H or L
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
L
L
X
X
X
L
H
H
X
X
L
X
X
L
L
H
X
↑
X
↑
X
X
X
X
X
X
H
L
H
H
X
↑
H
↑
SF00409
FUNCTION TABLE
INPUTS
OEAB OEBA CPAB CPBA SAB
DATA I/O
OPERATING MODE
74F652A
SBA
X
An
Bn
74F651A
L
L
H
H
H
H
X
L
H or L H or L
X
X
X
L
Input
Input
Input
Input
Input
Input
Isolation
Isolation
↑
↑
X
Store A and B data
Store A, hold B
Store A and B data
X
H
L
↑
H or L
X
Unspecified*
Output
Input
Store A hold B
↑
↑
X
Store A in both registers
Hold A, store B
Store A in both registers
Hold A, store B
H or L
↑
X
X
X
X
L
X
Unspecified*
Output
Output
Output
Input
L
↑
X
↑
X
L
Input
Store B in both registers
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Stored A data to B bus
Stored A data to B bus
Stored B data to A bus
Store B in both registers
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Stored A data to B bus
Stored A data to B bus
Stored B data to A bus
L
L
L
Input
L
L
X
H or L
X
H
X
Input
H
H
H
H
H
H
L
X
Output
Output
Output
Output
H or L
X
H
H
H
X
Input
H or L H or L
H or L H or L
H
H
Output
Output
L
Notes to function table
1. H
2. L
3. *
=
=
=
High-voltage level
Low-voltage level
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are
always enabled, i.e., data at the bus pins will be stored on every low-to-high transition of the clock.
4. ↑
5. X
=
=
Low-to-high clock transition
Don’t care
5
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.
SYMBOL
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
UNIT
V
V
Supply voltage
Input voltage
Input current
CC
IN
V
V
I
mA
V
IN
V
OUT
OUT
Voltage applied to output in high output state
Current applied to output in low output state
–0.5 to V
72
CC
I
mA
°C
°C
°C
Commercial range
Industrial range
0 to +70
–40 to +85
–65 to +150
T
amb
Operating free air temperature range
Storage temperature range
T
stg
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
4.5
NOM
MAX
V
Supply voltage
5.0
5.5
V
V
CC
IH
IL
V
V
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
2.0
0.8
–18
–15
48
V
I
mA
mA
mA
mA
°C
°C
Ik
I
OH
Commercial range
I
Low-level output current
OL
Industrial range (74F652A only)
Commercial range
36
0
+70
+85
T
amb
Operating free air temperature range
Industrial range (74F652A only)
–40
6
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
LIMITS
1
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
2
MIN
2.4
2.7
2.0
TYP
MAX
±10%V
±5%V
V
V
V
CC
V
V
V
= MIN,
= MAX,
= MIN
CC
IL
I
I
= –3mA
OH
3.3
V
OH
High-level output voltage
CC
IH
= –15mA ±10%V
OH
CC
CC
V
V
V
= MIN,
±10%V
= MAX
0.55
0.55
V
V
CC
IL
= MAX,
= MIN
V
V
Low-level output voltage
Input clamp voltage
I
OL
OL
±5%V
0.42
CC
IH
V
V
V
= MIN, I = I
IK
–0.73
–1.2
100
1
V
IK
CC
CC
CC
I
others
= 0.0V, V = 7.0V
µA
mA
I
Input current at maximum input
voltage
I
I
A0–A7, B0–B7
= 5.5V, V = 5.5V
I
OEAB, OEBA,
CPAB, CPBA,
SAB, SBA
I
High-level input current
Low-level input current
V
V
= MAX, V = 2.7V
20
µA
µA
IH
CC
I
OEAB, OEBA,
CPAB, CPBA,
SAB, SBA
I
I
= MAX, V = 0.5V
–20
IL
CC
I
Off-state output current,
high-level voltage applied
+ I
A0–A7, B0–B7
A0–A7, B0–B7
V
V
= MAX, V = 2.7V
70
µA
µA
OZH
IH
CC
O
Off–state output current,
low–level voltage applied
I
I
+ I
= MAX, V = 0.5V
–70
OZL
IL
CC
O
3
Output current
V
CC
V
CC
V
CC
V
CC
= MAX, V = 2.25V
–60
–160
145
165
160
mA
mA
mA
mA
O
0
I
I
I
= MAX
= MAX
= MAX
105
115
115
CCH
CCL
CCZ
I
Supply current (total)
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V = 5V, T = 25°C.
CC
amb
3. I is tested under conditions that produce current approximately one half of the true short–circuit output current (I ).
O
OS
7
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
AC ELECTRICAL CHARACTERISTICS FOR 74F651A
LIMITS
T
V
= +25°C
= +5.0V
T
V
= 0°C to +70°C
= +5.0V ± 10%
CC
amb
amb
SYMBOL
PARAMETER
TEST CONDITION
UNIT
CC
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
f
Maximum clock frequency
Waveform 1
Waveform 1
155
175
140
ns
ns
max
t
t
Propagation delay
CPAB or CPBA to An or Bn
4.5
5.5
7.0
7.5
10.0
10.5
4.0
5.0
11.0
11.0
PLH
PHL
t
t
Propagation delay
An or Bn to Bn or An
2.5
4.0
4.5
6.5
7.5
9.0
2.0
4.0
8.5
10.0
PLH
PHL
Waveform 2, 3
Waveform 2, 3
Waveform 7, 8
Waveform 7, 8
ns
ns
ns
ns
t
t
Propagation delay
SAB or SBA to An or Bn
4.0
5.0
7.0
7.0
10.0
10.0
3.5
4.5
12.0
10.0
PLH
PHL
t
t
Output enable time
OEAB or OEBA to An or Bn
3.0
3.5
5.0
6.0
8.0
8.5
2.5
3.0
8.5
9.0
PZH
PZL
t
t
Output disable time
OEAB or OEBA to An or Bn
1.5
2.5
4.0
6.0
7.0
8.5
1.0
2.0
7.5
9.0
PHZ
PLZ
AC SETUP REQUIREMENTS FOR 74F651A
LIMITS
T
V
= +25°C
= +5.0V
T
V
= 0°C to +70°C
= +5.0V ± 10%
CC
amb
amb
SYMBOL
PARAMETER
TEST CONDITION
UNIT
CC
C = 50pF, R = 500Ω
C = 50pF, R = 500Ω
L L
L
L
MIN
TYP
MAX
MIN
MAX
4.0
4.5
t
t
(H)
(L)
Setup time, high or low
An or Bn to CPAB or CPBA
3.5
4.0
su
su
Waveform 4
Waveform 4
ns
ns
ns
ns
ns
t (H)
Hold time, high or low
An or Bn to CPAB or CPBA
0
0
0
0
h
t
h
(L)
5.0
5.0
t
su
t
su
(H)
(L)
Setup time, high or low
OEBA to OEAB or OEAB to OEBA
5.0
5.0
Waveform 5, 6
Waveform 5, 6
Waveform 1
t (H)
Hold time, high or low
OEBA to OEAB or OEAB to OEBA
0
0
0
0
h
t
h
(L)
t
w
t
w
(H)
(L)
Pulse width, high or low
CPAB or CPBA
4.5
3.5
4.5
4.0
Note to AC setup requirements for 74F651A:
1. Setup time is to protect against surge current caused by enabling 16 outputs (48mA per output) simultaneously.
8
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
AC ELECTRICAL CHARACTERISTICS FOR 74F652A
LIMITS
T
V
= +25°C
= +5.0V
T
V
= 0°C to +70°C
= +5.0V ± 10%
T
= –40°C to +85°C
amb
amb
amb
TEST
CONDITION
V
= +5.0V ± 10%
CC
CC
CC
SYMBOL
PARAMETER
UNIT
C = 50pF,
L
C = 50pF,
L
C = 50pF,
L
R = 500Ω
L
R = 500Ω
L
R = 500Ω
L
MIN TYP MAX
MIN
MAX
MIN
MAX
f
Maximum clock frequency
Waveform 1
Waveform 1
155
175
140
140
ns
ns
max
t
t
Propagation delay
CPAB or CPBA to An or Bn
5.0
5.0
7.5
7.0
10.0
10.0
4.5
4.5
11.5
10.5
4.5
4.5
11.5
10.5
PLH
PHL
t
t
Propagation delay
An or Bn to Bn or An
4.0
3.0
6.0
5.0
9.0
8.0
3.5
2.5
10.0
8.5
3.5
2.5
10.0
8.5
PLH
PHL
Waveform 1
Waveform 2, 3
Waveform 7, 8
Waveform 7, 8
ns
ns
ns
ns
t
t
Propagation delay
SAB or SBA to An or Bn
4.5
4.0
7.0
8.0
10.0
10.0
4.0
4.0
11.0
11.5
4.0
4.0
11.0
11.5
PLH
PHL
1
t
t
Output enable time
OEAB or OEBA to An or Bn
3.0
3.5
5.0
6.0
8.0
8.5
2.5
3.0
8.5
9.0
2.5
3.0
8.5
9.0
PZH
PZL
t
t
Output disable time
OEAB or OEBA to An or Bn
1.5
2.5
4.0
6.0
7.0
8.5
1.0
2.0
7.5
9.0
1.0
2.0
7.5
9.0
PHZ
PLZ
AC SETUP REQUIREMENTS FOR 74F652A
LIMITS
T
V
= +25°C
= +5.0V
T
V
= 0°C to +70°C
= +5.0V ± 10%
T
= –40°C to +85°C
amb
amb
amb
TEST
CONDITION
V
= +5.0V ± 10%
CC
CC
CC
SYMBOL
PARAMETER
UNIT
C = 50pF,
L
C = 50pF,
L
C = 50pF,
L
R = 500Ω
L
R = 500Ω
L
R = 500Ω
L
MIN TYP MAX
MIN
MAX
MIN
MAX
t
t
(H)
(L)
Setup time, high or low
An or Bn to CPAB or CPBA
3.5
4.0
4.0
4.5
4.0
4.5
su
su
Waveform 4
Waveform 4
ns
ns
ns
ns
ns
t (H)
Hold time, high or low
An or Bn to CPAB or CPBA
0
0
0
0
0
0
h
t
h
(L)
t
su
t
su
(H)
(L)
Setup time, high or low
OEBA to OEAB or OEAB to OEBA
5.0
5.0
5.0
5.0
5.0
5.0
Waveform 5, 6
Waveform 5, 6
Waveform 1
t (H)
Hold time, high or low
OEBA to OEAB or OEAB to OEBA
0
0
0
0
0
0
h
t
h
(L)
t
w
t
w
(H)
(L)
Pulse width, high or low
CPAB or CPBA
4.0
3.5
4.5
4.0
4.5
4.0
Note to AC setup requirements for 74F652A
1. Setup time is to protect against surge current caused by enabling 16 outputs (48mA per output) simultaneously.
9
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
AC WAVEFORMS
For all waveforms, V = 1.5V.
M
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
max
An or Bn
SBA or SAB
V
CPBA
V
M
M
or
CPAB
V
V
t
(H)
M
V
M
t
w
M
t
t
PLH
PHL
t
t
(L)
PLH
PHL
w
V
V
M
M
V
V
M
M
Bn or An
An or Bn
SF00395
An or Bn
SF00394
Waveform 2. Propagation delay for An to Bn or Bn to An and
SAB or SBA to An or Bn
Waveform 1. Propagation delay for clock input to output, clock
pulse width, and maximum clock frequency
SBA or SAB
An or Bn
Bn or An
An or Bn
V
V
M
M
V
V
V
V
M
M
M
M
t
(L)
t (L)
h
t
(H)
t (H)
h
su
t
t
PHL
su
PLH
CPBA
or
CPAB
An or Bn
V
V
V
M
V
M
M
M
SF00397
SF00396
Waveform 3. Propagation delay for An to Bn or Bn to An and
SAB or SBA to An or Bn
Waveform 4. Data setup time and hold times
OEBA
V
V
M
M
OEAB
OEBA
V
V
M
M
t
(L)
t (L)
h
t
(H)
t (H)
h
su
su
OEAB
V
M
V
M
SF00410
SF00411
Waveform 5. OEBA to OEAB setup time and hold times
Waveform 6. OEAB to OEBA setup time and hold times
OEBA
OEBA
V
t
V
M
M
V
V
M
M
OEAB
OEAB
V
-0.3V
0V
t
OH
PZL
PLZ
t
t
PHZ
PZH
V
An or Bn
M
An or Bn
V
M
V
+0.3V
OL
SF00413
SF00412
Waveform 7. 3-State output enable time to high level and
output disable time from high level
Waveform 8. 3-State output enable time to low level and
output disable time from low level
10
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
TEST CIRCUIT AND WAVEFORMS
V
CC
t
w
AMP (V)
90%
7.0V
90%
NEGATIVE
PULSE
V
V
R
M
M
L
V
V
OUT
IN
10%
10%
PULSE
GENERATOR
D.U.T.
0V
t
t )
t
t )
THL ( f
TLH ( r
R
C
R
L
T
L
t
t )
t
t )
TLH ( r
THL ( f
AMP (V)
0V
90%
M
90%
POSITIVE
PULSE
V
V
M
Test Circuit for Open Collector Outputs
10%
10%
t
w
SWITCH POSITION
TEST
SWITCH
closed
closed
open
Input Pulse Definition
t
t
PLZ
PZL
All other
DEFINITIONS:
R
L
C
L
R
T
=
=
=
Load resistor;
see AC electrical characteristics for value.
Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
Termination resistance should be equal to Z
pulse generators.
INPUT PULSE REQUIREMENTS
family
V
M
rep. rate
t
w
t
t
THL
amplitude
TLH
of
OUT
2.5ns
2.5ns
74F
3.0V
1.5V
1MHz
500ns
SF00128
11
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
12
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
13
1999 Jun 23
Philips Semiconductors
Product specification
Transceivers/registers
74F651A/74F652A
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-99
Document order number:
9397 750 06142
Philips
Semiconductors
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