935053480512 [NXP]

IC 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO32, PLASTIC, SO-32, Audio Control IC;
935053480512
型号: 935053480512
厂家: NXP    NXP
描述:

IC 2 CHANNEL(S), EQUALIZER CIRCUIT, PDSO32, PLASTIC, SO-32, Audio Control IC

光电二极管 商用集成电路
文件: 总19页 (文件大小:212K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
DATA SHEET  
TEA6360  
5-band stereo equalizer circuit  
May 1991  
Preliminary specification  
File under Integrated Circuits, IC01  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
FEATURES  
Monolithic integrated 5-band stereo equalizer circuit  
Five filters for each channel  
Centre frequency, bandwidth and maximum boost/cut  
defined by external components  
Choise for variable or constant Q-factor via I2C software  
GENERAL DESCRIPTION  
Defeat mode  
The 5-band stereo equalizer is an 12C-bus controlled tone  
processor for application in car radio sets, TV sets and  
music centres. It offers the possibility of sound control as  
well as equalization of sound pressure behaviour of  
different rooms or loudspeakers, especially in cars.  
All stages are DC-coupled  
I2C-bus control for all functions  
Two different modul addresses programmable.  
QUICK REFERENCE DATA  
SYMBOL  
PARAMETER  
MIN.  
TYP.  
8.5  
MAX.  
13.2  
UNIT  
Vp  
supply voltage (pin 14)  
supply current  
7
V
Ip  
24.5  
mA  
V1,32  
input voltage range  
2.1 to  
VP1  
V
Vo  
maximum output signal level  
(RMS value, pins 13 and 20)  
total signal gain, all filters linear  
1 dB frequency response (linear)  
operating ambient temperature  
-
1.1  
V
Gv  
0.5  
0 to 20  
40  
0
dB  
kHz  
°C  
B
Tamb  
85  
ORDERING INFORMATION  
PACKAGE  
EXTENDED  
TYPE NUMBER  
PINS  
PIN POSITION  
MATERIAL  
CODE  
TEA6360(1)  
TEA6360/T(2)  
32  
32  
shrink DIL  
mini-pack  
plastic  
plastic  
SOT232  
SOT287  
Notes  
1. SOT232; SOT232-1; 1996 August 08.  
2. SOT287; SOT287-1; 1996 August 08.  
May 1991  
2
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
May 1991  
3
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
PINNING  
SYMBOL PIN  
DESCRIPTION  
ViL  
1
2
3
4
5
6
7
8
9
audio frequency input LEFT  
F1LA  
n.c.  
connection A for filter 1 LEFT (f = 2.95 kHz)  
not connected  
F1LB  
F2LA  
F2LB  
F3LA  
F3LB  
F4LA  
F4LB  
F5LA  
F5LB  
VoL  
connection B for filter 1 LEFT (f = 2.95 kHz)  
connection A for filter 2 LEFT (f = 12 kHz)  
connection B for filter 2 LEFT (f = 12 kHz)  
connection A for filter 3 LEFT (f = 790 Hz)  
connection B for filter 3 LEFT (f = 790 Hz)  
connection A for filter 4 LEFT (f = 205 Hz)  
10 connection B for filter 4 LEFT (f = 205 Hz)  
11 connection A for filter 5 LEFT (f = 59 Hz)  
12 connection B for filter 5 LEFT (f = 59 Hz)  
13 audio frequency output LEFT  
VP  
14 supply voltage (+8.5 V)  
SDA  
SCL  
15 I2C-bus data line  
16 I2C-bus clock line  
GND2  
MAD  
GND1  
VoR  
17 ground 2 (I2C-bus ground)  
18 modul address  
19 ground 1 (analog ground)  
20 audio frequency output RIGHT  
21 connection B for filter 5 RIGHT (f = 59 Hz)  
22 connection A for filter 5 RIGHT (f = 59 Hz)  
23 connection B for filter 4 RIGHT (f = 205 Hz)  
24 connection A for filter 4 RIGHT (f = 205 Hz)  
25 connection B for filter 3 RIGHT (f = 790 Hz)  
26 connection A for filter 3 RIGHT (f = 790 Hz)  
27 connection B for filter 2 RIGHT (f = 12 kHz)  
28 connection A for filter 2 RIGHT (f = 12 kHz)  
29 connection B for filter 1 RIGHT (f = 2.95 kHz)  
30 not connected  
F5RB  
F5RA  
F4RB  
F4RA  
F3RB  
F3RA  
F2RB  
F2RA  
F1RB  
n.c.  
Fig.2 Pin configuration  
F1RA  
ViR  
31 connection A for filter 1 RIGHT (f = 2.95 kHz)  
32 audio frequency input RIGHT  
May 1991  
4
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
The position of the filter in the left channel and that in the  
right channel is always the same (stereo).  
The position of the boost part and the cut part is  
independently controllable (Tables 2 and 3).  
FUNCTIONAL DESCRIPTION  
The TEA6360 is performed with two stereo channels  
(RIGHT and LEFT), each one consists of five equal filter  
amplifiers (Fig.1).  
The quality factor of the filter has its maximum in the  
maximum position (steps 5), if boost (cut on step 0) or cut  
(boost on step 0) is used. The quality factor decreases also  
with the step number (variable quality factor).  
The centre frequencies for the different filters as well as  
the bandwidth and the control ranges for boost and cut  
depend on the external components. Each filter can have  
different external components but for one definite pair of  
filters the centre frequency as well as the control range for  
boost and cut are the same. That means, they have  
symmetrical curves for boost and cut.  
In this mode the control pattern are according to Table 4.  
A different control is necessary to achieve a constant  
quality factor over the whole control range. For boost with  
a constant quality factor over the boost range position +5  
is selected and boost control is then performed using cut.  
This control technique is applied to the cut range with  
position 5 selected and the boost is varied (Table 5).  
The control range (maximum value in dB) is divided into  
five steps and one extra step for the linear position.  
At maximum gain of 12 dB the typical step resolution is  
2.4 dB. The internal resistor chain of each filter amplifier is  
optimized for 12 dB maximum gain. Therefore the typical  
gain factors for 15 dB application are as follows:  
The cut part has to follow the boost part in each filter for  
economic reasons. So the signal is first amplified and then  
attenuated. This has to be taken into account for the  
internal level diagram in case of constant quality factor.  
This may result in a mode between constant Q and  
non-constant Q mode; for example for the position +2 it is  
not necessary to amplify by step +5 and then attenuate by  
3 step. The combination of step +4 and step 2 to reach  
position +2 is a good result (quasi constant quality factor,  
Table 6).  
step 1  
step 2  
step 3  
step 4  
step 5  
=
=
=
=
=
2.7  
5.5  
8.4  
dB  
dB  
dB  
11.6 dB  
15.0 dB  
The control of the different filters is obtained by selecting  
the appropriate subaddress byte (Table 1).  
LIMITING VALUES  
In accordance with the Absolute Maximum System (IEC 134).  
Ground pins 19, 28 and 43 connected together.  
SYMBOL  
PARAMETER  
MIN.  
MAX.  
13.2  
UNIT  
VP  
supply voltage (pin 14)  
0
V
V
Vn  
voltage on all pins, grounds excluded  
total power dissipation  
0
VP  
Ptot  
Tstg  
0
500  
150  
150  
85  
mW  
°C  
°C  
°C  
V
storage temperature range  
40  
40  
40  
storage temperature range  
Tamb  
VESD  
operating ambient temperature range  
electrostatic handling(1) for all pins  
±500  
Note  
1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor.  
May 1991  
5
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
CHARACTERISTICS  
VP = 8.5 V; fi = 1 kHz (RS = 600 ), RL = 10 k, Tamb = 25 °C and measurements taken in Fig.1, unless otherwise  
specified.  
SYMBOL  
PARAMETER  
supply voltage. range (pin 14)  
supply current (pin 14)  
CONDITIONS  
MIN.  
TYP.  
8.5  
MAX.  
13.2  
UNIT  
VP  
IP  
7
V
VP = 8.5 V  
VP = 12 V  
25.5  
26.0  
mA  
mA  
Analog part  
Ri  
input resistor (pins 1 and 32)  
1
MΩ  
V
V1,32  
input voltage range at any stage  
2.1 to  
VP 1  
1.0 to  
VP 1  
V13,20  
output voltage range at any stage  
V
Vo  
output signal level (RMS value, pins 13 control range 0 to +5,  
and 20)  
variable Q-factor or  
quasi constant Q-factor 1.1  
V
Ro  
RL  
output resistor (pins 13 and 20)  
admissable load resistance at outputs  
(pins 13 and 20)  
100  
2
kΩ  
CL  
admissable load capacitance at outputs  
(pins 13 and 20)  
2.5  
0
nF  
dB  
Gv  
B
total signal gain (G = Vo / Vi)  
frequency response  
all filters linear  
0.5  
all filters linear, roll off  
frequency for 1 dB  
(DC-coupled)  
minimum value  
maximum value  
0
Hz  
20  
kHz  
αCr  
crosstalk attenuation between channels f = 250 to 10000 Hz  
all filters linear  
60  
55  
55  
75  
dB  
dB  
dB  
all filters maximum boost  
all filters maximum cut  
THD  
distortion (pins 13 and 20)  
f = 20 to 12500 Hz  
VP = 8.5 to 12 V  
all fIlters linear  
Vo (rms) = 1.1 V  
0.2  
0.05  
0.5  
0.1  
0.2  
0.5  
0.2  
1.0  
0.3  
0.5  
%
%
%
%
%
Vo (rms) = 0.1 V  
Vo (rms) = 1.1 V  
Vo (rms) = 0.1 V  
Vo (rms) = 0.1 V  
Vo (rms) = 1 V  
all fIlters linear  
all fIlters max. boost  
all fIlters max. boost  
all fIlters maximum cut  
all fIlters max. boost  
f = 1 kHz  
0.35  
%
May 1991  
6
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
SYMBOL  
PARAMETER  
CONDITIONS  
CCIR 468-3, maximum  
gain/filter of 12 dB  
MIN.  
TYP.  
MAX.  
UNIT  
VN  
weighted output noise voltage  
(RMS value)  
defeat mode  
8
16  
µV  
all filters linear  
23  
70  
23  
46  
µV  
µV  
µV  
all filters maximum boost  
all filters maximum cut  
crosstalk between bus inputs and signal  
outputs, 20 log (Vbus(p-p)/Vo rms)  
ripple rejection at Vripple rms < 200 mV  
for f = 100 Hz  
140  
46  
αCr  
all filters linear  
all filters linear  
120  
dB  
RR  
70  
60  
dB  
dB  
for f = 40 to 12500 Hz  
Internal filters of analog part  
Q
Q-factor dependent on maximum gain  
maximum gain 10 dB  
0.1  
0.1  
0.1  
29.6  
1.2  
1.4  
1.8  
44.4  
± 4  
maximum gain 12 dB  
maximum gain 15 dB  
Rtot  
total resistor of different filter sections  
tolerance between any filter section  
37.0  
kΩ  
Rtot  
%
Internal controls of analog part via I2C-bus  
Step  
number of steps for boost or for cut  
position for linear  
5
1
step resolution  
maximum gain 12 dB  
2.4  
0.5  
dB  
dB  
step set error  
Vo  
DC offset between any step or  
neighbouring step or defeat  
±10  
mV  
I2C-bus control SDA and SCL (pins 15 and 16)  
VIH  
VlL  
II  
input level HIGH  
3
0
VP  
V
input level LOW  
1.5  
±10  
0.4  
V
input current  
µA  
V
VACK  
acknowledge voltage on SDA  
l15 = 3 mA at LOW  
Module address bit (pin 18)  
VIH  
VIL  
II  
input level HIGH for address 1000 0110  
3
0
Vp  
V
input level LOW for address 1000 0100  
input current  
1.5  
±10  
V
µA  
Power on reset: When reset is active the DEF-bit (defeat) is set and the I2C-bus receiver is in reset position.  
RESET  
start of reset  
increasing VP  
decreasing VP  
increasing VP  
2.5  
5.8  
6.8  
V
V
V
4.2  
5.2  
5.0  
6.0  
end of reset  
May 1991  
7
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
Fig.3 Frequency response for maximum boost of +12 dB according to Fig.1.  
For maximum cut the curves are symmetrical to negative gain values.  
Fig.4 Application for car radio (Vp < 8.5 V).  
8
May 1991  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
I2C-BUS PROTOCOL  
I2C-bus format  
S
SLAVE ADDRESS  
A
SUBADDRESS  
A
DATA  
P
S
=
start condition  
SLAVE ADDRESS  
=
1000 0100 when pin 18 is set LOW  
or 1000 0110 when pin 18 is set HIGH or open-circuit  
acknowledge, generated by the slave  
subadress byte, see Table 1  
data byte, see Table 1  
A
=
=
=
=
SUBADDRESS  
DATA  
P
stop condition  
If more than 1 byte DATA are transmitted, then auto-increment of the subaddress is performed.  
Byte organisation  
Table 1 I2C-bus transmission  
DATA BYTE  
FUNCTION  
SUBADDRESS BYTE  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
filter 1/defeat  
0
0
0
0
0
0
0
0
DEF  
1B2  
1B1  
1B0  
0
1C2  
1C1  
1C0  
filter 2  
filter 3  
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
2B2  
3B2  
2B1  
3B1  
2B0  
3B0  
0
0
2C2  
3C2  
2C1  
3C1  
2C0  
3C0  
filter 4  
filter 5  
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
4B2  
5B2  
4B1  
5B1  
4B0  
5B0  
0
0
4C2  
5C2  
4C1  
5C1  
4C0  
5C0  
Function of the bits of Table 1:  
1B0 to 1B2 boost control for filter 1  
1B0 to 1B2 cut control for filter 1  
2B0 to 2B2 boost control for filter 2  
2B0 to 2B2 cut control for filter 2  
3B0 to 3B2 boost control for filter 3  
3B0 to 3B2 cut control for filter 3  
4B0 to 4B2 boost control for filter 4  
4B0 to 4B2 cut control for filter 4  
5B0 to 5B2 boost control for filter 5  
5B0 to 5B2 cut control for filter 5  
DEF  
DEF = 0 (defeat bit):  
DEF = 1:  
All filters operating.  
Linear frequency response, input is directly connected to the output of the  
output amplifier. The filter settings are stored but the internal amplification  
is controlled to 0 dB, independent on bits nB2 to nB0.  
May 1991  
9
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
Table 2 Boost control for filter n  
Table 3 Cut control for filter n  
DATA  
DATA  
POSITION  
nB2  
nB1  
nB0  
POSITION  
nB2  
nB1  
nB0  
step 0  
(no boost)  
0
0
0
step 0  
(no cut)  
0
0
0
step 1  
step 2  
step 3  
step 4  
0
0
0
1
0
1
1
0
1
0
1
0
step 1  
step 2  
step 3  
step 4  
0
0
0
1
0
1
1
0
1
0
1
0
step 5  
step 5  
step 5  
(maximum boost)  
(maximum boost)  
(maximum boost)  
1
1
1
0
1
1
1
0
1
step 5  
step 5  
step 5  
(maximum cut)  
(maximum cut)  
(maximum cut)  
1
1
1
0
1
1
1
0
1
Table 4 Filter control with variable quality factor  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
POSITION  
COMMENT  
X
0
0
0
0
0
nB2  
1
nB1  
0
nB0  
1
X
0
0
0
0
0
nC2  
0
nC1  
0
nC0  
0
+5  
+4  
+3  
+2  
+1  
(maximum boost)  
(+5)  
(+4)  
(+3)  
(+2)  
(+1)  
+
+
+
+
+
(0)  
(0)  
(0)  
(0)  
(0)  
=
=
=
=
=
+5  
+4  
+3  
+2  
+1  
1
0
0
0
0
0
0
1
1
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
(linear)  
0
0
0
0
0
0
0
0
(+0)  
+
(0)  
=
0
1  
2  
3  
4  
5  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
1
0
1
0
1
(+0)  
(+0)  
(+0)  
(+0)  
(+0)  
+
+
+
+
+
(1)  
(2)  
(3)  
(4)  
(5)  
=
=
=
=
=
1  
2  
3  
4  
5  
(maximum cut)  
May 1991  
10  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
Table 5 Filter control with constant quality factor  
D7  
X
D6  
D5  
D4  
D3  
X
D2  
D1  
D0  
POSITION  
COMMENT  
nB2 nB1 nB0  
nC2 nC1 nC0  
+5  
+4  
+3  
+2  
+1  
(maximum boost)  
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
0
0
1
1
0
0
1
0
1
0
(+5)  
(+5)  
(+5)  
(+5)  
(+5)  
+
+
+
+
+
(0)  
(1)  
(2)  
(3)  
(4)  
=
=
=
=
=
+5  
+4  
+3  
+2  
+1  
0
(linear)  
0
0
0
0
0
0
0
0
(+0)  
+
(0)  
=
0
1  
2  
3  
4  
5  
0
0
0
0
0
1
0
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
(+4)  
(+3)  
(+2)  
(+1)  
(+0)  
+
+
+
+
+
(5)  
(5)  
(5)  
(5)  
(5)  
=
=
=
=
=
-1  
-2  
3  
4  
5  
(maximum cut)  
Table 6 Filter control with quasi-constant quality factor  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
POSITION  
COMMENT  
X
0
0
0
0
0
nB2 nB1 nB0  
X
0
0
0
0
0
nC2 nC1 nC0  
+5  
+4  
+3  
+2  
+1  
(maximum boost)  
1
1
1
1
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
1
1
1
0
1
0
0
0
(+5)  
(+5)  
(+5)  
(+4)  
(+3)  
+
+
+
+
+
(0)  
(1)  
(2)  
(2)  
(2)  
=
=
=
=
=
+5  
+4  
+3  
+2  
+1  
0
(linear)  
0
0
0
0
0
0
0
0
(+0)  
+
(0)  
=
0
1  
2  
3  
4  
5  
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
0
1
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
0
1
1
1
(+2)  
(+2)  
(+2)  
(+1)  
(+0)  
+
+
+
+
+
(3)  
(4)  
(5)  
(5)  
(5)  
=
=
=
=
=
1  
2  
3  
4  
5  
(maximum cut)  
May 1991  
11  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
PACKAGE OUTLINES  
SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)  
SOT232-1  
D
M
E
A
2
A
A
L
1
c
(e )  
w M  
e
Z
1
b
1
M
H
b
32  
17  
pin 1 index  
E
1
16  
0
5
10 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
(1)  
A
max.  
A
A
2
max.  
(1)  
(1)  
Z
1
w
UNIT  
b
b
c
D
E
e
e
L
M
M
H
1
1
E
min.  
max.  
1.3  
0.8  
0.53  
0.40  
0.32  
0.23  
29.4  
28.5  
9.1  
8.7  
3.2  
2.8  
10.7  
10.2  
12.2  
10.5  
mm  
4.7  
0.51  
3.8  
1.778  
10.16  
0.18  
1.6  
Note  
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-02-04  
SOT232-1  
May 1991  
12  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
SO32: plastic small outline package; 32 leads; body width 7.5 mm  
SOT287-1  
D
E
A
X
c
y
H
v
M
A
E
Z
17  
32  
Q
A
2
A
(A )  
3
A
1
pin 1 index  
θ
L
p
L
16  
1
w M  
detail X  
b
p
e
0
5
10 mm  
scale  
DIMENSIONS (inch dimensions are derived from the original mm dimensions)  
A
(1)  
(1)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
E
L
L
Q
v
w
y
Z
θ
p
p
1
2
3
max.  
0.3  
0.1  
2.45  
2.25  
0.49  
0.36  
0.27 20.7  
0.18 20.3  
7.6  
7.4  
10.65  
10.00  
1.1  
0.4  
1.2  
1.0  
0.95  
0.55  
mm  
2.65  
0.25  
0.01  
1.27  
0.050  
1.4  
0.25  
0.01  
0.25  
0.01  
0.1  
8o  
0o  
0.012 0.096  
0.004 0.086  
0.02 0.011 0.81  
0.01 0.007 0.80  
0.30  
0.29  
0.42  
0.39  
0.043 0.047  
0.016 0.039  
0.037  
0.022  
inches 0.10  
0.004  
0.055  
Note  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
EIAJ  
92-11-17  
95-01-25  
SOT287-1  
May 1991  
13  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
method. Typical reflow temperatures range from  
215 to 250 °C.  
SOLDERING  
Introduction  
Preheating is necessary to dry the paste and evaporate  
the binding agent. Preheating duration: 45 minutes at  
45 °C.  
There is no soldering method that is ideal for all IC  
packages. Wave soldering is often preferred when  
through-hole and surface mounted components are mixed  
on one printed-circuit board. However, wave soldering is  
not always suitable for surface mounted ICs, or for  
printed-circuits with high population densities. In these  
situations reflow soldering is often used.  
WAVE SOLDERING  
Wave soldering techniques can be used for all SO  
packages if the following conditions are observed:  
A double-wave (a turbulent wave with high upward  
pressure followed by a smooth laminar wave) soldering  
technique should be used.  
This text gives a very brief insight to a complex technology.  
A more in-depth account of soldering ICs can be found in  
our “IC Package Databook” (order code 9398 652 90011).  
The longitudinal axis of the package footprint must be  
SDIP  
parallel to the solder flow.  
The package footprint must incorporate solder thieves at  
the downstream end.  
SOLDERING BY DIPPING OR BY WAVE  
The maximum permissible temperature of the solder is  
260 °C; solder at this temperature must not be in contact  
with the joint for more than 5 seconds. The total contact  
time of successive solder waves must not exceed  
5 seconds.  
During placement and before soldering, the package must  
be fixed with a droplet of adhesive. The adhesive can be  
applied by screen printing, pin transfer or syringe  
dispensing. The package can be soldered after the  
adhesive is cured.  
The device may be mounted up to the seating plane, but  
the temperature of the plastic body must not exceed the  
specified maximum storage temperature (Tstg max). If the  
printed-circuit board has been pre-heated, forced cooling  
may be necessary immediately after soldering to keep the  
temperature within the permissible limit.  
Maximum permissible solder temperature is 260 °C, and  
maximum duration of package immersion in solder is  
10 seconds, if cooled to less than 150 °C within  
6 seconds. Typical dwell time is 4 seconds at 250 °C.  
A mildly-activated flux will eliminate the need for removal  
of corrosive residues in most applications.  
REPAIRING SOLDERED JOINTS  
REPAIRING SOLDERED JOINTS  
Apply a low voltage soldering iron (less than 24 V) to the  
lead(s) of the package, below the seating plane or not  
more than 2 mm above it. If the temperature of the  
soldering iron bit is less than 300 °C it may remain in  
contact for up to 10 seconds. If the bit temperature is  
between 300 and 400 °C, contact may be up to 5 seconds.  
Fix the component by first soldering two diagonally-  
opposite end leads. Use only a low voltage soldering iron  
(less than 24 V) applied to the flat part of the lead. Contact  
time must be limited to 10 seconds at up to 300 °C. When  
using a dedicated tool, all other leads can be soldered in  
one operation within 2 to 5 seconds between  
270 and 320 °C.  
SO  
REFLOW SOLDERING  
Reflow soldering techniques are suitable for all SO  
packages.  
Reflow soldering requires solder paste (a suspension of  
fine solder particles, flux and binding agent) to be applied  
to the printed-circuit board by screen printing, stencilling or  
pressure-syringe dispensing before package placement.  
Several techniques exist for reflowing; for example,  
thermal conduction by heated belt. Dwell times vary  
between 50 and 300 seconds depending on heating  
May 1991  
14  
Philips Semiconductors  
Preliminary specification  
5-band stereo equalizer circuit  
TEA6360  
DEFINITIONS  
Data sheet status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
PURCHASE OF PHILIPS I2C COMPONENTS  
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the  
components in the I2C system provided the system conforms to the I2C specification defined by  
Philips. This specification can be ordered using the code 9398 393 40011.  
May 1991  
15  
Go to Philips Semiconductors' home page  
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The 5-band stereo equalizer is an I2C-bus controlled tone processor for application in car radio sets, TV sets and music centres. It offers  
the possibility of sound control as well as equalization of sound pressure behaviour of different rooms or loudspeakers, especially in cars.  
PC/PC-peripherals  
Cross reference  
Features  
Models  
Packages  
l Monolithic integrated 5-band stereo equalizer circuit  
l Five filters for each channel  
l Centre frequency, bandwidth and maximum boost/cut defined by external components  
l Choise for variable or constant Q-factor via I2C software  
l Defeat mode  
Application notes  
Selection guides  
Other technical documentation  
End of Life information  
Datahandbook system  
l All stages are DC-coupled  
l I2C-bus control for all functions  
Relevant Links  
l Two different modul addresses programmable.  
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size  
(kB)  
TEA6360  
TEA6360  
Publication  
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Page  
count  
Type nr. Title  
Datasheet  
Download  
TEA6360 5-band stereo equalizer circuit  
01-May-91  
Preliminary  
Specification  
15  
139  
Products, packages, availability and ordering  
Partnumber North American Partnumber Order code (12nc) marking/packing  
package device status  
buy online  
TEA6360/V2 TEA6360N  
9350 507 00112 Standard Marking * Tube SOT232 Samples available  
Please read information about some discontinued variants of this product.  
Find similar products:  
TEA6360 links to the similar products page containing an overview of products that are similar in function or related to the part  
number(s) as listed on this page. The similar products page includes products from the same catalog tree(s) , relevant selection guides and  
products from the same functional category.  
Copyright © 2000  
Royal Philips Electronics  
All rights reserved.  
Terms and conditions.  
Philips Semiconductors: Product information on TEA6360, 5-band stereo equalizer circuit  
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Semiconductors' home  
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Information as of 2001-06-06  
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TEA6360; 5-band stereo equalizer circuit  
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to  
To be kept informed on TEA6360,  
subscribe to eNews.  
Features  
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Products, packages, availability and ordering  
Parametrics  
Find similar products  
Application notes  
Selection guides  
-
order this  
Other technical documentation  
End of Life information  
Description  
Go  
Relevant Links  
The 5-band stereo equalizer is an I2C-bus controlled tone processor for application in car radio sets, TV sets and music centres. It offers  
the possibility of sound control as well as equalization of sound pressure behaviour of different rooms or loudspeakers, especially in cars.  
About catalog tree  
-
-
-
-
-
-
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Features  
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Monolithic integrated 5-band stereo equalizer circuit  
Five filters for each channel  
Search  
Produ
TEA6360  
-
Centre frequency, bandwidth and maximum boost/cut defined by external components  
Choise for variable or constant Q-factor via I2C software  
Defeat mode  
Down
TEA6360  
-
All stages are DC-coupled  
I2C-bus control for all functions  
Two different modul addresses programmable.  
Datasheet  
Go  
Publication  
release date  
Page  
count  
File size  
(kB)  
Type nr. Title  
Datasheet status  
Datasheet  
Download  
TEA6360 5-band stereo equalizer circuit  
01-May-91  
Preliminary  
Specification  
15  
109  
Down  
file:///J|/imaging/BITTING/mail_pdf/cpl_images/v2_TEA6360.html (1 of 2) [7/20/2001 5:18:13 PM]  
 
Philips Semiconductors: Product information on TEA6360, 5-band stereo equalizer circuit  
Products, packages, availability and ordering  
Go  
North American  
Partnumber  
marking/packing  
Down
IC packing info  
Partnumber  
Order code (12nc)  
package  
device status  
buy online  
SOT232-1  
(SDIP32)  
TEA6360/V2 TEA6360N  
TEA6360T/V2 TEA6360TD  
TEA6360TD-T  
9350 507 00112 Standard Marking * Tube  
Samples available  
Samples available  
Samples available  
-
order this  
SOT287-1  
(SO32)  
Standard Marking * Tube  
9350 534 80512  
-
-
order this  
order this  
Dry Pack  
SOT287-1  
(SO32)  
Standard Marking * Reel  
9350 534 80518  
Dry Pack, SMD, 13"  
Products in the above table are all in production. Some variants are discontinued; click here for information on these variants.  
Parametrics  
Go  
Maximum Maximum  
Dolby  
noise  
No.  
of  
Supply  
voltage  
(V)typ.  
audio  
input  
level  
audio  
output  
level  
S/N  
ratio  
Defeat 5-band Switchable  
I²C-bus Channel  
interface separation(dB)  
Typenumber Package THD  
SOT232-1  
FUNCTION  
equalizer  
reduction stereo switch equalizer Q-factor  
compatible inputs  
rms(V)  
rms(V)  
TEA6360/V2  
0.2 93  
yes  
7 to 13 yes  
75  
2.1  
1.1  
(SDIP32)  
SOT287-1  
(SO32)  
TEA6360T/V2  
yes  
1
yes  
yes  
yes  
Find similar products:  
TEA6360 links to the similar products page containing an overview of products that are similar in function or related to the part  
Go  
Produ  
number(s) as listed on this page. The similar products page includes products from the same catalog tree(s) , relevant selection guides  
and products from the same functional category.  
Copyright © 2001  
Royal Philips Electronics  
All rights reserved.  
Terms and conditions.  
file:///J|/imaging/BITTING/mail_pdf/cpl_images/v2_TEA6360.html (2 of 2) [7/20/2001 5:18:13 PM]  

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