935167230118 [NXP]
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INTEGRATED CIRCUITS
74LVT652
3.3V Octal transceiver/register,
non-inverting (3-State)
Product specification
1998 Feb 19
Supersedes data of 1994 May 20
IC23 Data Handbook
Philips
Semiconductors
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
FEATURES
DESCRIPTION
The LVT652 is a high-performance BiCMOS product designed for
• Independent registers for A and B buses
• Multiplexed real-time and stored data
• 3-State outputs
V
CC
operation at 3.3V.
This device combines low static and dynamic power dissipation with
high speed and high output drive.
• Output capability: +64mA/–32mA
• TTL input and output switching levels
• Input and output interface capability to systems at 5V supply
The 74LVT652 transceiver/register consists of bus transceiver
circuits with 3-State outputs, D–type flip-flops, and control circuitry
arranged for multiplexed transmission of data directly from the input
bus or the internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes High. Output
Enable (OEAB, OEBA) and Select (SAB, SBA) pins are provided for
bus management.
• Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
• Live insertion/extraction permitted
• No bus current loading when output is tied to 5V bus
• Power-up 3-State
• Power-up reset
• Latch–up protection exceeds 500mA per JEDEC Std 17
• ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
CONDITIONS
= 25°C; GND = 0V
SYMBOL
PARAMETER
TYPICAL
UNIT
T
amb
t
t
Propagation delay
C = 50pF;
2.8
2.6
PLH
PHL
L
ns
An to Bn or Bn to An
Input capacitance
I/O capacitance
V
CC
= 3.3V
C
V = 0V or 3V
I
4
pF
pF
IN
C
Outputs disabled; V = 0V or 3V
10
I/O
I/O
I
Total supply current
Outputs disabled; V = 3.6V
0.13
mA
CCZ
CC
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE OUTSIDE NORTH AMERICA
NORTH AMERICA
74LVT652 D
DWG NUMBER
SOT137-1
24-Pin Plastic SOL
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
74LVT652 D
74LVT652 DB
74LVT652 PW
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
74LVT652 DB
SOT340-1
74LVT652PW DH
SOT355-1
PIN CONFIGURATION
PIN DESCRIPTION
PIN NUMBER
SYMBOL
FUNCTION
1
2
24
23
22
21
20
19
18
17
16
15
14
13
V
CPAB
SAB
OEAB
A0
CC
CPAB /
CPBA
A to B clock input / B to A
clock input
CPBA
SBA
OEBA
B0
1, 23
3
A to B select input / B to A
select input
2, 22
3, 21
SAB / SBA
4
5
A1
A to B Output Enable input
(active-High) /
B to A Output Enable input
(active-Low)
6
A2
B1
OEAB /
OEBA
7
A3
B2
8
A4
B3
4, 5, 6, 7, 8, 9,
10, 11
9
A5
B4
A0 – A7
Data inputs/outputs (A side)
Data inputs/outputs (B side)
10
11
12
A6
B5
20, 19, 18, 17,
16, 15, 14, 13
A7
B6
B0 – B7
GND
GND
B7
12
24
Ground (0V)
SV00051
V
CC
Positive supply voltage
2
1998 Feb 19
853-1748 18987
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
21
3
EN1(BA)
EN2(AB)
C4
4
5
6
7
8
9
10 11
23
22
1
G5
C6
A0 A1 A2 A3 A4 A5 A6 A7
CPBA
2
G7
23
22
2
SBA
OEAB
OEBA
3
20
≥1
5
4D
4
SAB
21
1
5 1
1
CPAB
6D
7
≥1
B0 B1 B2 B3 B4 B5 B6 B7
20 19 18 17 16 15 14 13
1 7
2
19
18
17
16
15
14
13
5
6
SV00052
7
8
9
10
11
SV00053
LOGIC DIAGRAM
21
OEBA
OEAB
CPBA
3
23
22
1
SBA
CPAB
SAB
2
Detail A;
1 of 8 Channels
1D
C1
Q
4
20
A0
B0
1D
C1
Q
5
6
7
8
9
19
A1
A2
A3
B1
B2
18
17
16
15
14
13
B3
B4
B5
B6
B7
A4
DETAIL A X 7
A5
A6 10
11
A7
SV00054
3
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74LVT652.
The select pins determine whether data is stored or transferred
through the device in real time.
The output enable pins determine the direction of the data flow.
REAL TIME BUS TRANSFER
BUS B TO BUS A
REAL TIME BUS TRANSFER
BUS A TO BUS B
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED DATA
TO A OR B
A
A
B
A
B
B
B
A
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
OEAB OEBA CPAB CPBA SAB SBA
L
L
X
X
X
L
H
H
X
X
L
X
X
L
L
H
X
H
↑
X
↑
X
↑
X
X
X
X
X
X
H
L
H | L H | L
H
H
↑
SV00055
FUNCTION TABLE
INPUTS
DATA I/O
OPERATING MODE
OEAB
OEBA
CPAB
CPBA
SAB
SBA
An
Bn
Input
L
L
H
H
H or L
↑
H or L
↑
X
X
X
X
Isolation
Input
Store A and B data
X
H
H
H
↑
↑
H or L
↑
X
**
X
X
Unspecified**
Output*
Store A, Hold B
Store A in both registers
Input
L
L
X
L
H or L
↑
↑
↑
X
X
X
**
Unspecified**
Output*
Hold A, Store B
Store B in both registers
Input
Input
L
L
L
L
X
X
X
X
X
L
H
Real time B data to A bus
Stored B data to A bus
Output
Input
H or L
H
H
H
H
X
X
X
L
H
X
X
Real time A data to B bus
Store A data to B bus
Output
Output
H or L
Stored A data to B bus
Stored B data to A bus
H
L
H or L
H or L
H
H
Output
H
L
X
↑
=
=
=
=
High voltage level
Low voltage level
Don’t care
Low-to-High clock transition
*
The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always
enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be
staggered in order to load both registers.
**
4
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
1,2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
CONDITIONS
RATING
–0.5 to +4.6
–50
UNIT
V
V
CC
I
IK
DC supply voltage
DC input diode current
V < 0
I
mA
V
3
V
I
DC input voltage
–0.5 to +7.0
–50
I
DC output diode current
V
O
< 0
mA
V
OK
3
V
OUT
DC output voltage
Output in Off
–0.5 to +7.0
128
Output in Low state
Output in High state
I
DC output current
mA
OUT
–64
T
stg
Storage temperature range
–65 to +150
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
PARAMETER
UNIT
MIN
2.7
0
MAX
3.6
V
CC
DC supply voltage
Input voltage
V
V
V
I
5.5
V
High-level input voltage
Input voltage
2.0
V
IH
V
0.8
–32
32
V
IL
I
High-level output current
Low-level output current
mA
mA
OH
I
OL
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
64
∆t/∆v
10
ns/V
T
amb
–40
+85
°C
5
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
Input clamp voltage
TEST CONDITIONS
Temp = -40°C to +85°C
UNIT
V
1
MIN
TYP
MAX
V
IK
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2.7V; I = –18mA
–0.9
–1.2
IK
= 2.7 to 3.6V; I = –100µA
V
-0.2
V
CC
-0.1
OH
CC
V
OH
High-level output voltage
= 2.7V; I = –8mA
2.4
2.5
V
OH
= 3.0V; I = –32mA
2.0
2.2
0.1
OH
= 2.7V; I = 100µA
0.2
0.5
OL
= 2.7V; I = 24mA
0.3
OL
V
OL
Low-level output voltage
= 3.0V; I = 16mA
0.25
0.3
0.4
V
OL
= 3.0V; I = 32mA
0.5
OL
= 3.0V; I = 64mA
0.4
0.55
0.55
OL
5
V
RST
Power-up output low voltage
= 3.6V; I = 1mA; V = GND or V
CC
0.13
V
O
I
V
V
V
= 3.6V; V = V or GND
±0.1
1.0
±1
10
20
CC
CC
CC
I
CC
Control pins
I/O Data pins
= 0 or 3.6V; V = 5.5V
I
I
Input leakage current
= 3.6V; V = 5.5V
1.0
µA
I
I
4
V
CC
V
CC
V
CC
= 3.6V; V = V
CC
0.1
–1
1
1
-5
I
= 3.6V; V = 0
I
I
Output off current
= 0V; V or V = 0 to 4.5V
±100
µA
µA
OFF
I
O
V
CC
V
CC
V
CC
= 3V; V = 0.8V
75
150
I
6
= 3V; V = 2.0V
–75
–150
I
Bus Hold current A inputs
I
HOLD
= 0V to 3.6V; V = 3.6V
±500
CC
Current into an output in the
I
V
= 5.5V; V = 3.0V
60
15
125
µA
µA
EX
O
CC
High state when V > V
O
CC
Power up/down 3-State output
V
CC
≤ 1.2V; V = 0.5V to V ; V = GND or V
;
CC
O
CC
I
I
±100
PU/PD
3
current
OE/OE = Don’t care
I
I
V
V
V
V
= 3.6V; Outputs High, V = GND or V I 0
CC, O =
0.13
3
0.19
12
CCH
CC
CC
CC
CC
I
I
Quiescent supply current
= 3.6V; Outputs Low, V = GND or V I 0
CC, O =
mA
mA
CCL
I
= 3.6V; Outputs Disabled; V = GND or V
I 0
CC, O =
0.13
0.19
CCZ
I
Additional supply current per
= 3V to 3.6V; One input at V -0.6V,
CC
∆I
0.1
0.2
CC
2
input pin
Other inputs at V or GND
CC
NOTES:
1. All typical values are at V = 3.3V and T
= 25°C.
amb
CC
2. This is the increase in supply current for each input at the specified voltage level other than V or GND
CC
3. This parameter is valid for any V between 0V and 1.2V with a transition time of up to 10msec. From V = 1.2V to V = 3.3V ± 0.3V a
CC
CC
CC
transition time of 100µsec is permitted. This parameter is valid for T
= 25°C only.
amb
4. Unused pins at V or GND.
CC
5. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
6. This is the bus hold overdrive current required to force the input to the opposite logic state.
6
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
AC CHARACTERISTICS
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω; T
= –40°C to +85°C.
R
F
L
L
amb
LIMITS
= 3.3V ± 0.3V
SYMBOL
PARAMETER
WAVEFORM
V
CC
V
CC
= 2.7V
UNIT
1
MIN
TYP
MAX
MAX
f
Maximum clock frequency
1
1
150
180
MHz
ns
MAX
t
t
Propagation delay
CPAB to Bn or CPBA to An
1.8
2.0
3.7
3.7
6.0
5.7
6.9
6.4
PLH
PHL
t
t
Propagation delay
An to Bn or Bn to An
1.2
1.0
2.8
2.6
4.7
4.6
5.5
5.3
PLH
PHL
2
3
ns
ns
ns
ns
ns
ns
t
t
Propagation delay
SAB to Bn or SBA to An
1.4
1.4
3.7
4.0
6.4
6.2
7.6
6.8
PLH
PHL
t
t
t
t
Output enable time
OEBA to An
5
6
1.0
1.0
2.9
3.0
5.8
6.0
7.2
7.3
PZH
t
PZL
Output disable time
OEBA to An
5
6
2.2
1.8
3.9
3.2
6.5
5.8
6.9
5.9
PHZ
t
PLZ
Output enable time
OEAB to Bn
5
6
1.0
1.2
3.3
3.4
6.5
6.3
7.5
7.1
PZH
t
PZL
Output disable time
OEAB to Bn
5
6
1.7
1.5
4.5
3.8
7.2
5.8
8.1
6.3
PHZ
t
PLZ
NOTE:
1. All typical values are at V = 3.3V and T
= 25°C.
CC
amb
AC SETUP REQUIREMENTS
GND = 0V, t = 2.5ns, t = 2.5ns, C = 50pF, R = 500Ω, T =40 °C to 85 °C
R
F
L
L
amb
LIMITS
Max
T
= -40 to
+85 C
= +5.0V ±0.5V
amb
o
T
V
= +25 C
= +5.0V
amb
CC
o
SYMBOL
PARAMETER
WAVEFORM
UNIT
V
CC
Min
Typ
Min
Max
1
t (H)
t (L)
s
Setup time
1.5
2.2
0.9
1.1
1.6
2.5
s
4
4
1
ns
ns
ns
An to CPAB, Bn to CPBA
1
t (H)
Hold time
0
0
–1.0
–1.0
0.0
0.0
h
t (L)
h
An to CPAB, Bn to CPBA
t (H)
Pulse width, High or Low
CPAB or CPBA
3.3
3.3
1.0
2.0
3.3
3.3
w
t (L)
w
NOTE:
1. This data sheet limit may vary among suppliers.
7
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
AC WAVEFORMS
V
M
= 1.5V, V = GND to 2.7V
IN
2.7V
An
or
1/f
MAX
V
V
V
V
M
M
M
M
2.7V
0V
Bn
0V
CPBA or
CPAB
1.5V
1.5V
1.5V
PLH
t (H)
t (L)
s
t
(H)
t (L)
h
s
h
2.7V
CPBA
or
CPAB
t
(H)
t (L)
w
w
t
t
V
V
M
PHL
M
V
V
t
(L)
OH
OL
w
0V
1.5V
1.5V
An or Bn
NOTE: The shaded areas indicate when the input is permitted
to change for predictable output performance.
SV00128
SV00056
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 4. Data Setup and Hold Times
2.7V
0V
OEBA
OEAB
2.7V
V
t
V
M
M
SBA or SAB
An or Bn
V
V
M
M
t
0V
t
PZH
PHZ
V
t
OH
PLH
PHL
V
V
OH
OL
V
–0.3V
OH
An or Bn
V
Bn or An
M
V
V
M
M
0V
SV00129
SV00126
Waveform 5. 3-State Output Enable Time to High Level and
Output Disable Time from High Level
Waveform 2. Propagation Delay, An to Bn or Bn to An,
SAB to Bn or SBA to An
2.7V
OEBA
2.7V
V
V
M
M
t
SBA or SAB
OEAB
0V
V
V
M
M
t
t
0V
PZL
PLZ
3V
+0.3V
t
PHL
PLH
V
V
OH
OL
V
V
M
OL
An or Bn
An or Bn
V
V
M
M
V
OL
SV00130
SV00127
Waveform 6. 3-State Output Enable Time to Low Level and
Output Disable Time from Low Level
Waveform 3. Propagation Delay, SBA to An or SAB to Bn
8
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
TEST CIRCUIT AND WAVEFORM
6.0V
V
CC
t
W
AMP (V)
90%
Open
GND
90%
NEGATIVE
PULSE
V
V
M
V
V
OUT
M
10%
R
R
IN
L
10%
90%
PULSE
GENERATOR
D.U.T.
0V
t
t
(t
(t
)
t
t
(t
)
R
THL
F
TLH
R
T
C
L
L
)
(t
)
F
TLH
R
THL
AMP (V)
90%
M
Test Circuit for 3-State Outputs
POSITIVE
PULSE
V
V
M
10%
10%
t
W
0V
SWITCH POSITION
V
= 1.5V
M
TEST
SWITCH
Open
6V
Input Pulse Definition
t
/t
PLH PHL
t
/t
PLZ PZL
t
/t
GND
PHZ PZH
INPUT PULSE REQUIREMENTS
DEFINITIONS
FAMILY
R = Load resistor; see AC CHARACTERISTICS for value.
L
Amplitude
Rep. Rate
t
t
R
t
F
W
C = Load capacitance includes jig and probe capacitance;
L
see AC CHARACTERISTICS for value.
74LVT
2.7V
v10MHz
500ns v2.5ns v2.5ns
R = Termination resistance should be equal to Z
T
of
OUT
pulse generators.
SV00092
9
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
10
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
11
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
12
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
NOTES
13
1998 Feb 19
Philips Semiconductors
Product specification
3.3V Octal transceiver/register, non-inverting
(3-State)
74LVT652
Data sheet status
[1]
Data sheet
status
Product
status
Definition
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Righttomakechanges—PhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Sunnyvale, California 94088–3409
Telephone 800-234-7381
print code
Date of release: 05-96
9397-750-03545
Document order number:
Philips
Semiconductors
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