935244050112 [NXP]

IC ABT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20, 0.300 INCH, PLASTIC, SOT-146-1, DIP-20, FF/Latch;
935244050112
型号: 935244050112
厂家: NXP    NXP
描述:

IC ABT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP20, 0.300 INCH, PLASTIC, SOT-146-1, DIP-20, FF/Latch

信息通信管理 光电二极管 输出元件 逻辑集成电路 触发器
文件: 总16页 (文件大小:142K)
中文:  中文翻译
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INTEGRATED CIRCUITS  
74ABT377A  
Octal D-type flip-flop with enable  
Product specification  
1997 Feb 26  
Replaces data sheet 74ABT377 of 1995 Sep 06  
IC23 Data Handbook  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
FEATURES  
DESCRIPTION  
The 74ABT377A high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
Ideal for addressable register applications  
8-bit positive edge-triggered register  
Enable for address and data synchronization applications  
Output capability: +64mA/-32mA  
The 74ABT377A has 8 edge-triggered D-type flip-flops with  
individual D inputs and Q outputs. The common buffered clock (CP)  
input loads all flip-flops simultaneously when the Enable (E) input is  
Low.  
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17  
The register is fully edge triggered. The state of each D input, one  
set-up time before the Low-to-High clock transition, is transferred to  
the corresponding flip-flop’s Q output.  
ESD protection exceeds 2000V per MIL STD 883 Method 3015  
and 200V per Machine Model  
Power-up reset  
The E input must be stable one setup time prior to the Low-to-High  
clock transition for predictable operation.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
CP to Qn  
3.1  
3.6  
PLH  
PHL  
C = 50pF; V = 5V  
ns  
L
CC  
C
Input capacitance  
Total current supply  
V = 0V or V  
CC  
4
pF  
nA  
IN  
I
I
Outputs High; V = 5.5V  
500  
CCH  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT377A N  
DWG NUMBER  
SOT146-1  
20-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT377A N  
74ABT377A D  
74ABT377A DB  
74ABT377A PW  
20-Pin plastic SO  
74ABT377A D  
SOT163-1  
20-Pin Plastic SSOP Type II  
20-Pin Plastic TSSOP Type I  
74ABT377A DB  
74ABT377PWA DH  
SOT339-1  
SOT360-1  
PIN CONFIGURATION  
LOGIC SYMBOL  
E
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
1
2
3
4
5
20  
19  
18  
17  
16  
V
CC  
3
4
7
8
13 14 17 18  
Q7  
D7  
D6  
Q6  
Q5  
D5  
D4  
Q4  
D0 D1 D2 D3 D4 D5 D6 D7  
CP  
11  
1
6
7
8
9
15  
14  
13  
12  
OE  
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7  
2
5
6
9
12 15 16 19  
GND 10  
11 CP  
SA00155  
SA00152  
2
1997 Feb 26  
853-1457 17800  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
LOGIC SYMBOL (IEEE/IEC)  
PIN DESCRIPTION  
PIN NUMBER  
SYMBOL  
FUNCTION  
Enable input (active–Low)  
Data inputs  
1
E
1
G1  
3, 4, 7, 8, 13, 14,  
17, 18  
D0-D7  
11  
IC2  
2, 5, 6, 9, 12, 15,  
16, 19  
Q0-Q7  
CP  
Data outputs  
3
4
2
5
2D  
11  
Clock Pulse input (active  
rising edge)  
7
10  
20  
GND  
Ground (0V)  
6
V
CC  
Positive supply voltage  
8
9
13  
14  
17  
18  
12  
15  
16  
19  
SA00157  
LOGIC DIAGRAM  
D0  
3
D1  
D2  
D3  
8
D4  
13  
D5  
14  
D6  
17  
D7  
18  
4
7
1
E
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP  
CP  
CP  
CP  
CP  
CP  
CP  
CP  
11  
CP  
2
5
6
9
12  
Q4  
15  
Q5  
16  
Q6  
19  
Q7  
Q0  
Q1  
Q2  
Q3  
SA00158  
3
1997 Feb 26  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
FUNCTION TABLE  
INPUTS  
OUTPUTS  
Qn  
OPERATING MODE  
E
CP  
Dn  
l
l
h
l
H
L
Load “1”  
Load “0”  
h
H
X
X
X
no change  
no change  
Hold (do nothing)  
H
h
L
l
X
=
=
=
=
=
=
High voltage level  
High voltage level one set-up time prior to the Low-to-High clock transition  
Low voltage level  
Low voltage level one set-up time prior to the Low-to-High clock transition  
Don’t care  
Low-to-High clock transition  
1, 2  
ABSOLUTE MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
DC supply voltage  
CONDITIONS  
RATING  
–0.5 to +7.0  
–18  
UNIT  
V
V
CC  
I
IK  
DC input diode current  
V < 0  
I
mA  
V
3
V
I
DC input voltage  
–1.2 to +7.0  
–50  
I
DC output diode current  
V
O
< 0  
mA  
V
OK  
3
V
DC output voltage  
output in Off or High state  
output in Low state  
–0.5 to +5.5  
128  
OUT  
OUT  
I
DC output current  
mA  
°C  
T
stg  
Storage temperature range  
–65 to 150  
NOTES:  
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the  
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to  
absolute-maximum-rated conditions for extended periods may affect device reliability.  
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction  
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.  
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
RECOMMENDED OPERATING CONDITIONS  
SYMBOL  
PARAMETER  
LIMITS  
UNIT  
MIN  
4.5  
0
MAX  
V
DC supply voltage  
5.5  
V
V
CC  
V
Input voltage  
V
CC  
I
V
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Input transition rise or fall rate  
2.0  
V
IH  
V
0.8  
–32  
64  
V
IL  
I
mA  
mA  
ns/V  
°C  
OH  
I
OL  
t/v  
0
5
T
amb  
Operating free-air temperature range  
–40  
+85  
4
1997 Feb 26  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
DC ELECTRICAL CHARACTERISTICS  
LIMITS  
T
= –40°C  
to +85°C  
amb  
SYMBOL  
PARAMETER  
TEST CONDITIONS  
T
amb  
= +25°C  
UNIT  
MIN  
TYP  
MAX  
MIN  
MAX  
V
Input clamp voltage  
V
= 4.5V; I = –18mA  
–0.9  
2.9  
–1.2  
–1.2  
V
V
V
V
V
IK  
CC  
IK  
V
V
= 4.5V; I = –3mA; V = V or V  
2.5  
3.0  
2.0  
2.5  
3.0  
2.0  
CC  
OH  
I
IL  
IH  
IH  
V
OH  
High–level output voltage  
= 5.0V; I = –3mA; V = V or V  
3.4  
CC  
OH  
I
IL  
V
CC  
= 4.5V; I = –32mA; V = V or V  
IH  
2.4  
OH  
I
IL  
V
OL  
Low-level output voltage  
Power-up output low  
V
= 4.5V; I = 64mA; V = V or V  
IH  
0.42  
0.55  
0.55  
0.55  
0.55  
CC  
OL  
I
IL  
V
RST  
V
CC  
= 5.5V; I = 1mA; V = GND or V  
CC  
0.13  
V
O
I
3
voltage  
I
Input leakage current  
V
= 5.5V; V = GND or 5.5V  
±0.01  
±5.0  
5.0  
±1.0  
±100  
50  
±1.0  
±100  
50  
µA  
µA  
µA  
mA  
I
CC  
I
I
Power-off leakage current  
Output High leakage current  
V
= 0.0V; V or V 4.5V  
CC O I  
OFF  
CEX  
I
V
= 5.5V; V = 5.5V; V = GND or V  
CC O I CC  
1
I
O
Output current  
V
CC  
= 5.5V; V = 2.5V  
–50  
–100  
–180  
–50  
–180  
O
I
Quiescent supply current  
V
= 5.5V; Outputs High, V = GND or V  
0.5  
24  
250  
30  
250  
30  
µA  
CCH  
CC  
I
CC  
I
V
= 5.5V; Outputs Low, V = GND or V  
mA  
CCL  
CC  
I
CC  
Additional supply current per  
input pin  
V
CC  
= 5.5V; one input at 3.4V,  
other inputs at V or GND  
CC  
I  
CC  
0.5  
1.5  
1.5  
mA  
2
NOTES:  
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.  
2. This is the increase in supply current for each input at 3.4V.  
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.  
AC CHARACTERISTICS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
1
LIMITS  
T
= -40 to  
+85 C  
= +5.0V +0.5V  
amb  
o
T
V
= +25 C  
amb  
CC  
o
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
V
CC  
MIN  
TYP  
MAX  
MIN  
MAX  
f
Maximum clock frequency  
1
1
150  
250  
150  
MHz  
ns  
MAX  
t
t
Propagation delay  
CP to Qn  
1.8  
2.2  
3.1  
3.6  
4.0  
4.7  
1.8  
2.2  
4.8  
4.9  
PLH  
PHL  
NOTE:  
1. Limits may vary among suppliers.  
5
1997 Feb 26  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
AC SETUP REQUIREMENTS  
GND = 0V, t = t = 2.5ns, C = 50pF, R = 500Ω  
R
F
L
L
LIMITS  
o
o
T
V
= +25 C  
T
V
= -40 to +85 C  
amb  
CC  
amb  
CC  
SYMBOL  
PARAMETER  
WAVEFORM  
UNIT  
= +5.0V  
= +5.0V +0.5V  
MIN  
TYP  
MIN  
t (H)  
t (L)  
s
Setup time, High or Low  
Dn to CP  
1.5  
1.5  
0.7  
0.5  
1.5  
1.5  
s
2
2
2
2
1
ns  
ns  
ns  
ns  
ns  
t (H)  
Hold time, High or Low  
Dn to CP  
1.0  
1.0  
–0.4  
–0.6  
1.0  
1.0  
h
t (L)  
h
t (H)  
Setup time, High or Low  
E to CP  
2.0  
2.0  
1.1  
1.0  
2.0  
2.0  
s
t (L)  
s
t (H)  
Hold time, High or Low  
E to CP  
1.0  
1.0  
–0.9  
–0.1  
1.0  
1.0  
h
t (L)  
h
t (H)  
Clock Pulse width  
High or Low  
1.5  
2.0  
0.7  
1.0  
1.5  
2.0  
w
t (L)  
w
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
V
V
t
D
M
M
n
1/f  
MAX  
h
t
s
CP  
V
V
M
M
t
(H)  
t
(L)  
W
W
E
V
V
V
V
M
M
M
M
t
t
PLH  
PHL  
t
(H)  
h
t
(L)  
h
V
Q
n
V
M
M
t (H)  
s
t (L)  
s
CP  
V
V
M
M
SA00159  
Waveform 1. Propagation Delay, Clock Input to Output, Clock  
Pulse Width and Maximum Clock Frequency  
NOTE: The shaded areas indicate when the input is permitted to change for predict-  
able output performance.  
SA00160  
Waveform 2. Data and Enable Setup and Hold Times  
6
1997 Feb 26  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
TEST CIRCUIT AND WAVEFORM  
t
W
V
AMP (V)  
90%  
CC  
90%  
7.0V  
NEGATIVE  
PULSE  
V
V
M
M
10%  
10%  
90%  
R
L
0V  
(t  
V
V
OUT  
IN  
PULSE  
GENERATOR  
D.U.T.  
t
t
(t  
(t  
)
t
t
)
THL  
F
TLH  
R
)
(t )  
F
R
R
L
C
TLH  
R
THL  
T
L
AMP (V)  
90%  
M
POSITIVE  
PULSE  
V
V
M
Test Circuit for 3-State Outputs  
10%  
10%  
t
W
0V  
SWITCH POSITION  
V
M
= 1.5V  
TEST  
SWITCH  
Input Pulse Definition  
All  
open  
INPUT PULSE REQUIREMENTS  
DEFINITIONS  
R = Load resistor; see AC CHARACTERISTICS for value.  
L
FAMILY  
Amplitude  
3.0V  
Rep. Rate  
1MHz  
t
t
t
F
W
R
C = Load capacitance includes jig and probe capacitance;  
L
see AC CHARACTERISTICS for value.  
500ns 2.5ns  
2.5ns  
74ABT  
R = Termination resistance should be equal to Z  
T
of  
OUT  
pulse generators.  
SA00057  
7
1997 Feb 26  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377A  
DEFINITIONS  
Data Sheet Identification  
Product Status  
Definition  
This data sheet contains the design target or goal specifications for product development. Specifications  
may change in any manner without notice.  
Objective Specification  
Formative or in Design  
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to make changes at any time without notice in order to improve design  
and supply the best possible product.  
Preliminary Specification  
Product Specification  
Preproduction Product  
Full Production  
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes  
at any time without notice, in order to improve design and supply the best possible product.  
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,  
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips  
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,  
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask  
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes  
only. PhilipsSemiconductorsmakesnorepresentationorwarrantythatsuchapplicationswillbesuitableforthespecifiedusewithoutfurthertesting  
or modification.  
LIFE SUPPORT APPLICATIONS  
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,  
orsystemswheremalfunctionofaPhilipsSemiconductorsandPhilipsElectronicsNorthAmericaCorporationProductcanreasonablybeexpected  
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips  
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully  
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 1997  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Philips  
Semiconductors  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377  
DIP20: plastic dual in-line package; 20 leads (300 mil)  
SOT146-1  
9
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377  
SO20: plastic small outline package; 20 leads; body width 7.5 mm  
SOT163-1  
10  
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377  
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm  
SOT339-1  
11  
1995 Sep 06  
Philips Semiconductors  
Product specification  
Octal D-type flip-flop with enable  
74ABT377  
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm  
SOT360-1  
12  
1995 Sep 06  
it Q  
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74ABT377A; Octal  
D-type flip-flop with  
enable  
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General description  
The 74ABT377A high-performance BiCMOS device combines low static and dynamic power dissipation with high  
speed and high output drive.  
Catalog by  
System  
Cross-reference  
Packages  
The 74ABT377A has 8 edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common  
buffered clock (CP) input loads all flip-flops simultaneously when the Enable (E) input is Low.  
End of Life  
information  
Distributors Go  
Here!  
The register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock  
transition, is transferred to the corresponding flip-flop’s Q output.  
The E input must be stable one setup time prior to the Low-to-High clock transition for predictable operation.  
Models  
SoC solutions  
to
Features  
Ideal for addressable register applications  
8-bit positive edge-triggered register  
Enable for address and data synchronization applications  
Output capability: +64mA/-32mA  
Latch-up protection exceeds 500mA per Jedec JC40.2 Std 17  
ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model  
Power-up reset  
to
Applications  
AN203_2: Test Fixtures for High Speed Logic (date 02-Apr-98)  
Down  
AN2301: Simulation Support for Philips' Advanced BiCMOS Products  
Down  
 
to
Datasheet  
Type number Title  
Publication release  
date  
Datasheet status  
Page count File size Datasheet  
(kB)  
74ABT377A Octal D-type 2/26/1997  
Product specification 12  
65  
Download  
Down  
flip-flop with  
enable  
to
Blockdiagram(s)  
Block diagram of  
74ABT377AD  
to
Parametrics  
Type number Package  
Description Propagation Voltage No. Power  
Delay(ns) of Dissipation  
Pins Considerations Levels  
Logic  
Switching Drive  
Output  
Capability  
Octal D-  
Type Flip-  
Flop with  
Data Enable; 4~6  
Positive-  
SOT163  
74ABT377AD  
(SO20)  
5 Volts  
+
20 None  
20 None  
20 None  
20 None  
TTL  
TTL  
TTL  
TTL  
High  
Edge  
Trigger  
Octal D-  
Type Flip-  
Flop with  
Data Enable; 4~6  
Positive-  
Edge  
SOT163  
74ABT377ADB  
(SO20)  
5 Volts  
+
High  
High  
High  
Trigger  
Octal D-  
Type Flip-  
Flop with  
Data Enable; 4~6  
Positive-  
Edge  
SOT146-1  
74ABT377AN  
5 Volts  
+
(DIP20)  
Trigger  
Octal D-  
Type Flip-  
Flop with  
Data Enable; 4~6  
Positive-  
Edge  
SOT360-1  
74ABT377APW  
5 Volts  
+
(TSSOP20)  
Trigger  
to
Products, packages, availability and ordering  
Type number  
North American Ordering code Marking/Packing Package Device  
Buy online  
IC packing info  
type number  
(12NC)  
status  
Down  
SOT163  
(SO20)  
Standard Marking  
* Tube  
Full production  
74ABT377AD 74ABT377AD 9352 440 20112  
-
-
-
-
order this  
order this  
order this  
order this  
Standard Marking  
9352 440 20118 * Reel Pack,  
SOT163  
(SO20)  
74ABT377AD-  
T
Full production  
Full production  
Full production  
SMD, 13"  
SOT163  
(SO20)  
Standard Marking  
* Tube  
74ABT377ADB 74ABT377ADB 9352 440 30112  
Standard Marking  
9352 440 30118 * Reel Pack,  
SOT163  
(SO20)  
74ABT377ADB-  
T
SMD, 13"  
SOT146-1  
(DIP20)  
Standard Marking  
* Tube  
Full production  
Full production  
74ABT377AN 74ABT377AN 9352 440 50112  
-
-
order this  
order this  
SOT360-1  
Standard Marking  
* Tube  
74ABT377APW 74ABT377APW 9352 440 40112  
74ABT377APW-  
(TSSOP20)  
Standard Marking  
SMD, 13"  
SOT360-1  
Full production  
9352 440 40118 * Reel Pack,  
(TSSOP20)  
-
order this  
T
Products in the above table are all in production. Some variants are discontinued; click here for information on these  
variants.  
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74ABT377A links to the similar products page containing an overview of products that are similar in function  
Produ  
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Support & tools  
ABT family characteristics, Family specifications(date 01-Mar-98)  
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Introduction to Advanced BiCMOS Logic Products(date 01-Mar-98)  
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