935250380112 [NXP]
IC SPECIALTY CONSUMER CIRCUIT, PDSO28, PLASTIC, SOT-341, SSOP-28, Consumer IC:Other;
| 型号： | 935250380112 |
| 厂家： | 
NXP |
| 描述： | IC SPECIALTY CONSUMER CIRCUIT, PDSO28, PLASTIC, SOT-341, SSOP-28, Consumer IC:Other 光电二极管 |
| 文件： | 总35页 (文件大小：262K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
TDA6404; TDA6405; TDA6405A
5 V mixer/oscillator-PLL
synthesizers for hyperband tuners
1999 Jan 13
Product specification
Supersedes data of 1998 Jan 19
File under Integrated Circuits, IC02
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers
for hyperband tuners
TDA6404; TDA6405;
TDA6405A
FEATURES
• Single chip 5 V mixer/oscillator-PLL synthesizer for
hyperband tuners
• I2C-bus protocol
• 3 PNP band switch buffers (25 mA)
• 33 V tuning voltage output
• In-lock detector
The PLL synthesizer consists of a divide-by-eight
prescaler, a 15-bit programmable divider, a 4 MHz crystal
oscillator and its programmable reference divider and a
phase comparator combined with a charge pump which
drives the tuning amplifier, including 33 V output.
• 5-level Analog-to-Digital Converter (ADC)
• 15-bit programmable divider
• Programmable reference divider ratio
(512, 640 or 1024)
Depending on the reference divider ratio (512, 640
or 1024), the phase comparator operates at 7.8125 kHz,
6.25 kHz or 3.90625 kHz.
• Programmable charge pump current
• Balanced mixer with a common emitter input for VHF
(single input)
The devices are controlled according to the I2C-bus
format. The in-lock detector bit FL is set to logic 1 when the
loop is locked and is read on the SDA line (status byte)
during a read operation. The ADC input is available for
digital Automatic Frequency Control (AFC). The ADC code
is read during a read operation on the I2C-bus
• Balanced mixer with a common base input for UHF
(double input)
• 4-pin common emitter oscillator for VHF
• 4-pin common emitter oscillator for UHF
(see Table 9). In test mode, pin ADC is used as a test
output for fREF and 1⁄2fDIV
.
• IF amplifier with a low output impedance to drive a SAW
filter directly (≈2 kΩ load)
When the charge pump current switch mode is activated
and the loop is phase-locked the charge pump current
value is automatically switched to LOW. This is to improve
carrier-to-noise ratio. The status of this feature can be read
in the ACPS flag during a read operation on the I2C-bus
(see Table 7).
• Low power, low radiation, small size
APPLICATIONS
• Hyperband tuners for Europe using a 2-band
mixer/oscillator in a switched concept.
Five serial bytes (including address byte) are required for
the I2C-bus format to address the devices, select the VCO
frequency, program the three PNP ports, set the charge
pump current and to set the reference divider ratio.
The devices have four independent I2C-bus addresses
which can be selected by applying a specific voltage on the
AS input (see Table 4).
GENERAL DESCRIPTION
The TDA6404, TDA6405 and TDA6405A are
programmable 2-band mixer/oscillator-PLL synthesizers
intended for VHF/UHF and hyperband tuners (see Fig.1).
The devices include two double balanced mixers and two
oscillators for the VHF and UHF band, an IF amplifier and
a PLL synthesizer. With proper oscillator application and
by using a switchable inductor to split the VHF band into
two sub-bands (the full VHF/UHF and hyperband) the TV
bands can be covered.
Two pins are available between the mixer output and the
IF amplifier input to enable IF filtering for improved signal
handling. Three PNP ports are provided for band
switching. Band selection is made according to the band
switch bits VHFL, VHFH and UHF.
1999 Jan 13
2
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
QUICK REFERENCE DATA
SYMBOL
VCC
PARAMETER
supply voltage
CONDITIONS
operating
MIN.
4.5
TYP.
MAX. UNIT
5
5.5
−
V
ICC
supply current
all PNP ports are ‘OFF’
−
78
4.0
−
mA
MHz
mA
°C
fXTAL
Io(PNP)
Tstg
crystal oscillator frequency
PNP port output current
IC storage temperature
operating ambient temperature
RF input frequency
RXTAL = 25 to 150 Ω
3.2
−
4.48
25
−40
−20
45.25
−
+150
+85
Tamb
f(i)RF
−
°C
VHF band
UHF band
VHF band
UHF band
VHF band
UHF band
VHF band
UHF band
−
399.25 MHz
855.25 MHz
407.25 −
GV
F
voltage gain
noise figure
−
−
−
−
−
−
27
−
−
−
−
−
−
dB
38
dB
8
dB
8.5
119
118
dB
Vo
output voltage causing 1% cross
modulation in channel
dBµV
dBµV
ORDERING INFORMATION
TYPE
PACKAGE
NUMBER
NAME
DESCRIPTION
VERSION
TDA6404TS;
TDA6405TS;
TDA6405ATS
SSOP28
plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
1999 Jan 13
3
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
BLOCK DIAGRAM
V
IFFIL1 IFFIL2
5 (24) 6 (23)
CC
17 (12)
BSVHF
(4) 25
VHFOSCIB1
(3) 26
VHFOSCOC1
VHFOSCOC2
VHFOSCIB2
RF INPUT
VHF
VHF
MIXER
VHF
OSCILLATOR
3 (26)
(2) 27
(1) 28
VHFIN
4 (25)
BSVHF
RFGND
(11) 18
(10) 19
IFOUT1
IFOUT2
IF
ELECTRONIC
BAND SWITCH
BS
AMPLIFIER
BSUHF
BSUHF
(5) 24
(6) 23
(7) 22
(8) 21
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
1 (28)
RF INPUT
UHF
UHF
MIXER
UHF
OSCILLATOR
UHFIN1
2 (27)
UHFIN2
(15) 14
(14) 15
CP
VT
f
REF
XTAL
OSCILLATOR
4 MHz
REFERENCE
DIVIDER
512, 640, 1024
DIGITAL
PHASE
COMPARATOR
16 (13)
XTAL
TUNING
AMPLIFIER
CHARGE
PUMP
f
RSB
RSA
DIV
T2, T1, T0 CHP
15-BIT
PROGRAMMABLE
DIVIDER
OS
LOGIC
PRESCALER
DIVIDE BY 8
IN-LOCK
DETECTOR
TDA6404
TDA6405
TDA6405A
1/2f
FL
DIV
15-BIT
FREQUENCY
REGISTER
POWER-ON
RESET
7-BIT CONTROL
REGISTER
FL
CHP T2 T1 T0 RSA RSB OS
12 (17)
SCL
SCL
SDA
AS
3-BIT BAND SWITCH
REGISTER
2
11 (18)
I C-BUS
SDA
TRANSCEIVER
10 (19)
AS
VHFL
VHFH
UHF
(9) 20
f
1/2f
DIV
FL
REF
GND
5-LEVEL A/D
CONVERTER
GATE
V
CC
BS
T2, T1, T0
13 (16)
ADC
7 (22)
PVHFL
8 (21)
PVHFH
9 (20)
PUHF
MGK813
The pin numbers in parenthesis represent the TDA6405 and TDA6405A.
Fig.1 Block diagram.
4
1999 Jan 13
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
PINNING
PIN
SYMBOL
TDA6405;
DESCRIPTION
TDA6404
TDA6405A
UHFIN1
UHFIN2
VHFIN
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
UHF input 1
UHF input 2
VHF input
2
3
RFGND
IFFIL1
4
RF ground
5
IF filter output 1
IF filter output 2
IFFIL2
6
PVHFL
7
PNP port output for VHF low band
PVHFH
PUHF
8
PNP port output for VHF high band
PNP port output for UHF band
address selection input
serial data input/output (I2C-bus)
serial clock input (I2C-bus)
Analog-to-Digital Converter input/output
charge pump output
9
AS
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
SDA
SCL
ADC
CP
VT
tuning output
XTAL
crystal oscillator input
VCC
supply voltage
IFOUT1
IFOUT2
GND
IF amplifier output 1
IF amplifier output 2
ground
UHFOSCIB1
UHFOSCOC1
UHFOSCOC2
UHFOSCIB2
VHFOSCIB1
VHFOSCOC1
VHFOSCOC2
VHFOSCIB2
8
UHF oscillator base input 1
UHF oscillator collector output 1
UHF oscillator collector output 2
UHF oscillator base input 2
VHF oscillator base input 1
VHF oscillator collector output 1
VHF oscillator collector output 2
VHF oscillator base input 2
7
6
5
4
3
2
1
1999 Jan 13
5
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
handbook, halfpage
handbook, halfpage
UHFIN1
UHFIN2
VHFIN
RFGND
IFFIL1
IFFIL2
PVHFL
PVHFH
PUHF
AS
VHFOSCIB2
VHFOSCOC2
VHFOSCOC1
VHFOSCIB1
UHFOSCIB2
VHFOSCIB2
VHFOSCOC2
VHFOSCOC1
VHFOSCIB1
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
GND
1
2
UHFIN1
28
1
2
28
27
26
25
24
UHFIN2
VHFIN
RFGND
IFFIL1
27
26
25
24
3
3
4
4
5
5
23 UHFOSCOC2
UHFOSCOC1
6
23 IFFIL2
22 PVHFL
21 PVHFH
20 PUHF
6
22
21 UHFOSCIB1
7
7
TDA6405
TDA6405A
TDA6404
8
8
GND
9
9
20
19
18
17
16
IFOUT2
IFOUT1
IFOUT2
AS
10
11
10
11
12
13
19
18
17
16
SDA
IFOUT1
SDA
SCL
ADC
SCL 12
ADC
V
V
CC
CC
XTAL
XTAL
13
CP 14
15 VT
VT 14
15 CP
MGK830
MGK831
Fig.2 Pin configuration for TDA6404.
Fig.3 Pin configuration for TDA6405(A)
The first bit of the data byte transmitted indicates whether
frequency data (first bit = 0) or control and band switch
data (first bit = 1) will follow. Until an I2C-bus STOP
condition is sent by the controller, additional data bytes
can be entered without the need to re-address the devices.
The frequency register is loaded after the 8th clock pulse
of the second divider byte (DB2). The control register is
loaded after the 8th clock pulse of the CB. The band switch
register is loaded after the 8th clock pulse of the band
switch byte (BB).
FUNCTIONAL DESCRIPTION
The devices are controlled via the I2C-bus.
For programming, there is one module address (7 bits)
and the R/W bit for selecting the read or write mode.
Write mode
Data bytes can be sent to the devices after the address
transmission (first byte) by setting the R/W bit to logic 0.
Four data bytes are needed to fully program the devices.
The I2C-bus transceiver has an auto-increment facility
which permits the programming of the devices within one
single transmission (address + 4 data bytes).
The devices can also be partially programmed, providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Tables 1 and 2.
1999 Jan 13
6
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Table 1 I2C-bus mode, write data format for the TDA6404 and TDA6405
BITS
NAME
BYTE
ACK
LSB
MSB
Address byte
Divider byte 1
Divider byte 2
Control byte
ADB
DB1
DB2
CB
1
0
1
N14
N6
0
N13
N5
T2
X
0
N12
N4
T1
X
0
N11
N3
T0
X
MA1
N10
N2
MA0
N9
R/W = 0
N8
A
A
A
A
A
N7
1
N1
N0
CHP
X
RSA
UHF
RSB
VHFH
OS
Band-switch byte
BB
X
VHFL
Table 2 I2C-bus mode, write data format for the TDA6405A
BITS
NAME
BYTE
ACK
MSB
LSB
Address byte
Divider byte 1
Divider byte 2
Control byte
ADB
DB1
DB2
CB
1
0
1
N14
N6
0
N13
N5
T2
X
0
N12
N4
T1
X
0
MA1
N10
N2
MA0
N9
R/W = 0
N8
A
A
A
A
A
N11
N3
T0
N7
1
N1
N0
CHP
X
RSA
X
RSB
VHFH
OS
Band-switch byte
BB
X
UHF
VHFL
I2C-bus address selection
The module address contains programmable address bits (MA1 and MA0) which offer the possibility of having several
synthesizers (up to 4) in one system by applying a specific voltage on the AS input. The relationship between MA1 and
MA0 and the input voltage applied to the AS input is given in Table 4.
Table 3 Description of symbols used in Tables 1 and 2
SYMBOL
DESCRIPTION
A
acknowledge
MA1 and MA0
N14 to N0
CHP
programmable address bits (see Table 4)
programmable divider bits; N = N14 × 214 + N13 × 213 + ... + N1 × 21 + N0
charge pump current bit:
CHP = 0; ICP = 60 µA
CHP = 1; ICP = 280 µA (default)
T2, T1 and T0
RSA and RSB
OS
test bits (see Table 5)
reference divider ratio select bits (see Table 6)
tuning amplifier control bit:
OS = 0; normal operation; tuning voltage is ‘ON’
OS = 1; tuning voltage is ‘OFF’ (high-impedance)
PNP ports control bits:
UHF, VHFH and VHFL
bit = 0; buffer n is ‘OFF’ (default)
bit = 1; buffer n is ‘ON’
X
don’t care bit: may be a logic 0 or a logic 1
1999 Jan 13
7
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Table 4 Address selection I2C-bus
MA1
MA0
VOLTAGE APPLIED ON AS INPUT
0
0
1
1
0
1
0
1
0 to 0.1VCC
open or 0.2VCC to 0.3VCC
0.4VCC to 0.6VCC
0.9VCC to 1.0VCC
Table 5 Test mode
T2
T1
T0
TEST MODES
0
0
0
1
1
1
1
0
0
1
1
1
0
0
0
1
X
0
1
0
1
automatic charge pump off
automatic charge pump on; note 1
charge pump is ‘OFF’
charge pump is sinking current
charge pump is sourcing current
f
REF is available on pin ADC; note 2
1⁄2fDIV is available on pin ADC; note 2
Notes
1. This is the default mode at Power-on reset.
2. The ADC input cannot be used when these test modes are active.
Table 6 Reference divider ratio select bits
RSA
RSB
REFERENCE DIVIDER RATIO
FREQUENCY STEP (kHz)
X
0
1
0
1
1
640
1024
512
6.25
3.90625
7.8125
The ACPS flag is LOW when the automatic charge pump
switch mode is ‘ON’ and the loop is locked. In other
conditions, ACPS = 1. When ACPS = 0, the charge pump
current is forced to the LOW value.
Read mode
Data can be read from the devices by setting the R/W bit
to logic 1 (see Tables 7 and 8). After the slave address
has been recognized, the devices generate an
A built-in ADC is available on ADC pin. This converter can
be used to apply AFC information to the controller from the
IF section of the television. The relationship between the
bits A2, A1 and A0 is given in Table 9.
acknowledge pulse and the first data byte (status byte) is
transferred on the SDA line (MSB first). Data is valid on the
SDA line during a HIGH-level of the SCL clock signal.
A second data byte can be read from the devices if the
processor generates an acknowledge on the SDA line
(master acknowledge). End of transmission will occur if no
master acknowledge occurs. The devices will then release
the data line to allow the processor to generate a STOP
condition. The POR flag is set to logic 1 at power-on.
The flag is reset when an end-of-data is detected by the
devices (end of a read sequence). Control of the loop is
made possible with the in-lock flag FL which indicates
when the loop is locked (FL = 1).
1999 Jan 13
8
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Table 7 Read data format
BITS
NAME
BYTE
ACK
LSB
MSB(1)
Address byte
Status byte
ADB
SB
1
1
0
0
1
0
1
MA1
A2
MA0
A1
R/W = 1
A0
A
POR
FL
ACPS
−
Note
1. MSB is transmitted first.
Table 8 Description of symbols used in Table 7
SYMBOL
DESCRIPTION
A
acknowledge
POR
FL
Power-on reset flag (POR = 1 at power-on)
in-lock flag (FL = 1 when the loop is locked)
automatic charge pump switch flag:
ACPS = 0; active
ACPS
ACPS = 1; not active
A2, A1 and A0
digital outputs of the 5-level ADC (see Table 9)
Table 9 Analog-to-digital converter levels; note 1
A2
A1
A0
VOLTAGE APPLIED ON ADC INPUT
0.60VCC to 1.00VCC
1
0
0
0
0
0
1
1
0
0
0
1
0
1
0
0.45VCC to 0.60VCC
0.30VCC to 0.45VCC
0.15VCC to 0.30VCC
0 to 0.15VCC
Note
1. Accuracy is ±0.03VCC
.
PUHF is ‘OFF’, which means that the UHF oscillator and
the UHF mixer are switched off. Consequently, the VHF
oscillator and the VHF mixer are switched on. PVHFL and
PVHFH are ‘OFF’, which means that the VHF tank circuit
is working in the VHF I sub-band. The tuning amplifier is
switched off until the first transmission. In that case, the
tank circuit in VHF I is supplied with the maximum tuning
voltage. The oscillator is therefore working at the end of
the VHF I sub-band.
Power-on reset
The power-on detection threshold voltage VPOR is set to
VCC = 2 V at room temperature. Below this threshold, the
device is reset to the power-on state.
At power-on state, the charge pump current is set to
280 µA, the tuning voltage output is disabled, the test
bits T2, T1 and T0 are set to logic 001 (automatic charge
pump switch ‘ON’) and RSB is set to logic 1.
1999 Jan 13
9
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Table 10 Default bits at Power-on reset
BITS
NAME
BYTE
MSB
LSB
Address byte
Divider byte 1
Divider byte 2
Control byte
ADB
DB1
DB2
CB
1
0
X
1
X
1
X
X
1
0
X
X
0
0
X
X
0
0
X
X
1
0
MA1
X
MA0
X
X
X
X
0
X
X
X
1
Band-switch byte
BB
X
X
X
0
0
0
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134) (note 1).
SYMBOL
PARAMETER
MIN. MAX. UNIT
VCC
VO(n)
IO(n)
supply voltage
−0.3
−0.3
−1
+6
V
output voltage on pins PVHFL, PVHFH and PUHF
output current on pins PVHFL, PVHFH and PUHF
charge pump output voltage
+6
V
+30
+6
mA
V
VO(CP
)
−0.3
−0.3
−0.3
−0.3
−0.3
−1
VO(VT)
VI/O(ADC)
VI(SCL)
VI/O(SDA)
IO(SDA)
VI(AS)
tuning output voltage
+35
+6
V
ADC input/output voltage
V
serial clock input voltage
+6
V
serial data input/output voltage
data output current
+6
V
+10
+6
mA
V
address selection input voltage
crystal oscillator input voltage
−0.3
−0.3
VI(XTAL)
IO(n)
+6
V
output current of each pin to ground:
for TDA6404, pins 1 to 6 and 17 to 28
for TDA6405 and TDA6405A, pins 1 to 12 and 23 to 28
−
−10
−10
10
mA
mA
s
−
tsc(max)
Tstg
maximum short-circuit time (all pins to VCC and all pins to GND, RFGND)
IC storage temperature
−
−40
−20
−
+150 °C
Tamb
Tj
operating ambient temperature
+85
150
°C
°C
junction temperature
Note
1. Maximum ratings can not be exceeded, not even momentarily without causing irreversible IC damage.
Maximum ratings can not be accumulated.
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
in free air
TYPICAL
UNIT
Rth(j-a)
thermal resistance from junction to ambient
85
K/W
1999 Jan 13
10
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply (Tamb = 25 °C)
VCC
ICC
supply voltage
supply current at VCC = 5 V all PNP ports are ‘OFF’
one PNP port is ‘ON’, sourcing 25 mA
4.5
5
5.5
V
−
−
78
86
mA
mA
110
121
PLL Synthesizer part (VCC = 4.5 to 5.5 V; Tamb = −20 to +85 °C; unless otherwise specified)
FUNCTIONAL RANGE
VPOR
Power-on reset voltage
below this supply voltage Power-on
reset becomes active; see Table 10
1.5
2.0
−
V
D/D
divider ratio
15-bit frequency word
256
3.2
−
32767
4.48
−
fXTAL
ZXTAL
crystal oscillator frequency RXTAL = 25 to 150 Ω
4
MHz
input impedance
fXTAL = 4 MHz
600
1200
Ω
PNP PORTS
IL(off)
leakage current
VCC = 5.5 V; VPNPn = 0
−10
−
−
µA
VO(sat)
output saturation voltage
one PNP port is ‘ON’, sourcing 25 mA;
−
0.25
0.4
V
VPNPn(sat) = VCC − VPNPn
ADC INPUT
VI
IIH
IIL
ADC input voltage
see Table 9
VADC = VCC
VADC = 0
0
−
−
−
VCC
10
−
V
HIGH-level input current
LOW-level input current
−
µA
µA
−10
ADDRESS SELECTION INPUT (AS)
VIL
VIH
IIH
LOW-level input voltage
HIGH-level input voltage
HIGH-level input current
LOW-level input current
0
−
−
−
−
1.5
5.5
10
−
V
3
V
VAS = 5.5 V
VAS = 0
−
µA
µA
IIL
−10
SCL AND SDA INPUTS
VIL
VIH
IIH
LOW-level input voltage
0
−
1.5
5.5
10
10
10
−
V
HIGH-level input voltage
HIGH-level input current
3.0
−
−
V
Vbus = 5.5 V; VCC = 0
−
µA
µA
µA
µA
kHz
V
bus = 5.5 V; VCC = 5.5 V
Vbus = 1.5 V; VCC = 0
bus = 0; VCC = 5.5 V
−
−
IIL
LOW-level input current
−
−
V
−10
−
−
fSCL
serial clock frequency
100
150
SDA OUTPUT
IL
leakage current
output voltage
VSDA = 5.5 V
−
−
−
−
10
µA
VO
ISDA = 3 mA (sink current)
0.4
V
1999 Jan 13
11
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
CHARGE PUMP OUTPUT (CP)
IIH
IIL
HIGH-level input current
CHP = 1
CHP = 0
−
−
−
280
−
µA
LOW-level input current
output voltage
60
−
µA
V
VO
IL(off)
PLL is locked; Tamb = 25 °C
1.95
−0.5
−
off-state leakage current
T2 = 0; T1 = 1
−15
+15
nA
TUNING VOLTAGE OUTPUT (VT)
IL(off)
VO
off-state leakage current
OS = 1; tuning supply = 33 V
−
−
−
10
µA
output voltage when the
loop is closed
OS = 0; T2 = 0; T1 = 0; T0 = 1;
RL = 27 kΩ; tuning supply = 33 V
0.2
32.7
V
Mixer/oscillator part (VCC = 5 V; Tamb = 25 °C; unless otherwise specified); measured in Fig.11
IF AMPLIFIER
S22
output reflection coefficient magnitude at 36.15 MHz; Zo = 50 Ω
phase at 36.15 MHz; Zo = 50 Ω
−
−
−
−
−12.5
1.41
81
−
−
−
−
dB
deg
Ω
Rs
Ls
real part of Zo = Rs + jωLs Rs at 36.15 MHz
imaginary part of
Ls at 36.15 MHz
9.5
nH
Zo = Rs + jωLs
VHF MIXER (INCLUDING IF AMPLIFIER)
fi(RF)
F
RF input frequency
noise figure
picture carrier frequency
45.25
−
399.25 MHz
f
RF = 50 MHz; see Figs 8 and 9
RF = 150 MHz; see Figs 8 and 9
−
7
9
dB
f
−
8
10
11
−
dB
fRF = 300 MHz;
−
9
dB
gos
optimum source
conductance for noise
figure
f
RF = 50 MHz
RF = 150 MHz
−
0.7
0.9
1.5
0.25
0.5
2
mS
mS
mS
mS
mS
pF
f
−
−
fRF = 300 MHz
−
−
gi
input conductance
input capacitance
fRF = 45.25 MHz
−
−
fRF = 399.25 MHz
−
−
Ci
fRF = 45.25 to 399.25 MHz
−
−
Vo
output voltage causing 1% fRF = 45.25 MHz; see Fig.6
116
116
119
119
−
dBµV
dBµV
cross modulation in
fRF = 399.25 MHz; see Fig.6
−
channel
Vi
input voltage causing
fRF = 399.25 MHz; note 1
−
88
−
dBµV
pulling in channel (750 Hz)
GV
voltage gain
fRF = 45.25 MHz; see Fig.4
24.5
24.5
27
27
29.5
29.5
dB
dB
fRF = 399.25 MHz; see Fig.4
VHF OSCILLATOR
fosc
oscillator frequency
84.15
−
438.15 MHz
∆fosc(V)
oscillator frequency shift
with supply voltage
∆VCC = 5%; worst case in the frequency
range; note 2
−
100
200
kHz
∆VCC = 10%; worst case in the
−
200
−
kHz
frequency range; note 2
1999 Jan 13
12
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
kHz
∆fosc(T)
oscillator frequency drift
with temperature
∆T = 25 °C with compensation; worst
case in the frequency range; note 3
−
−
−
1300
2000
∆fosc(t)
Φosc
oscillator frequency drift
with time
with compensation; worst case in the
frequency range; note 4
600
106
40
900
−
kHz
phase noise, carrier to
noise sideband
±100 kHz frequency offset; worst case
in the frequency range
dBc/Hz
mV
RSC(p-p)
ripple susceptibility of VCC VCC = 5 V; worst case in the frequency 15
−
(peak-to-peak value)
range; ripple frequency 500 kHz; note 5
UHF MIXER (INCLUDING IF AMPLIFIER)
fi(RF)
F
RF input frequency
noise figure
picture carrier frequency
407.25
−
855.25 MHz
f
RF = 407.25 MHz; not corrected for
image; see Fig.10
RF = 855.25 MHz; not corrected for
−
8
10
dB
f
−
9
11
dB
image; see Fig.10
fRF = 407.25 MHz
fRF = 855.25 MHz
fRF = 407.25 MHz
Rs
Ls
real part of Zi = Rs + jωLs
−
30
38
9
−
−
−
−
−
−
Ω
−
Ω
imaginary part of
Zi = Rs + jωLs
−
nH
fRF = 855.25 MHz
−
6
nH
Vo
output voltage causing 1% fRF = 407.25 MHz; see Fig.7
cross modulation in
116
114
119
117
dBµV
dBµV
f
RF = 855.25 MHz; see Fig.7
channel
Vi
input voltage causing
fRF = 855.25 MHz; note 1
−
78
−
dBµV
pulling in channel (750 Hz)
GV
voltage gain
fRF = 407.25 MHz; see Fig.5
35
35
38
38
41
41
dB
dB
fRF = 855.25 MHz; see Fig.5
UHF OSCILLATOR
fosc
oscillator frequency
446.15
−
894.15 MHz
∆fosc(V)
oscillator frequency shift
with supply voltage
∆VCC = 5%; worst case in the frequency
range; note 2
−
30
80
kHz
∆VCC = 10%; worst case in the
frequency range; note 2
−
−
−
−
80
−
kHz
∆fosc(T)
∆fosc(t)
Φosc
oscillator frequency drift
with temperature
∆T = 25 °C; with compensation; worst
case in the frequency range; note 3
600
200
106
20
1000
400
−
kHz
oscillator frequency drift
with time
with compensation; worst case in the
frequency range; note 4
kHz
phase noise, carrier to
noise sideband
±100 kHz frequency offset; worst case
in the frequency range
dBc/Hz
mV
RSC(p-p)
ripple susceptibility of VCC VCC = 5 V; worst case in the frequency 15
(peak-to-peak value) range; ripple frequency 500 kHz; note 5
−
1999 Jan 13
13
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
REJECTION AT THE IF AMPLIFIER OUTPUT
INTDIF
level of divider
interferences in the IF
signal
note 6
−
20
−
dBµV
INTRXTAL crystal oscillator
interferences rejection
note 7
note 8
60
50
−
−
−
−
dBc
dBc
INTRFREF reference frequency
rejection
INTCHX
INTS02
channel x beat
S02 beat
note 9
60
66
−
−
−
−
dBc
dBc
note 10
Notes
1. This is the level of the RF signal (100% amplitude modulated with 11.89 kHz) that causes a 750 Hz frequency
deviation on the oscillator signal; it produces sidebands 30 dB below the level of the oscillator signal.
2. The frequency shift is defined as the change of the oscillator frequency when the supply voltage varies from
VCC = 5 to 4.75 V (4.5 V) or from VCC = 5 to 5.25 V (5.5 V). The oscillator is free-running during this measurement.
3. The frequency drift is defined as the change of the oscillator frequency when the ambient temperature varies from
Tamb = 25 to 0 °C or from Tamb = 25 to 50 °C. The oscillator is free-running during this measurement.
4. The switching on drift is defined as the change of the oscillator frequency between 5 seconds and 15 minutes after
switching on. The oscillator is free-running during this measurement.
5. The ripple susceptibility is measured for a 500 kHz ripple at the IF amplifier output using the measurement circuit;
the level of the ripple signal is increased until a difference of 53.5 dB between the IF carrier set at 100 dBµV and the
sideband components is reached.
6. This is the level of divider interferences close to the IF frequency. For example:
Ch S1: fosc = 144.15 MHz and 1⁄4fosc = 36.0375 MHz.
Ch S2: fosc = 151.15 MHz and 1⁄4fosc = 37.7875 MHz.
Ch S14: fosc = 291.15 MHz and 1⁄8fosc = 36.39375 MHz.
The VHF RF input must be left open (i.e. not connected to any load or cable).
The UHF RF inputs are connected to a hybrid.
7. Crystal oscillator interference means the 4 MHz sidebands caused by the crystal oscillator.
The rejection should be >60 dB for an IF output signal of 100 dBµV.
8. The reference frequency rejection is the level of reference frequency sidebands related to the sound subcarrier.
The rejection should be >50 dB for an IF output signal of 100 dBµV, fREF = 7.8125 kHz.
9. Channel x beat: picture carrier frequency (69.25 MHz) and sound carrier frequency (74.75 MHz) both at 80 dBµV,
fosc at 108.15 MHz. The rejection of the interfering product RF picture carrier frequency + RF sound carrier
frequency − fosc at 35.85 MHz should be >60 dB.
10. Channel S02: picture carrier frequency is 76.25 MHz at 80 dBµV, fosc = 115.15 MHz.
The rejection of fosc − 2 × fIF = 37.35 MHz should be >66 dB.
1999 Jan 13
14
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
TEST AND APPLICATION INFORMATION
signal
source
50 Ω
T
VHFIN
IFOUT1
spectrum
analyzer
(1)
(2)
N1
N2
V
C
50 Ω
D.U.T.
V'
meas
o
e
V
V
50 Ω
meas
V
i
IFOUT2
RMS
voltmeter
MGK828
(1) N1 is 2 × 5 turns
(2) N2 is 2 turns
Zi >> 50 Ω
Vi = 2 × Vmeas; Vi = 80 dBµV
N1
N2
Vo = V’meas + 16 dB (transformer ratio
= 5 and transformer loss)
-------
V o
Gv = 20 log ------
V i
Fig.4 Voltage gain (Gv) measurement in the VHF band.
signal
source
50 Ω
T
A
C
UHFIN1 IFOUT1
spectrum
analyzer
(1)
(2)
N1
N2
HYBRID
V
V
D.U.T.
C
i
50 Ω
V'
e
V
o
V
50 Ω
meas
meas
B
D
UHFIN2 IFOUT2
50 Ω
RMS
voltmeter
MGK829
(1) N1 is 2 × 5 turns
(2) N2 is 2 turns
Vi = Vmeas; Vi = 70 dBµV
N1
N2
V
o = V’meas + 16 dB (transformer ratio
= 5 and transformer loss)
-------
V o
Gv = 20 log ------ + 1 dB (1 dB = correction for hybrid loss)
V i
Fig.5 Voltage gain (Gv) measurement in the UHF band.
15
1999 Jan 13
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
V
V
50 Ω
RMS
meas
voltmeter
unwanted
signal
FILTER
18 dB
source
attenuator
50 Ω
50 Ω
T
A
C
VHFIN IFOUT1
modulation
analyzer
AM = 30%
(1)
38.9 MHz
e
e
u
(2)
N1
V
o
N2
V'
HYBRID
50 Ω
V
D.U.T.
V
C
meas
i
MGL275
IFOUT2
B
D
wanted
signal
RMS
voltmeter
50 Ω
w
source
(1) N1 is 2 × 5 turns
(2) N2 is 2 turns
N1
N2
Zi >> 50 Ω
Vi = 2 × Vmeas; V’meas = Vo − 16 dB (transformer ratio
= 5 and transformer loss)
-------
Wanted input signal Vi = 80 dBµV at wanted fRF = 45.25 MHz (399.25 MHz).
Measured level of the unwanted output signal Vou causing 0,3% AM modulation in the wanted output signal;
unwanted fRF = 50.75 MHz (404.75 MHz); Vou = V’meas + 16 dB.
Fig.6 Cross modulation measurement in the VHF band.
V
V
50 Ω
meas
RMS
voltmeter
unwanted
signal
source
FILTER
18 dB
attenuator
50 Ω
50 Ω
T
UHFIN1 IFOUT1
A
C
A
C
modulation
analyzer
AM = 30%
(1)
(2)
38.9 MHz
e
e
u
N1
N2
V
o
HYBRID
HYBRID
50 Ω
V
D.U.T.
V
C
i
MGL276
UHFIN2 IFOUT2
B
D
B
D
RMS
voltmeter
wanted
signal
source
50
Ω
50
Ω
w
(1) N1 is 2 × 5 turns
(2) N2 is 2 turns
N1
-------
N2
Vi = Vmeas; V’meas = Vo − 16 dB (transformer ratio
= 5 and transformer loss)
Wanted input signal Vi = 70 dBµV at fRF = 407.25 MHz (855.25 MHz).
Measured level of the unwanted output signal Vou causing 0,3% AM modulation in the wanted output signal;
unwanted fRF = 412.75 MHz (860.75 MHz); Vou = V’meas + 16 dB.
Fig.7 Cross modulation measurement in the UHF band.
16
1999 Jan 13
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
I1
I3
BNC
PCB
plug
PCB
C1
C3
BNC
plug
I2
L1
C2
RIM-RIM
RIM-RIM
C4
(a)
(b)
MBE286 - 1
(a) For fRF = 50 MHz:
(b) For fRF = 150 MHz:
VHF mixer frequency response measured = 57 MHz;
loss = 0 dB.
VHF mixer frequency response measured = 150.3 MHz;
loss = 1.3 dB.
Image suppression = 16 dB.
Image suppression = 13 dB.
C2 15 pF.
C1 = 9 pF;
=
C3 = 5 pF; C4 = 25 pF.
L1 = 7 turns (Ø 5.5 mm; wire Ø = 0.5 mm).
I1 = semi rigid cable (RIM): 5 cm long.
I2 = semi rigid cable (RIM): 30 cm long.
I3 = semi rigid cable (RIM): 5 cm long
(semi rigid cable (RIM); 33 dB/100 m; 50 Ω; 96 pF/m).
.
(semi rigid cable (RIM); 33 dB/100 m;
50 Ω; 96 pF/m)
Fig.8 Input circuit for optimum noise figure in the VHF band.
NOISE
FIGURE
METER
NOISE
SOURCE
T
BNC
RIM
VHFIN IFOUT1
D.U.T.
INPUT
CIRCUIT
C
IFOUT2
MGL277
F = Fmeas − loss (of input circuit) (dB).
Fig.9 Noise figure (F) measurement in the VHF band.
17
1999 Jan 13
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
NOISE
NOISE
FIGURE
METER
T
A
C
UHFIN1 IFOUT1
SOURCE
HYBRID
D.U.T.
C
B
D
UHFIN2
IFOUT2
MGL278
50 Ω
Loss (in hybrid) = 1 dB.
F = Fmeas − loss (in hybrid).
Fig.10 Noise figure (F) measurement in the UHF band.
1999 Jan 13
18
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
h
P1
P2
P3
C1
L1
C2
BB149
D1
UHFIN1
UHFIN2
VHFIN
VHFOSCIB2
VHFOSCOC2
VHFOSCOC1
VHFOSCIB1
UHFOSCIB2
UHFOSCOC2
UHFOSCOC1
UHFOSCIB1
GND
1 (28)
2 (27)
3 (26)
4 (25)
5 (24)
6 (23)
UHF1
UHF2
VHF
(1) 28
(2) 27
(3) 26
(4) 25
(5) 24
(6) 23
(7) 22
1 µH
150 pF
C4
1 nF
C3
L2
30 nH
D2
BB152
C5
C30
R1 1.5 kΩ
R3 22 kΩ
R4 1.5 kΩ
R5 2.7 kΩ
1 nF
C6
2.2 pF
C7
VHFH
R21
R2
4.7 nF
4.7 nF
C9
100
pF
D3
BA792
L4
80 nH
1 nF
2.2 pF
C8
22
kΩ
22
kΩ
L3
C10
RFGND
IFFIL1
TOKO 7 km
L value/C value
VHFL
2.2 pF
C12
4.7 nF
7
R7
15 pF
1
6
4
C11
22 kΩ
1 pF
C14
2
R6
22 kΩ
D4
BB149
L5
16 nH
C13
IFFIL2
PVHFL
PVHFH
PUHF
AS
3
15 pF
C15
1 pF
C16
8
L6
30 nH
D5
R8
47 pF
VHFL
VHFH
UHF
7 (22)
TDA6404
C18
10 pF
R9
4.7 kΩ
330 Ω
LED-3R
D6
1 pF
C17
(TDA6405)
(TDA6405A)
8 (21)
R10
(8) 21
(9) 20
330 Ω
LED-3Y
D7
1 pF
R11
9 (20)
for test purpose only
330 Ω
LED-3G
J1 J2 J3 J4
J7
C19
L9
P4
7
IFOUT2
1
2
6
4
IF
OUT
(10) 19
(11) 18
(12) 17
(13) 16
(14) 15
10 (19)
11 (18)
12 (17)
13 (16)
14 (15)
80 nH
1 nF
C21
18 pF
C20
L8
R12
for test purpose only
IFOUT1
SDA
3
80 nH
330 Ω
1 nF
8
L7
V
CC
C22
R13
V
SCL
ADC
CP
CC
330 Ω
C24
10 nF
V
10 nF
CC
X1
J5
C23
XTAL
P5
V
CC
+V
CC
18 pF
4 MHz
VT
P6
R14
22 kΩ
TR1
BC847B
R15 33 kΩ
R16
22 kΩ
C25
C26
R17
1.2 kΩ
100 nF
2.2 nF
10 µF
(16 V)
10 µF
(16 V)
C27
C28
P10
R18 1 kΩ
C29 10 nF
+V
CC
R22
R19
330 Ω
f
REF
50 Ω
TR2
P8
BC847B
1
2
3
4
5
6
1
2
3
4
P7
P9
V
J6
ripple
R20 68 kΩ
SCL
SDA
+V
CC
AGND
+5 V
+5 V
GND
+33 V
for test purpose only
MGK812
The pin numbers in parenthesis represent the TDA6405 and TDA6405A.
Fig.11 Measurement circuit.
19
1999 Jan 13
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Component values for measurement circuit
Table 11 Capacitors (all SMD and NP0 unless otherwise
Table 12 Resistors (all SMD)
COMPONENT
specified)
VALUE
COMPONENT
VALUE
R1
1.5 kΩ
22 kΩ
22 kΩ
1.5 kΩ
2.7 kΩ
22 kΩ
22 kΩ
330 Ω
4.7 kΩ
330 Ω
330 Ω
330 Ω
330 Ω
22 kΩ
33 kΩ
22 kΩ
1.2 kΩ
1 kΩ
C1
1 nF
R2
C2
150 pF
1 nF
R3
C3
R4
C4
2.2 pF (N750)
4.7 nF
R5
C5
R6
C6
1 nF
R7
C7
2.2 pF (N750)
2.2 pF (N750)
100 pF (N750)
4.7 nF
R8
C8
R9
C9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
C10
C11
C12
C13
C14
C15
C16
C17
C18
C19
C20
C21
C22
C23
C24
C25
C26
C27
C28
C29
C30
15 pF
1 pF (N750)
15 pF
1 pF (N750)
47 pF
1 pF (N750)
1 pF (N750)
10 pF (N750)
1 nF
330 Ω
68 kΩ
22 kΩ
50 Ω
1 nF
18 pF
10 nF
18 pF
10 nF
100 nF
2.2 nF
10 µF (16 V; electrolytic)
10 µF (16 V; electrolytic)
10 nF
4.7 nF
1999 Jan 13
20
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Table 13 Diodes and ICs
Table 15 Transformer
COMPONENT
COMPONENT
VALUE
VALUE
D1
D2
D3
D4
D5
D6
D7
IC
BB149
BB152
BA792
BB149
LED-3R
LED-3Y
LED-3G
L3
23 turns
(TOKO, wire 0.07 mm)
L7
N1 = 2 × 5 turns
N2 = 2 turns
(TOKO, wire 0.09 mm)
Table 16 Crystal
COMPONENT
VALUE
TDA6404; TDA6405;
TDA6405A
X1
4 MHz
Table 17 Transistors
Table 14 Coils
COMPONENT
VALUE
COMPONENT
VALUE
1 µH (inductor)
30 nH
TR1
TR2
BC847B
BC847B
L1
L2
L4
L5
L6
L8
L9
80 nH
16 nH
30 nH
80 nH
80 nH
1999 Jan 13
21
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
INTERNAL PIN CONFIGURATION
PIN
AVERAGE DC VOLTAGE
(V)
SYMBOL
CONFIGURATION(1)
TDA6405:
TDA6405A
TDA6404
VHF
UHF
UHFIN1
1
2
28
27
note 2
note 2
1.0
1.0
UHFIN2
VHFIN
1
2
(27)
(28)
MGE704
3
26
1.9
note 2
3
(26)
MGE705
RFGND
4
25
0.0
0.0
4
(25)
MGE706
IFFIL1
IFFIL2
5
6
24
23
3.4
3.4
3.4
3.4
(24)
5
6 (23)
MGD617
PVHFL
PVHFH
PUHF
7
8
9
22
21
20
0.0 or
(VCC − VCE
0.0
)
(VCC − VCE
or 0.0
)
0.0
7
8
(22)
(21)
0.0
(VCC − VCE)
9
(20)
MGK814
1999 Jan 13
22
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
AVERAGE DC VOLTAGE
(V)
PIN
SYMBOL
CONFIGURATION(1)
TDA6405:
TDA6405A
TDA6404
VHF
UHF
AS
10
19
VAS
VAS
10
(19)
MGK815
SDA
11
18
note 2
note 2
11
(18)
MGK816
SCL
ADC
12
13
17
16
note 2
note 2
12
(17)
MGK817
1.9
1.9
13
(16)
MGK818
CP
14
15
1.9
1.9
14
(15)
MGK819
1999 Jan 13
23
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
AVERAGE DC VOLTAGE
(V)
PIN
SYMBOL
CONFIGURATION(1)
TDA6405:
TDA6405A
TDA6404
VHF
UHF
VT
15
14
VVT
VVT
15
(14)
MGK820
XTAL
16
13
3.0
3.0
16
(13)
MGK821
VCC
17
18
19
12
11
10
supply voltage
5.0
2.2
2.2
5.0
2.2
2.2
IFOUT1
IFOUT2
18
19
(11)
(10)
MGK822
GND
20
9
0.0
0.0
20
(9)
MGK823
UHFOSCIB1
UHFOSCOC1
UHFOSCOC2
UHFOSCIB2
21
22
23
24
8
7
6
5
note 2
note 2
note 2
note 2
1.9
2.5
2.5
1.9
(6)
23
(7)
22
21
(8)
24
(5)
MGK824
1999 Jan 13
24
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
AVERAGE DC VOLTAGE
(V)
PIN
SYMBOL
CONFIGURATION(1)
TDA6405:
TDA6405A
TDA6404
VHF
UHF
note 2
VHFOSCIB1
VHFOSCOC1
VHFOSCOC2
VHFOSCIB2
25
26
27
28
4
3
2
1
2.0
2.7
2.7
2.0
note 2
note 2
note 2
(2)
27
(3)
26
28
(1)
25
(4)
MGK825
Notes
1. The pin numbers in parenthesis represent the TDA6405 and TDA6405A.
2. Not applicable.
1999 Jan 13
25
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
PACKAGE OUTLINE
SSOP28: plastic shrink small outline package; 28 leads; body width 5.3 mm
SOT341-1
D
E
A
X
c
H
v
M
A
y
E
Z
28
15
Q
A
2
A
(A )
3
A
1
pin 1 index
θ
L
p
L
1
14
detail X
w
M
b
p
e
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
A
(1)
(1)
(1)
UNIT
A
A
A
b
c
D
E
e
H
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
E
max.
8o
0o
0.21
0.05
1.80
1.65
0.38
0.25
0.20
0.09
10.4
10.0
5.4
5.2
7.9
7.6
1.03
0.63
0.9
0.7
1.1
0.7
mm
2.0
0.65
1.25
0.25
0.2
0.13
0.1
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
93-09-08
95-02-04
SOT341-1
MO-150AH
1999 Jan 13
26
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “Data Handbook IC26; Integrated Circuit Packages”
(document order number 9398 652 90011).
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
To overcome these problems the double-wave soldering
method was specifically developed.
If wave soldering is used the following conditions must be
observed for optimal results:
1999 Jan 13
27
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
Suitability of surface mount IC packages for wave and reflow soldering methods
SOLDERING METHOD
PACKAGE
WAVE
REFLOW(1)
BGA, SQFP
not suitable
suitable
suitable
suitable
suitable
suitable
HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable(2)
PLCC(3), SO, SOJ
LQFP, QFP, TQFP
SSOP, TSSOP, VSO
suitable
not recommended(3)(4)
not recommended(5)
Notes
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the “Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”.
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Jan 13
28
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1999 Jan 13
29
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
NOTES
1999 Jan 13
30
Philips Semiconductors
Product specification
5 V mixer/oscillator-PLL synthesizers for
hyperband tuners
TDA6404; TDA6405;
TDA6405A
NOTES
1999 Jan 13
31
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© Philips Electronics N.V. 1999
SCA61
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
545004/750/02/pp32
Date of release: 1999 Jan 13
Document order number: 9397 750 04901
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TDA6404; TDA6405; TDA6405A; 5 V mixer/oscillator-PLL synthesizers for hyperband tuners
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Description
Catalog by System
Automotive
Consumer Multimedia
Systems
The TDA6404, TDA6405 and TDA6405A are programmable 2-band mixer/oscillator-PLL synthesizers intended for VHF/UHF and
hyperband tuners.
Communications
PC/PC-peripherals
The devices include two double balanced mixers and two oscillators for the VHF and UHF band, an IF amplifier and a PLL synthesizer.
With proper oscillator application and by using a switchable inductor to split the VHF band into two sub-bands (the full VHF/UHF and
hyperband) the TV bands can be covered.
Cross reference
Models
Packages
Two pins are available between the mixer output and the IF amplifier input to enable IF filtering for improved signal handling. Three PNP
ports are provided for band switching. Band selection is made according to the band switch bits VHFL, VHFH and UHF.
Application notes
Selection guides
Other technical documentation
End of Life information
Datahandbook system
The PLL synthesizer consists of a divide-by-eight prescaler, a 15-bit programmable divider, a 4 MHz crystal oscillator and its programmable
reference divider and a phase comparator combined with a charge pump which drives the tuning amplifier, including 33 V output.
Depending on the reference divider ratio (512, 640 or 1024), the phase comparator operates at 7.8125 kHz, 6.25 kHz or 3.90625 kHz.
Relevant Links
The devices are controlled according to the I²C-bus format. The in-lock detector bit FL is set to logic 1 when the loop is locked and is read
on the SDA line (status byte) during a read operation. The ADC input is available for digital Automatic Frequency Control (AFC). The ADC
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code is read during a read operation on the I²C-bus. In test mode, pin ADC is used as a test output for fREF and 1/2 fDIV
.
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TDA6404; TDA6405;
TDA6405A
When the charge pump current switch mode is activated and the loop is phase-locked the charge pump current value is automatically
switched to LOW. This is to improve carrier-to-noise ratio. The status of this feature can be read in the ACPS flag during a read operation
on the I²C-bus.
TDA6404; TDA6405;
TDA6405A
Five serial bytes (including address byte) are required for the I²C-bus format to address the devices, select the VCO frequency, program
the three PNP ports, set the charge pump current and to set the reference divider ratio. The devices have four independent I²C-bus
addresses which can be selected by applying a specific voltage on the AS input.
Features
l Single chip 5 V mixer/oscillator-PLL synthesizer for hyperband tuners
l I²C-bus protocol
l 3 PNP band switch buffers (25 mA)
l 33 V tuning voltage output
l In-lock detector
l 5-level Analog-to-Digital Converter (ADC)
l 15-bit programmable divider
l Programmable reference divider ratio (512, 640 or 1024)
l Programmable charge pump current
l Balanced mixer with a common emitter input for VHF (single input)
l Balanced mixer with a common base input for UHF (double input)
l 4-pin common emitter oscillator for VHF
l 4-pin common emitter oscillator for UHF
l IF amplifier with a low output impedance to drive a SAW filter directly (»2 kW load)
l Low power, low radiation, small size
Datasheet
File
size
(kB)
Publication
release date Datasheet status
Page
count
Type nr.
Title
Datasheet
Download
TDA6404; TDA6405;
TDA6405A
5 V mixer/oscillator-PLL synthesizers 13-Jan-99
for hyperband tuners
Product
Specification
32
221
Products, packages, availability and ordering
North American
Partnumber
Order code
(12nc)
buy
online
Partnumber
marking/packing
package device status
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
TDA6404TS/C1
9352 503 80112 Standard Marking * Tube
Standard Marking * Reel Pack, SMD,
-
-
-
-
-
-
-
-
9352 503 80118
13"
9352 503 80512 Standard Marking * Tube Dry Pack
Standard Marking * Reel Dry Pack,
9352 503 80518
SMD, 13"
TDA6405ATS/C1
9352 610 37112 Standard Marking * Tube
Standard Marking * Reel Pack, SMD,
9352 610 37118
13"
9352 610 37512 Standard Marking * Tube Dry Pack
Standard Marking * Reel Dry Pack,
9352 610 37518
SMD, 13"
TDA6405TS/C1
TDA6405TS/C2
9352 517 00112 Standard Marking * Tube
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
SOT341 Full production
-
-
-
-
-
-
Standard Marking * Reel Pack, SMD,
13"
9352 517 00118
9352 517 00512 Standard Marking * Tube Dry Pack
Standard Marking * Reel Dry Pack,
9352 517 00518
SMD, 13"
9352 616 98512 Standard Marking * Tube Dry Pack
Standard Marking * Reel Dry Pack,
9352 616 98518
SMD, 13"
Please read information about some discontinued variants of this product.
Find similar products:
TDA6404; TDA6405; TDA6405A links to the similar products page containing an overview of products that are similar in function or
related to the part number(s) as listed on this page. The similar products page includes products from the same catalog tree(s) , relevant
selection guides and products from the same functional category.
Copyright © 2000
Royal Philips Electronics
All rights reserved.
Terms and conditions.
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Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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