935269168115 [NXP]

IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit;
935269168115
型号: 935269168115
厂家: NXP    NXP
描述:

IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit

光电二极管
文件: 总12页 (文件大小:138K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
INTEGRATED CIRCUITS  
SA56606-XX  
CMOS system reset  
Product data  
2001 Jun 19  
Supersedes data of 2001 Apr 24  
File under Integrated Circuits, Standard Analog  
Philips  
Semiconductors  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
GENERAL DESCRIPTION  
The SA56606-XX is a CMOS device designed to generate a reset  
signal for a variety of microprocessor and logic systems. Accurate  
reset signals are generated during momentary power interruptions  
or whenever power supply voltages sag to intolerable levels. An  
Open Drain output topology is incorporated for adaptability to a wide  
variety of logic and microprocessor applications. Several reset  
threshold versions of the device are available.  
The SA56606-XX is available in the SOT23-5 surface mount  
package.  
FEATURES  
APPLICATIONS  
Microcomputer systems  
12 V maximum operating voltage  
DC  
Logic systems  
CMOS N-channel Open Drain output  
Offered in reset thresholds of  
Battery monitoring systems  
Back-up power supply circuits  
Voltage detection circuits  
2.0, 2.7, 2.8, 2.9, 3.0, 3.1, 4.2, 4.3, 4.4, 4.5, 4.6, 4.7 V  
DC  
Available in SOT23-5 surface mount package  
SIMPLIFIED SYSTEM DIAGRAM  
V
DD  
V
2
DD  
V
DD  
R
SA56606-XX  
PU  
R
CPU  
V
OUT  
1
RESET  
V
REF  
R
R
V
SS  
3
V
SS  
V
SS  
SL01313  
Figure 1. Simplified system diagram.  
2
2001 Jun 19  
885–2247 26559  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
ORDERING INFORMATION  
PACKAGE  
TYPE NUMBER  
TEMPERATURE  
RANGE  
NAME  
DESCRIPTION  
SA56606-XXGW SOT23-5, SOT25, SO5  
plastic small outline package; 5 leads (see dimensional drawing)  
–40 to +85 °C  
NOTE:  
Part number marking  
The device has twelve detection voltage options, indicated by the  
XX on the order code.  
Each package is marked with a four letter code. The first three  
letters designate the product. The fourth letter, represented by ‘x’, is  
a date tracking code. For example, AAKB is device AAK (the  
SA56606-30 reset), produced in time period ‘B’.  
XX  
20  
27  
28  
29  
30  
31  
42  
43  
44  
45  
46  
47  
DETECT VOLTAGE (Typical)  
2.0 V  
2.7 V  
2.8 V  
2.9 V  
3.0 V  
3.1 V  
4.2 V  
4.3 V  
4.4 V  
4.5 V  
4.6 V  
4.7 V  
Part number  
SA56606-20  
SA56606-27  
SA56606-28  
SA56606-29  
SA56606-30  
SA56606-31  
SA56606-42  
SA56606-43  
SA56606-44  
SA56606-45  
SA56606-46  
SA56606-47  
Marking  
A A F x  
A A G x  
A A H x  
A A J x  
A A K x  
A A L x  
A A M x  
A A N x  
A A P x  
A A R x  
A A S x  
A A T x  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN  
1
SYMBOL  
DESCRIPTION  
V
OUT  
Reset High Output  
Positive Supply  
V
1
2
3
5
4
N/C  
N/C  
OUT  
2
V
DD  
3
V
SS  
Ground. Negative Supply  
No connection  
V
SA56606-XX  
DD  
4
N/C  
N/C  
5
No connection  
V
SS  
SL01312  
Figure 2. Pin configuration.  
MAXIMUM RATINGS  
SYMBOL  
PARAMETER  
MIN.  
–0.3  
MAX.  
UNIT  
V
V
V
Power supply voltage  
Output voltage  
12  
DD  
OUT  
OUT  
V
– 0.3  
V
SS  
I
Output current  
50  
mA  
°C  
T
Operating temperature  
Storage temperature  
Power dissipation  
–40  
–40  
85  
oper  
T
stg  
125  
150  
°C  
P
mW  
3
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
DC ELECTRICAL CHARACTERISTICS  
Characteristics measured with T  
= 25 °C, unless otherwise specified.  
amb  
TEST  
CIRCUIT  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN.  
– 2%  
TYP.  
MAX.  
+ 2%  
UNIT  
V
S
Reset detection threshold  
Hysteresis  
V
V
S
V
S
V
V
S
V  
V
DD  
= 0 V V + 1.0 V 0 V  
V
× 0.03  
V
× 0.05  
V × 0.08  
S
S
S
S
S
1
V /T  
S
Threshold voltage temperature  
coefficient  
–40 °C T  
+85 °C  
±0.01  
%/°C  
Fig. 17  
amb  
I
I
I
I
Supply current  
V
= V + 1.0 V  
0.25  
1.0  
0.1  
µA  
µA  
CC  
DD  
S
I
leakage current when OFF  
V
DD  
= V = 10 V  
DS  
OH  
DS  
N-channel I output sink current 1  
V
V
= 0.5 V; V = 1.2 V  
–0.23  
–1.6  
–1.4  
–8.3  
mA  
mA  
DS1  
DS2  
DS  
DS  
DS  
DD  
2
N-channel I output sink current 2  
= 0.5 V; V = 2.4 V  
DS  
DD  
Fig. 18  
(for V > 2.6 V)  
S
I
N-channel I output sink current 3  
V
DS  
= 0.5 V; V = 3.6 V  
–3.2  
–14.7  
mA  
DS3  
DS  
DD  
(for V > 3.9 V)  
S
4
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
TYPICAL PERFORMANCE CURVES  
0.50  
+0.20  
+0.15  
+0.10  
+0.05  
V
= V + 1.0 V  
S
V
V
FALLING  
NORMALIZED TO 25 °C  
DD  
CC  
0.45  
0.40  
0.35  
NORMALIZED TO 25 °C  
S
V
S
0.30  
0.25  
–0.05  
–0.10  
–0.15  
–0.20  
0.20  
0.15  
0.10  
–50  
–25  
0
25  
50  
75  
100  
125  
–50  
–25  
0
25  
50  
75  
100  
125  
T , TEMPERATURE (°C)  
amb  
T , TEMPERATURE (°C)  
amb  
SL01344  
SL01345  
Figure 3. Supply current versus temperature.  
Figure 4. Detection threshold versus temperature.  
3.0  
2.5  
200  
150  
100  
50  
V
= 0.5 V  
DS  
V
= V – V  
SH SL  
S(HYS)  
(V RISING – V FALLING)  
CC  
CC  
2.0  
1.5  
1.0  
0.5  
0
N-CHANNEL  
0
–50  
–50  
–25  
0
25  
50  
75  
100  
125  
–25  
0
25  
50  
75  
100  
125  
T , TEMPERATURE (°C)  
amb  
T , AMBIENT TEMPERATURE (°C)  
amb  
SL01346  
SL01317  
Figure 6. Output FET current versus temperature.  
Figure 5. Detection hysteresis versus temperature.  
0.6  
0.5  
0.4  
5.0  
T
= 25 °C  
T
AMB  
= 25 °C  
AMB  
TYPICAL CHARACTERISTIC.  
DETECTION AND RELEASE  
VOLTAGE POINTS DEPEND ON  
THE SPECIFIC DEVICE TYPE.  
4.0  
3.0  
2.0  
V
S(HYS)  
0.3  
0.2  
1.0  
0
0.1  
0
0
1.0  
2.0  
3.0  
4.0  
5.0  
6.0  
7.0  
8.0  
9.0  
10  
0
1.0  
2 .0  
3.0  
4.0  
5.0  
6.0  
V
, SUPPLY VOLTAGE (V)  
V
DD  
, SUPPLY VOLTAGE (V)  
DD  
SL01348  
SL01349  
Figure 7. Output voltage versus supply voltage  
Figure 8. Supply current versus supply voltage  
5
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
5
10  
V
+ 2.0 V  
T
AMB  
= 25 °C  
S
(SEE FIGURES 10 AND 11)  
INPUT SIGNAL  
4
3
1.2 V  
10  
10  
V
SS  
t
t
PHL  
7.0 V  
3.5 V  
2
1
10  
10  
OUTPUT SIGNAL  
PLH  
V
SS  
t
PHL  
–5  
–4  
–3  
–2  
–1  
10  
10  
10  
10  
10  
t
PLH  
C , OUTPUT LOAD CAPACITANCE (µF)  
L
SL01350  
SL01351  
Figure 9. Propagation delay versus output load C  
Figure 10. Propagation delay measurements  
7.0 V  
V
DD  
R
= 100 kΩ  
PU  
INPUT  
SIGNAL  
OUTPUT  
SA56606-XX  
C
= 10 pF to 0.1 µF  
L
V
SS  
V
SS  
SL01322  
Figure 11. Propagation delay measurement circuit  
6
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
TECHNICAL DESCRIPTION  
The SA56606-XX is a CMOS device designed to provide power  
source monitoring and a system reset function in the event the  
supply voltage sags below an acceptable level for the system to  
reliably operate. The device is designed to generate a compatible  
reset signal for a wide variety of microprocessor and logic systems.  
The SA56606 can operate at voltages up to 12 volts. The series  
includes several versions providing precision threshold voltage reset  
values of 2.0, 2.7, 2.8, 2.9, 3.0, 3.1, 4.2, 4.6 and 4.7 V. The reset  
The low side N-Channel FET (TR ) establishes threshold hysteresis  
by turning ON whenever the threshold comparator’s output goes to  
2
a HIGH state (when V sags to or below the threshold level). TR ’s  
DD  
2
turning ON causes additional current to flow through resistors R and  
1
R , causing the inverting input of the threshold comparator to be  
2
pulled even lower. For the comparator to reverse its output polarity  
and turn OFF TR , the V source voltage must overcome this  
2
DD  
additional pull-down voltage present on the comparator’s inverting  
input. The differential voltage required to do this establishes the  
hysteresis voltage of the sensed threshold voltage. Typically it is  
threshold incorporates a typical hysteresis of (V × 0.05) volts to  
prevent erratic resets from being generated.  
S
(V × 0.05) volts.  
S
The output of the SA56606 utilizes a low side open drain topology,  
which requires an external pull-up resistor (R ) to the V power  
When the V voltage sags, and is at or below the Detection  
DD  
PU  
DD  
source. Although this may be regarded as a disadvantage, it is an  
advantage in many sensitive applications because the open drain  
output cannot source reset current to a microprocessor when both  
are operated from a common supply. For this reason the SA56606  
offers a safe inter-connect to a wide variety of microprocessors.  
Threshold (V ), the device will assert a Reset LOW output at or  
SL  
very near ground potential. As the V voltage rises from  
DD  
(V < V ) to V or higher, the Reset is released and the output  
DD  
SL  
SH  
follows V . Conversely, decreases in V from (V > V ) to V  
SL  
DD  
DD  
DD  
SL  
or lower cause the output to be pulled to ground.  
The SA56606 operates at very low supply currents, typically  
0.25 µA, while offering a high precision of threshold detection (±2%).  
Figure 12 is a functional block diagram of the SA56606. The internal  
Hysteresis Voltage = Release Voltage – Detection Threshold Voltage  
V
HYS  
= V – V  
SH SL  
reference source voltage (V ) is typically 0.8 V over the operating  
REF  
where:  
temperature range. The reference voltage is connected to the  
non-inverting input of the threshold comparator, while the inverting  
input monitors the supply voltage through a resistor divider network  
V
SH  
V
SL  
= V + V  
V
(R + R ) / R  
SL  
HYS  
REF 1 2 2  
= V  
(R + R + R ) / (R + R )  
REF 1 2 3 2 3  
made up of R , R , and R . The output of the threshold comparator  
1
2
3
When V drops to levels below the minimum operating voltage,  
typically less than 0.95 volts, the output is undefined and output  
DD  
drives the output Open Drain N-Channel FET of the device TR ).  
1
When the supply voltage sags to the threshold detection voltage, the  
resistor divider network supplies a voltage to the inverting input of  
reset LOW assertion is not guaranteed. At this level of V the  
DD  
output will try to rise to V  
.
DD  
the threshold comparator, which is less than that of V  
, causing  
REF  
the output of the comparator to go to a HIGH output state. This  
causes the low side N-Channel FET to be active ON, pulling its  
drain voltage to a LOW state. The device adheres to a true  
input/output logic protocol: the output goes LOW when input is LOW  
(below threshold) and output goes HIGH when input is HIGH (above  
threshold).  
The V  
voltage is typically 0.8 V. The devices are fabricated using  
REF  
a high resistance CMOS process and utilize high resistance R , R ,  
1
2
and R values requiring very small amounts of current. This  
3
combination achieves very efficient low power performance over the  
full operating temperature.  
V
2
DD  
V
SA56606-XX  
OUT  
1
R
1
TR  
1
V
REF  
R
R
R
2
3
TR  
2
3
V
SS  
SL01323  
Figure 12. Functional diagram.  
7
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
Timing diagram  
The timing diagram shown in Figure 13 depicts the operation of the  
device. Letters A–J on the TIME axis indicate specific events.  
D–E: Between ‘D’ and ‘E’, V starts rising.  
DD  
E: At ‘E’, V rises to the V . Once again, the device releases  
DD  
SH  
A: At ‘A’, V begins to increase. Also the V  
voltage initially  
the hold on the V  
reset. The Reset output V  
tracks V as it  
OUT DD  
DD  
OUT  
OUT  
increases but abruptly decreases when V reaches the level  
rises above V  
.
SH  
DD  
(approximately 0.8 V) that activates the internal bias circuitry and  
RESET is asserted.  
F–G: At ‘F’, V is above the upper threshold and begins to fall,  
DD  
causing V  
to follow it. As long as V remains above the V  
,
OUT  
DD  
SH  
B: At ‘B’, V reaches the threshold level of V . At this point the  
no reset signal will be triggered. Before V falls to the V , it  
DD SH  
DD  
SH  
device releases the hold on the V  
reset. The Reset output V  
begins to rise, causing V to follow it. At ‘G’, V returns to  
OUT DD  
OUT  
OUT  
tracks V as it rises above V (assuming the reset pull-up resistor  
normal.  
DD  
SH  
R
is connected to V ). In a microprocessor based system these  
DD  
PU  
H: At event ‘H’ V falls until the V undervoltage detection  
DD  
SL  
events release the reset from the microprocessor, allowing the  
microprocessor to function normally.  
threshold point is reached. At this level, a RESET signal is  
generated and V goes LOW.  
OUT  
C–D: At ‘C’, V begins to fall, causing V  
to follow. V  
DD  
DD  
OUT  
J: At ‘J’ the V voltage has decreased until normal internal circuit  
DD  
continues to fall until the V undervoltage detection threshold is  
SL  
bias is unable to maintain a V  
reset. As a result, V may rise to  
DD  
OUT  
reached at ‘D’. This causes a reset signal to be generated (V  
Reset goes LOW).  
OUT  
less than 0.8 V. As V decreases further, V  
reset also  
DD  
OUT  
decreases to zero.  
V  
S
V
SH  
V
SL  
V
DD  
0
V
OUT  
0
A
B
C
D
E
F
G
H
J
TIME  
SL01354  
Figure 13. Timing diagram.  
8
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
Application information  
V
DD  
SUPPLY  
CURRENT CHANGES  
R
V
11  
DD  
R
R
PU  
PU  
CPU  
RESET  
A
V
DD  
V
OUT  
SA56606-XX  
V
SUPPLY  
OUTPUT  
SA56606-XX  
R
12  
V
SS  
V
SS  
GND  
SL01371  
SL01373  
Figure 16. High impedance supply operating problems.  
Figure 14. Conventional reset application.  
Significant voltage variations of V may occur when the device is  
operated from high impedance power sources. When the device  
DD  
The Power ON Reset Circuit shown in Figure 15 is an example of  
how to obtain a stable reset condition upon power-up. If the power  
supply voltage rises abruptly, the RESET may go HIGH momentarily  
asserts or releases a reset, V variations are produced as a result  
DD  
of the voltage drop developed across R due to the current  
11  
when V is below the minimum operating voltage (0.95 V). To  
DD  
variations through the resistor R (representing the supply  
11  
overcome this, a resistor (R) is placed between positive supply and  
impedance). If the V variations are large, such that they exceed  
DD  
the V pin with a capacitor from the V pin to ground.  
DD  
DD  
the Detection Hysteresis, the output of the device can oscillate from  
a HIGH state to a LOW state. The user should avoid using high  
impedance V sources to prevent such situations.  
DD  
V
DD  
SUPPLY  
R
D
R
PU  
CPU  
RESET  
SA56606-XX  
V
V
OUT  
DD  
C
V
SS  
GND  
SL01372  
Figure 15. Power ON reset circuit.  
9
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
Test circuits  
A
V
V
DD  
DD  
R
PU  
100 kΩ  
V
V
V
V
A
DD  
DD  
SA56606-XX  
SA56606-XX  
V
V
OUT  
OUT  
V
V
DS  
V
V
SS  
SS  
SL01374  
SL01375  
Figure 17. Test circuit 1.  
Figure 18. Test circuit 2.  
PACKING METHOD  
The SA56606-XX is packed in reels, as shown in Figure 19.  
GUARD  
BAND  
TAPE  
TAPE DETAIL  
REEL  
ASSEMBLY  
COVER TAPE  
CARRIER TAPE  
BARCODE  
LABEL  
BOX  
SL01305  
Figure 19. Tape and reel packing method  
10  
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
SOT23-5: plastic small outline package; 5 leads; body width 1.5 mm  
1.2  
1.0  
0.55  
0.41  
0.22  
0.08  
3.00  
2.70  
1.70  
1.50  
0.55  
0.35  
0.025  
1.35  
11  
2001 Jun 19  
Philips Semiconductors  
Product data  
CMOS system reset  
SA56606-XX  
Data sheet status  
Product  
status  
Definitions  
[1]  
Data sheet status  
[2]  
Objective data  
Development  
Qualification  
This data sheet contains data from the objective specification for product development.  
Philips Semiconductors reserves the right to change the specification in any manner without notice.  
Preliminary data  
This data sheet contains data from the preliminary specification. Supplementary data will be  
published at a later date. Philips Semiconductors reserves the right to change the specification  
without notice, in order to improve the design and supply the best possible product.  
Product data  
Production  
This data sheet contains data from the product specification. Philips Semiconductors reserves the  
right to make changes at any time in order to improve the design, manufacturing and supply.  
Changes will be communicated according to the Customer Product/Process Change Notification  
(CPCN) procedure SNW-SQ-650A.  
[1] Please consult the most recently issued datasheet before initiating or completing a design.  
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on  
the Internet at URL http://www.semiconductors.philips.com.  
Definitions  
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For  
detailed information see the relevant data sheet or data handbook.  
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one  
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or  
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended  
periods may affect device reliability.  
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips  
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or  
modification.  
Disclaimers  
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications  
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.  
RighttomakechangesPhilipsSemiconductorsreservestherighttomakechanges, withoutnotice, intheproducts, includingcircuits,standard  
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no  
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these  
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless  
otherwise specified.  
Philips Semiconductors  
811 East Arques Avenue  
P.O. Box 3409  
Copyright Philips Electronics North America Corporation 2001  
All rights reserved. Printed in U.S.A.  
Sunnyvale, California 94088–3409  
Telephone 800-234-7381  
Date of release: 06-01  
Document order number:  
9397 750 08451  
Philips  
Semiconductors  

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935269178115

IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO5, PLASTIC, SOT-23, SO-5, Power Management Circuit
NXP

935269179115

暂无描述
NXP

935269192112

IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 7.50 MM, PLASTIC, MS-013, SOT-162-1, SO-16, Parallel IO Port
NXP

935269192118

IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 7.50 MM, PLASTIC, MS-013, SOT-162-1, SO-16, Parallel IO Port
NXP

935269193112

IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16, Parallel IO Port
NXP

935269193118

IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 5.30 MM, PLASTIC, MO-150, SOT-338-1, SSOP-16, Parallel IO Port
NXP

935269194112

IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16, Parallel IO Port
NXP