935277682518 [NXP]
LVC/LCX/Z SERIES, OCTAL 4-BIT DRIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96;
| 型号： | 935277682518 |
| 厂家： | 
NXP |
| 描述： | LVC/LCX/Z SERIES, OCTAL 4-BIT DRIVER, TRUE OUTPUT, PBGA96, 13.50 X 5.50 MM, 1.05 MM HEIGHT, PLASTIC, SOT-536-1, LFBGA-96 驱动 输出元件 |
| 文件： | 总14页 (文件大小：92K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INTEGRATED CIRCUITS
DATA SHEET
74LVCH32244A
32-bit buffer/line driver; 5 V
input/output tolerant; 3-state
Product specification
2004 May 13
Supersedes data of 1999 Aug 31
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
FEATURES
DESCRIPTION
• 5 V tolerant inputs/outputs for interfacing with 5 V logic
• Wide supply voltage range of 1.2 V to 3.6 V
• CMOS low power consumption
The 74LVCH32244A is a high-performance, low-power,
low-voltage, Si-gate CMOS device, superior to most
advanced CMOS compatible TTL families. Inputs can be
driven from either 3.3 V or 5 V devices. In 3-state
operation, outputs can handle 5 V. These features allow
the use of these devices in a mixed 3.3 V and 5 V
environment.
• MULTIBYTE flow-trough standard pin-out architecture
• Low inductance multiple power and ground pins for
minimum noise and ground bounce
• Direct interface with TTL levels
The 74LVCH32244A is a 32-bit non-inverting buffer/line
driver with 3-state outputs. The 3-state outputs are
controlled by eight output enable inputs (1OE to 8OE).
A HIGH on pin nOE causes the outputs to assume a
high-impedance OFF-state.
• Inputs accept voltages up to 5.5 V
• All data inputs have bushold
• Complies with JEDEC standard JESD8-B/JESD36
• ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
To ensure the high-impedance state during power up or
power down, pin nOE should be tied to VCC through a
pull-up resistor; the minimum value of the resistor is
determined by the current-sinking capability of the driver.
• Specified from −40 °C to +85 °C
• Packaged in plastic fine-pitch ball grid array package.
The 74LVCH32244A bushold data inputs eliminates the
need for external pull-up resistors to hold unused or
floating data inputs at a valid logic level.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 2.5 ns.
SYMBOL
PARAMETER
CONDITIONS
CL = 50 pF; VCC = 3.3 V
CL = 50 pF; VCC = 3.3 V
TYPICAL
3.0
UNIT
tPHL/tPLH
tPZH/tPZL
tPHZ/tPLZ
CI
propagation delay nAn to nYn
3-state output enable time nOE to nYn
ns
ns
ns
pF
3.5
3.7
5.0
3-state output disable time nOE to nYn CL = 50 pF; VCC = 3.3 V
input capacitance
CPD
power dissipation capacitance per gate VCC = 3.3 V; notes 1 and 2
outputs enabled
outputs disabled
12
pF
pF
4.0
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = total load switching outputs;
Σ(CL × VCC2 × fo) = sum of the outputs.
2. The condition is VI = GND to VCC
.
2004 May 13
2
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
FUNCTION TABLE
See note 1.
INPUT
OUTPUT
nYn
nOE
L
nAn
L
H
X
L
H
Z
L
H
Note
1. H = HIGH voltage level
L = LOW voltage level
X = don’t care
Z = high-impedance OFF-state
ORDERING INFORMATION
TYPE NUMBER
PACKAGES
PINS PACKAGE MATERIAL
96 LFBGA96 plastic
TEMPERATURE RANGE
CODE
74LVCH32244AEC
−40 °C to +85 °C
SOT536-1
PINNING
BALL SYMBOL
DESCRIPTION
data output
BALL SYMBOL
DESCRIPTION
D1
D2
D3
D4
D5
D6
E1
E2
E3
E4
E5
E6
F1
F2
F3
F4
F5
F6
G1
G2
2Y3
2Y2
GND
GND
2A2
2A3
3Y1
3Y0
GND
GND
3A0
3A1
3Y3
3Y2
VCC
VCC
3A2
3A3
4Y1
4Y0
A1
A2
A3
1Y1
1Y0
1OE
data output
data output
ground (0 V)
ground (0 V)
data input
data output
3-state output enable input (active
LOW)
A4
2OE
3-state output enable input (active
LOW)
data input
data output
data output
ground (0 V)
ground (0 V)
data input
A5
A6
B1
B2
B3
B4
B5
B6
C1
C2
C3
C4
C5
C6
1A0
1A1
1Y3
1Y2
GND
GND
1A2
1A3
2Y1
2Y0
VCC
VCC
2A0
2A1
data input
data input
data output
data output
ground (0 V)
ground (0 V)
data input
data input
data output
data output
supply voltage
supply voltage
data input
data input
data output
data output
supply voltage
supply voltage
data input
data input
data output
data output
data input
2004 May 13
3
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
BALL SYMBOL
DESCRIPTION
ground (0 V)
BALL SYMBOL
DESCRIPTION
G3
G4
G5
G6
H1
H2
H3
H4
H5
H6
J1
GND
GND
4A0
4A1
4Y2
4Y3
4OE
3OE
4A3
4A2
5Y1
5Y0
5OE
M2
M3
M4
M5
M6
N1
N2
N3
N4
N5
N6
P1
P2
P3
P4
P5
P6
R1
R2
R3
R4
R5
R6
T1
T2
T3
6Y2
GND
GND
6A2
6A3
7Y1
7Y0
GND
GND
7A0
7A1
7Y3
7Y2
VCC
VCC
7A2
7A3
8Y1
8Y0
GND
GND
8A0
8A1
8Y2
8Y3
8OE
data output
ground (0 V)
ground (0 V)
ground (0 V)
data input
data input
data input
data output
data input
data output
data output
data output
ground (0 V)
ground (0 V)
data input
output enable input (active LOW)
output enable input (active LOW)
data input
data input
data output
data input
J2
data output
data output
data output
supply voltage
supply voltage
data input
J3
3-state output enable input (active
LOW)
J4
6OE
3-state output enable input (active
LOW)
J5
5A0
5A1
5Y3
5Y2
GND
GND
5A2
5A3
6Y1
6Y0
VCC
VCC
6A0
6A1
6Y3
data input
data input
J6
data input
data output
data output
ground (0 V)
ground (0 V)
data input
K1
K2
K3
K4
K5
K6
L1
L2
L3
L4
L5
L6
M1
data output
data output
ground (0 V)
ground (0 V)
data input
data input
data input
data output
data output
data output
data output
supply voltage
supply voltage
data input
3-state output enable input (active
LOW)
T4
7OE
3-state output enable input (active
LOW)
data input
T5
T6
8A3
8A2
data input
data input
data output
2004 May 13
4
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
mna471
6
5
4
3
2
1
1A1 1A3 2A1 2A3 3A1 3A3 4A1 4A2 5A1 5A3 6A1 6A3 7A1 7A3 8A1 8A2
1A0 1A2 2A0 2A2 3A0 3A2 4A0 4A3 5A0 5A2 6A0 6A2 7A0 7A2 8A0 8A3
2OE GND V
1OE GND V
GND GND V
GND GND V
GND 3OE 6OE GND V
GND 4OE 5OE GND V
GND GND V
GND GND V
GND 7OE
CC
CC
CC
CC
GND 8OE
CC
CC
CC
CC
1Y0 1Y2 2Y0 2Y2 3Y0 3Y2 4Y0 4Y3 5Y0 5Y2 6Y0 6Y2 7Y0 7Y2 8Y0 8Y3
1Y1 1Y3 2Y1 2Y3 3Y1 3Y3 4Y1 4Y2 5Y1 5Y3 6Y1 6Y3 7Y1 7Y3 8Y1 8Y2
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
Fig.1 Pin configuration.
3A0
3Y0
3Y1
3Y2
3Y3
5A0
5A1
5A2
5Y0
5Y1
5Y2
5Y3
1A0
1A1
1A2
1Y0
1Y1
1Y2
1Y3
7A0
7Y0
7Y1
7Y2
7Y3
A2
A1
B2
B1
E2
E1
F2
F1
J2
N2
N1
P2
P1
A5
A6
B5
E5
E6
F5
J5
J6
N5
N6
P5
3A1
3A2
3A3
3OE
7A1
7A2
J1
K2
K1
K5
5A3
1A3
7A3
B6
A3
F6
H4
K6
J3
P6
T4
1OE
5OE
7OE
2A0
2A1
2A2
2Y0
2Y1
2Y2
2Y3
4A0
4A1
4A2
4Y0
4Y1
4Y2
4Y3
6A0
6A1
6A2
6Y0
6Y1
6Y2
6Y3
8A0
8A1
8A2
8Y0
8Y1
8Y2
8Y3
C2
C1
D2
D1
G2
G1
H1
H2
L2
R2
R1
T1
T2
C5
C6
D5
G5
G6
H6
L5
L6
R5
R6
T6
L1
M2
M1
M5
2A3
4A3
6A3
8A3
D6
A4
H5
H3
M6
J4
T5
T3
2OE
4OE
6OE
8OE
mna472
Fig.2 Logic symbol.
5
2004 May 13
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
V
handbook, halfpage
CC
data
input
to internal circuit
MNA473
Fig.3 Bushold circuit.
2004 May 13
6
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
2.7
MAX.
3.6
UNIT
VCC
for maximum speed performance
for low-voltage applications
V
1.2
0
3.6
5.5
VCC
5.5
+85
20
V
VI
input voltage
V
VO
output voltage
output HIGH or LOW state
output 3-state
0
V
0
V
Tamb
tr, tf
operating ambient temperature in free air
input rise and fall times VCC = 1.2 V to 2.7 V
VCC = 2.7 V to 3.6 V
−40
0
°C
ns/V
ns/V
0
10
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL
PARAMETER
supply voltage
CONDITIONS
MIN.
−0.5
MAX.
+6.5
UNIT
VCC
IIK
V
input diode current
input voltage
VI < 0 V
note 1
−
−50
mA
V
VI
−0.5
−
+6.5
IOK
VO
output diode current
output voltage
VO > VCC or VO < 0 V
±50
mA
V
output HIGH or LOW state; note 1 −0.5
VCC + 0.5
+6.5
output 3-state; note 1
VO = 0 V to VCC
note 2
−0.5
−
V
IO
output source or sink current
±50
mA
mA
°C
mW
ICC, IGND VCC or GND current
−
±200
+150
1000
Tstg
Ptot
storage temperature
power dissipation
−65
−
Tamb = −40 °C to +85 °C; note 3
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. All supply and ground pins connected externally to one voltage source.
3. Above 70 °C the value of Ptot derates linearly with 1.8 mW/K.
2004 May 13
7
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
DC CHARACTERISTICS
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
OTHER
VCC (V)
Tamb = −40 °C to +85 °C; note 1
VIH
VIL
HIGH-level input voltage
LOW-level input voltage
1.2
VCC
−
−
−
−
−
V
2.7 to 3.6
1.2
2.0
−
−
V
V
V
GND
0.8
2.7 to 3.6
−
VOH
HIGH-level output voltage VI = VIH or VIL
IO = −100 µA
IO = −12 mA
IO = −18 mA
IO = −24 mA
2.7 to 3.6
2.7
V
V
V
V
CC − 0.2
VCC
−
−
−
−
−
V
V
V
V
CC − 0.5
CC − 0.6
CC − 0.8
3.0
−
3.0
−
VOL
LOW-level output voltage
input leakage current
VI = VIH or VIL
IO = 100 µA
IO = 12 mA
IO = 24 mA
2.7 to 3.6
2.7
−
−
−
−
GND
−
0.20
0.40
0.55
±5
V
V
3.0
−
V
ILI
VI = 5.5 V or GND;
note 2
3.6
±0.1
µA
IOZ
3-state output OFF-state
current
VI = VIH or VIL;
VO = 5.5 V or GND;
note 2
3.6
−
0.1
±5
µA
Ioff
power-off leakage supply
current
VI or VO = 5.5 V
0.0
−
−
−
0.1
0.1
5
±10
40
500
−
µA
µA
µA
µA
µA
µA
µA
ICC
quiescent supply current
VI = VCC or GND;
IO = 0 A
3.6
∆ICC
IBH
additional quiescent supply VI = VCC − 0.6 V;
current per input pin
2.7 to 3.6
3.0
IO = 0 A
bushold LOW sustaining
current
VI = 0.8 V;
notes 3 and 4
75
−
IBHH
IBHLO
IBHHO
bushold HIGH sustaining
current
VI = 2.0 V;
notes 3 and 4
3.0
−75
500
−500
−
−
bushold LOW overdrive
current
notes 3 and 5
3.6
−
−
bushold HIGH overdrive
current
notes 3 and 5
3.6
−
−
Notes
1. All typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2. For bushold parts, the bushold circuit is switched off when VI > VCC allowing 5.5 V on the input pin.
3. For data inputs only, control inputs do not have a bushold circuit.
4. The specified sustaining current at the data inputs holds the input below the specified VI level.
5. The specified overdrive current at the data input forces the data input to the opposite logic input state.
2004 May 13
8
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5 ns; CL = 50 pF; RL = 500 Ω.
CONDITIONS
WAVEFORMS
SYMBOL
PARAMETER
MIN.
TYP. MAX. UNIT
V
CC (V)
Tamb = −40 °C to +85 °C; note 1
tPHL/tPLH propagation delay nAn to nYn
see Figs 4 and 6
1.2
2.7
−
11.0
−
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.0
−
4.7
3.0 to 3.6 1.1
3.0(2) 4.1
tPZH/tPZL
3-state output enable time nOE to nYn see Figs 5 and 6
3-state output disable time nOE to nYn see Figs 5 and 6
skew
1.2
2.7
−
15.0
−
1.0
−
5.8
3.0 to 3.6 1.0
3.5(2) 4.6
tPHZ/tPLZ
1.2
2.7
−
10.0
−
1.0
−
6.2
3.0 to 3.6 1.8
3.0 to 3.6
3.7(2) 5.2
tsk(0)
−
− 1.0
Notes
1. All typical values are measured at Tamb = 25 °C.
2. These typical values are measured at VCC = 3.3 V and Tamb = 25 °C.
2004 May 13
9
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
AC WAVEFORMS
V
I
nAn input
GND
V
M
t
t
PHL
PLH
V
OH
nYn output
V
M
V
OL
mna474
VM = 1.5 V at VCC ≥ 2.7 V;
VM = 0.5 × VCC at VCC < 2.7 V;
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.4 Input nAn to output nYn propagation delay times.
V
I
nOE input
V
M
GND
t
t
PZL
PLZ
V
CC
output
LOW-to-OFF
OFF-to-LOW
V
M
V
X
V
OL
t
t
PZH
PHZ
V
OH
V
Y
output
HIGH-to-OFF
OFF-to-HIGH
V
M
GND
outputs
enabled
outputs
enabled
outputs
disabled
MNA478
VM = 1.5 V at VCC ≥ 2.7 V;
VM = 0.5 × VCC at VCC < 2.7 V;
VX = VOL + 0.3 V at VCC ≥ 2.7 V;
VX = VOL + 0.1 V at VCC < 2.7 V;
VY = VOH − 0.3 V at VCC ≥ 2.7 V;
VY = VOH − 0.1 V at VCC < 2.7 V
VOL and VOH are typical output voltage drop that occur with the output load.
Fig.5 3-state enable and disable times.
10
2004 May 13
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
V
EXT
V
CC
R
L
V
V
O
I
PULSE
GENERATOR
D.U.T.
C
R
R
L
L
T
MNA616
VEXT
tPLH/tPHL tPZH/tPHZ tPZL/tPLZ
VCC
VI
VCC
CL
RL
1.2 V
2.7 V
50 pF
50 pF
50 pF
500 Ω(1) open
GND
GND
GND
2 × VCC
2 × VCC
2 × VCC
2.7 V
2.7 V
500 Ω
500 Ω
open
open
3.0 to 3.6 V
Note
1. The circuit performs better when RL = 1000 Ω.
Definitions for test circuits:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.6 Load circuitry for switching times.
2004 May 13
11
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
PACKAGE OUTLINE
LFBGA96: plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm SOT536-1
B
A
D
ball A1
index area
A
2
A
E
A
1
detail X
e
1
C
1/2
e
y
y
v
M
M
C
C
A B
C
1
e
w
b
T
R
P
N
e
M
L
K
J
H
G
F
e
2
1/2
e
E
D
C
B
A
ball A1
index area
1
2
3
4
5
6
X
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
A
A
b
e
e
e
v
w
y
y
1
D
E
1
2
1
2
max.
0.41
0.31
1.2
0.9
0.51
0.41
5.6
5.4
13.6
13.4
mm
1.5
4
12
0.1
0.2
0.8
0.15
0.1
REFERENCES
JEDEC JEITA
OUTLINE
VERSION
EUROPEAN
PROJECTION
ISSUE DATE
IEC
00-03-04
03-02-05
SOT536-1
2004 May 13
12
Philips Semiconductors
Product specification
32-bit buffer/line driver; 5 V input/output
tolerant; 3-state
74LVCH32244A
DATA SHEET STATUS
DATA SHEET
STATUS(1)
PRODUCT
STATUS(2)(3)
LEVEL
DEFINITION
I
Objective data
Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II
Preliminary data Qualification
This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III
Product data
Production
This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
DEFINITIONS
DISCLAIMERS
Short-form specification
The data in a short-form
Life support applications
These products are not
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Right to make changes
Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
Application information
Applications that are
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.
2004 May 13
13
Philips Semiconductors – a worldwide company
Contact information
For additional information please visit http://www.semiconductors.philips.com.
Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
© Koninklijke Philips Electronics N.V. 2004
SCA76
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
R20/02/pp14
Date of release: 2004 May 13
Document order number: 9397 750 13224
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