935279416518 [NXP]
TRIPLE LINE TRANSCEIVER, PDSO16, SOL-16;
| 型号： | 935279416518 |
| 厂家： | 
NXP |
| 描述： | TRIPLE LINE TRANSCEIVER, PDSO16, SOL-16 光电二极管 |
| 文件： | 总5页 (文件大小：50K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
DESCRIPTION
PIN CONFIGURATION
The MC145406 is a silicon-gate CMOS IC that combines 3 drivers
and 3 receivers to fulfill the electrical specifications of standards
EIA-232-D and CCITT V.28. The drivers feature true TTL input
D and N Packages
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
CC
compatibility, slew-rate limited output, 300Ω power-off source
impedance, and output typically switching to within 25% of the
supply rails. The receivers can handle up to +25V while presenting
3 to 7kΩ impedance. Hysteresis in the receiver aids reception of
noisy signals. By combining both drivers and receivers in a single
CMOS chip, the MC145406 provides efficient, low-power solutions
for EIA-232-D and V.28 applications.
R
R
RX
DO1
DI1
1
1
2
2
3
3
TX
D
D
D
RX
TX
DO2
DI2
RX
TX
V
DO3
R
DI3
APPLICATIONS
GND
SS
• Modem interface
NOTE:
D = Driver
R = Receiver
• Voice/data telephone interface
• Lap-top computers
• UART interface
• Maximum slew rate = 30V/µs
• Receivers
FEATURES
• +25V input voltage range over the full supply range
• 3 to 7kΩ input impedance
• Drivers
• +5 to +12V supply range
• 300Ω power-off source impedance
• Output current limiting
• TTL compatible
• Hysteresis on input switchpoint
• General
• Very low supply currents for long battery life
• Operation is independent of power supply sequencing
ORDERING INFORMATION
DESCRIPTION
TEMPERATURE RANGE
0 to +70°C
ORDER CODE
MC145406N
MC145406D
DWG #
0406C
0171B
16-Pin Plastic Dual In-Line (DIP) Package
16-Pin Small Outline Large (SOL) Package
0 to +70°C
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNITS
V
V
Supply voltage
Supply voltage
Supply voltage
Input voltage range
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
V
V
V
CC
DD
V
SS
RX inputs
DI inputs
1-3
(V - 15) to (V + 15)
V
IR
V
1-3
SS
DD
-0.5 to (V + 0.5)
CC
DC current per pin
+100
1.0
mA
W
P
D
Power dissipation (package)
Operating temperature range
Storage temperature range
°C
°C
T
A
0 to +70
T
STG
-65 to +150
Thermal impedance
N package
D package
80
105
θ
°C/W
JA
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < V < V and GND < V
DI
DD
DO
< V . Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to V < V
< V . Unused inputs
CC
SS
TX1-3
DD
must always be tied to an appropriate logic voltage level (e.g., GND or V for DI, and V or V for RX).
CC
SS
DD
467
August 31, 1994
853-1430 13721
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
BLOCK DIAGRAM
RECEIVER
V
V
CC
CC
15k
RX
+
DO
–
5.4k
V
SS
1.0V
1.8V
V
DD
DRIVER
HYSTERESIS
V
CC
DI
+
300
TX
LEVEL
SHIFT
–
1.4V
V
SS
PIN #
SYMBOL
PIN DESCRIPTION
1
8
V
Positive power supply. The most positive power supply pin, which is typically 5 to 12 volts.
Negative power supply. The most negative power supply pin, which is typically -5 to -12 volts.
Digital power supply. The digital supply pin, which is connected to the logic power supply (maximum +5.5V).
DD
V
SS
CC
16
9
V
GND
RX , RX , RX
3
Ground. Ground return pin is typically connected to the signal ground pin of the EIA-232-D connector (Pin 7)
as well as to the logic power supply ground.
2, 4, 6
Receive Data Input. These are the EIA-232-D receive signal inputs whose voltages can range from +25 to
1
2
-25V. A voltage between +3 and +25 is decoded as a space and causes the corresponding DO pin to swing
to ground (0V); a voltage between -3 and -25V is decoded as a mark and causes the DO pin to swing up to V
.
CC
The actual turn-on input switchpoint is typically biased at 1.8V above ground, and includes 800mV of hysteresis
fornoiserejection. Thenominalinputimpedanceis5kΩ. Anopenorgroundedinputpinisinterpretedasamark,
forcing the DO pin to V
.
CC
11, 13, 15 DO1, DO2, DO3 Data Output. These are the receiver digital output pins, which swing from V to GND. A space on the RX
CC
pin causes DO to produce a logic zero; a mark produces a logic one. Each output pin is capable of driving one
LSTTL input load.
10, 12, 14
3, 5, 7
DI1, DI2, DI3
Data Input. These are the high-impedance digital input pins to the drivers. TTL compatibility is accomplished
by biasing the input switchpoint at 1.4V above ground. However, 5V CMOS compatibility is maintained as well.
Input voltage levels on these pins must be between V and GND.
CC
TX1, TX2, TX3
TransmitDataOutput. ThesearetheEIA-232-Dtransmitsignaloutputpins, whichswingtowardV andV
.
SS
DD
A logic one at a DI input causes the corresponding TX output to swing toward V . A logic zero causes the
SS
output to swing toward V (the output voltages will be slightly less than V or V depending upon the output
DD
DD
SS
load). Output slew rates are limited to a maximum of 30V/µs. When the MC145406 is off (V = V = V
DD
SS
CC
= GND), the minimum output impedance is 300Ω.
468
August 31, 1994
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
ABSOLUTE MAXIMUM RATINGS
SYMBOL
PARAMETER
RATING
UNITS
V
V
Supply voltage
Supply voltage
Supply voltage
Input voltage range
-0.5 to +6.0
-0.5 to +13.5
+0.5 to -13.5
V
V
V
CC
DD
V
SS
RX inputs
DI inputs
1-3
(V - 15) to (V + 15)
V
IR
V
1-3
SS
DD
-0.5 to (V + 0.5)
CC
DC current per pin
+100
1.0
mA
W
P
D
Power dissipation (package)
Operating temperature range
Storage temperature range
°C
°C
T
A
0 to +70
T
STG
-65 to +150
Thermal impedance
N package
D package
80
105
θ
°C/W
JA
NOTE: This device contains protection circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is
advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
For proper operation, it is recommended that the voltages at the DI and DO pins be constrained to the range GND < V < V and GND < V
DI
DD
DO
< V . Also, the voltage at the RX pin should be constrained to +25V, and TX should be constrained to V < V
< V . Unused inputs
CC
SS
TX1-3
DD
must always be tied to an appropriate logic voltage level (e.g., GND or V for DI, and V or V for RX).
CC
SS
DD
DC ELECTRICAL CHARACTERISTICS
Typical values are at T = 0 to 70°C; GND = 0V, unless otherwise specified.
A
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
UNITS
MIN
TYP
MAX
DC supply voltage
V
4.5
-4.5
4.5
5 to 12
-5 to -12
5.0
13.2
-13.2
5.5
V
V
V
DD
V
SS
CC
V
Quiescent supply current (outputs unloaded, inputs low)
I
V
= +12V
= -12V
= +5V
20
400
600
450
µA
µA
µA
DD
DD
I
V
280
260
SS
CC
SS
I
V
CC
RECEIVER ELECTRICAL CHARACTERISTICS
Typical values are at T = 0 to 70°C; GND = 0V; V = +5 to +12V; V = -5 to -12V; V = +5V +5%, unless otherwise specified.
A
DD
SS
CC
LIMITS
TYP
1.80
1.00
0.8
SYMBOL
PARAMETER
TEST CONDITIONS
UNITS
MIN
1.35
0.75
0.6
MAX
2.35
1.25
V
ON
Input turn-on threshold
Input turn-off threshold
Input threshold hysteresis
Input resistance
RX
RX
RX
RX
V
= V , V = 5.0V +5%
V
V
1-3
DO1-3
OL
CC
V
OFF
V
= V , V = 5.0V +5%
OH CC
1-3
1-3
1-3
DO1-3
V -V
ON OFF
V
CC
= 5.0V +5%
V
R
(V -15V) < V
< (V +15V)
3.0
5.0
7.0
kΩ
IN
SS
RX1-3
DD
V
OH
High level output voltage
DO
I
= -20µA, V = +5.0V
4.9
5.0
1-3
OH
CC
V
1
V
RX1-3
= -3V to (V -15V)
I
= -1mA, V = +5.0V
3.8
4.4
SS
OH
CC
I
= +20µA, V = +5.0V
0.005
0.15
0.3
0.1
0.5
0.7
OL
CC
Low level output voltage
= +3V to (V +15V)
DO
1-3
V
OL
I
= +2mA, V = +5.0V
CC
V
OL
1
V
RX1-3
DD
I
= +4mA, V = +5.0V
CC
OL
NOTE:
1. This is the range of input voltages as specified by EIA-232-D to cause a receiver to be in the high or low logic state.
469
August 31, 1994
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
DRIVER ELECTRICAL CHARACTERISTICS
Typical values are at T = 0 to 70°C; GND = 0V; V = +5V +5%, unless otherwise specified.
A
CC
LIMITS
TYP
SYMBOL
PARAMETER
TEST CONDITIONS
UNITS
MAX
MIN
V
Digital input voltage
Digital input voltage
Input current
DI
1-3
DI
1-3
DI
1-3
Logic 0
Logic 1
0.8
V
V
IL
IH
IN
V
2.0
I
V
= V
+1.0
µA
DI1-3
CC
V
V
= +5.0V, V = -5.0V
3.5
4.3
4.1
5.0
DD
SS
Output high voltage
TX
1-3
V
OH
= +6.0V, V = -6.0V
V
DD
SS
V
DI1-3
= Logic 0, R = 3.0kΩ
L
V
= +12.0V, V = -12.0V
9.2
10.4
-4.3
-5.2
-10.3
DD
SS
V
V
= +5.0V, V = -5.0V
-4.0
-4.5
-10.0
DD
DD
SS
1
Output low voltage
TX
1-3
V
OL
= +6.0V, V = -6.0V
V
SS
V
DI1-3
= Logic 0, R = 3.0kΩ
L
V
DD
= +12.0V, V = -12.0V
SS
Off source resistance
Figure 1
TX
TX
1-3
V
DD
=V =GND=0V, V = +2.0V
TX1-3
300
Ω
SS
2
I
Output short-circuit current
TX shorted to GND
+22
+60
60
+
mA
mA
SC
1-3
1-3
3
V
DD
= +12.0V, V = -12.0V
TX shorted to +15.0V
+100
SS
1-3
NOTE:
1. The voltage specifications are in terms of absolute values.
2. Specification is for one TX output pin to be shorted at a time. Should all three driver outputs be shorted simultaneously, device power dis-
sipation limits will be exceeded.
3. This condition could exceed package limitations.
SWITCHING CHARACTERISTICS
Typical values are at T = 0 to 70°C; V = +5V +5%, unless otherwise specified. (See Figures 2 and 3)
A
CC
LIMITS
TYP
SYMBOL
Drivers
PARAMETER
TEST CONDITIONS
UNITS
MIN
MAX
t
t
Propagation delay time
Propagation delay time
TX
TX
TX
Low-to-High R = 3kΩ, C = 50pF
300
300
500
500
ns
ns
PLH
PHL
1-3
1-3
1-3
L
L
High-to-Low R = 3kΩ, C = 50pF
L
L
Output slew rate
(minimum load)
R = 7kΩ, C = 0pF,
L L
+6
+30
V
DD
= 6 to 12.0V, V = -6 to -12V
SS
SR
V/µs
Output slew rate
(maximum load)
TX
R = 3kΩ, C = 2500pF,
L L
1-3
+3.0
V
DD
= 12V, V = -12V
SS
Receivers (C = 50pF)
L
t
Propagation delay time
Propagation delay time
Output rise time
DO
DO
DO
DO
Low-to-High
High-to-Low
150
150
120
40
425
425
400
100
ns
ns
ns
ns
PLH
PHL
1-3
1-3
1-3
1-3
t
t
R
t
F
Output fall time
470
August 31, 1994
Philips Semiconductors Linear Products
Product specification
EIA-232-D/V.28 driver/receiver
MC145406
defines the electrical and physical interface between Data
Communication Equipment (DCE) and Data Terminal Equipment
(DTE). A DCE is connected to a DTE using a cable that typically
carries up to 25 leads, which allow the transfer of timing, data,
control, and test signals. The MC145406 provides the necessary
level shifting between the TTL/CMOS logic levels and the high
voltage levels of EIA-232-D (ranging from +3 to +25V).
1
16
V
V
CC
DD
14
12
3
DI
TX
1
1
5
DI
TX
2
2
DRIVERS
V
= +2V
IN
As defined by the specification, an EIA-232-D driver presents a
voltage of between +5 to +15V into a load of between 3 to 7kΩ. A
logic one at the driver input results in a voltage of between -5 to
-15V. A logic zero results in a voltage between +5 to +15V. When
operating at +7 to +12V, the MC145406 meets this requirement.
When operating at +5V, the MC145406 drivers produce less than
+5V at the output (when terminated), which does not meet the
EIA-232-D specification. However, the output voltages when using
a +5V power supply are high enough (around +4V) to permit proper
reception by an EIA-232-D receiver, and can be used in applications
where strict compliance to EIA-232-D is not required.
7
10
DI
V
TX
3
3
V
SS
IN
=
R
OUT
I
8
9
Figure 1. Power-Off Source Resistance (Drivers)
DRIVERS
DI
Another requirement of the MC145406 drivers is that they withstand
a short to another driver in the EIA-232-D cable. The worst-case
condition that is permitted by EIA-232-D is a +15V source that is
current limited to 500mA. The MC145406 drivers can withstand this
condition momentarily. In most short circuit conditions the source
driver will have a series 300Ω output impedance needed to satisfy
the EIA-232-D driver requirements. This will reduce the short circuit
current to under 40mA which is an acceptable level for the
MC145406 to withstand.
3V
50%
90%
1-3
0V
t
t
F
F
V
OH
TX
1-3
t
10%
V
OL
t
PHL
PLH
Unlike some other drivers, the MC145406 drivers feature an
internally-limited output slew rate that does not exceed 30V/µs.
RECEIVERS
+3V
0V
RECEIVERS
50%
t
RX
1-3
The job of an EIA-232-D receiver is to level-shift voltages in the
range of -25 to +25V down to TTL/CMOS logic levels (0 to +5V). A
t
PHL
PLH
voltage of between -3 and -25V on RX is defined as a mark and
1
V
OH
90%
DO
produces a logic one at DO . A voltage between +3 and +25V is a
1-3
50%
10%
1
space and produces a logic zero. While receiving these signals, the
RX inputs must present a resistance between 3 and 7kΩ.
V
OL
t
t
F
F
Nominally, the input resistance of the RX inputs is 5.0kΩ.
1-3
The input threshold of the RX inputs is typically biased at 1.8V
1-3
Figure 2. Switching Characteristics
above ground (GND) with typically 800mV of hysteresis included to
improve noise immunity. The 1.8V bias forces the appropriate DO
pin to a logic one when its RX input is open or grounded as called
for in EIA-232-D specification. Notice that TTL logic levels can be
applied to the RX inputs in lieu of normal EIA-232-D signal levels.
This might be helpful in situations where access to the modem or
computer through the EIA-232-D connector is necessary with TTL
devices. However, it is important not to connect the EIA-232-D
DRIVERS
3V
–3V
3V
–3V
TX
1-3
t
t
SHL
SLH
outputs (TX ) to TTL inputs since TTL operates off +5V only, and
may be damaged by the high output voltage of the MC145406.
3V – (–3V)
–3V –3V
1
SLEW RATE (SR) =
OR
t
t
SLH
SHL
The DO outputs are to be connected to a TTL or CMOS input (such
as an input to a modem chip). These outputs will swing from V to
CC
ground, allowing the designer to operate the DO and DI pins from
the digital power supply. The TX and RX sections are independently
Figure 3. Slew Rate Characteristics
powered by V and V so that one may run logic at +5V and the
EIA-232-D signals at +12V.
DD
SS
APPLICATIONS INFORMATION
The MC145406 has been designed to meet the electrical
specifications of standards EIA-232-D/CCITT V.28 and as such,
471
August 31, 1994
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