935284847118 [NXP]

CBTLV/3B SERIES, DUAL 24-BIT DRIVER, TRUE OUTPUT, PDSO56, 4.40 MM, PLASTIC, MO-194, SOT481-1, TSSOP-56;
935284847118
型号: 935284847118
厂家: NXP    NXP
描述:

CBTLV/3B SERIES, DUAL 24-BIT DRIVER, TRUE OUTPUT, PDSO56, 4.40 MM, PLASTIC, MO-194, SOT481-1, TSSOP-56

驱动 光电二极管 输出元件 逻辑集成电路
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74CBTLV16211  
24-bit bus switch  
Rev. 6 — 15 December 2011  
Product data sheet  
1. General description  
The 74CBTLV16211 provides a dual 12-bit high-speed bus switch with separate output  
enable inputs (1OE, 2OE). The low on-state resistance of the switch allows connections to  
be made with minimal propagation delay. The switch is disabled (high-impedance  
OFF-state) when the output enable (nOE) input is HIGH.  
To ensure the high-impedance OFF-state during power-up or power-down, 1OE and 2OE  
should be tied to the VCC through a pull-up resistor. The minimum value of the resistor is  
determined by the current-sinking capability of the driver.  
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 2.3 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features and benefits  
Supply voltage range from 2.3 V to 3.6 V  
High noise immunity  
Complies with JEDEC standard:  
JESD8-5 (2.3 V to 2.7 V)  
JESD8-B/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
CDM AEC-Q100-011 revision B exceeds 1000 V  
5 switch connection between two ports  
Rail to rail switching on data I/O ports  
CMOS low power consumption  
Latch-up performance exceeds 250 mA per JESD78B Class I level A  
IOFF circuitry provides partial Power-down mode operation  
TSSOP56 packages: SOT364-1 and SOT481-2  
Specified from 40 C to +85 C and 40 C to +125 C  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature  
range  
Name  
Description  
Version  
74CBTLV16211DGG 40 C to +125 C TSSOP56 plastic thin shrink small outline package; 56 leads;  
SOT364-1  
SOT481-2  
body width 6.1 mm  
74CBTLV16211DGV 40 C to +125 C TSSOP56 plastic thin shrink small outline package; 56 leads;  
body width 4.4 mm  
4. Functional diagram  
1A0  
2
1A1  
3
1A2  
4
1A3  
5
1A4  
6
1A5  
7
1A6  
9
1A7  
10  
1A8  
11  
1A9  
12  
1A10 1A11  
13  
14  
56  
1OE  
54  
53  
52  
51  
50  
48  
47  
46  
1B7  
45  
1B8  
44  
1B9  
43  
42  
1B0  
1B1  
1B2  
1B3  
1B4  
1B5  
1B6  
1B10 1B11  
2A10 2A11  
2A0  
2A1  
2A2  
2A3  
2A4  
2A5  
2A6  
2A7  
24  
2A8  
25  
2A9  
26  
15  
16  
18  
20  
21  
22  
23  
27  
28  
55  
2OE  
41  
2B0  
40  
2B1  
39  
2B2  
37  
2B3  
36  
2B4  
35  
2B5  
34  
2B6  
33  
2B7  
32  
2B8  
31  
2B9  
30  
29  
2B10 2B11  
001aai097  
Fig 1. Logic symbol  
nAn  
nBn  
nOE  
001aai099  
Fig 2. Logic diagram (one switch)  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
2 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
5. Pinning information  
5.1 Pinning  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
n.c.  
1A0  
1A1  
1A2  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
1A9  
1A10  
1A11  
2A0  
2A1  
1OE  
2OE  
1B0  
1B1  
1B2  
1B3  
1B4  
GND  
1B5  
1B6  
1B7  
1B8  
1B9  
1B10  
1B11  
2B0  
2B1  
2B2  
GND  
2B3  
2B4  
2B5  
2B6  
2B7  
2B8  
2B9  
2B10  
2B11  
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
74CBTLV16211  
V
CC  
2A2  
GND  
2A3  
2A4  
2A5  
2A6  
2A7  
2A8  
2A9  
2A10  
2A11  
001aai100  
Fig 3. Pin configuration (SOT364-1 and SOT481-2)  
5.2 Pin description  
Table 2.  
Symbol  
n.c.  
Pin description  
Pin  
Description  
1
not connected  
1A0 to 1A11  
2A0 to 2A11  
GND  
2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 14  
15, 16, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28  
8, 19, 38, 49  
independent input or output  
independent input or output  
ground (0 V)  
VCC  
17  
supply voltage  
2B0 to 2B11  
41, 40, 39, 37, 36, 35, 34, 33, 32, 31, 30, 29  
independent input or output  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
3 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
Table 2.  
Symbol  
1B0 to 1B11  
2OE  
Pin description …continued  
Pin  
Description  
54, 53, 52, 51, 50, 48, 47, 46, 45, 44, 43, 42  
independent input or output  
55  
56  
output enable input (active-LOW)  
output enable input (active-LOW)  
1OE  
6. Functional description  
Table 3.  
Function table[1]  
Output enable input OE  
Function switch  
ON-state  
L
H
OFF-state  
[1] H = HIGH voltage level; L = LOW voltage level.  
7. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).  
Symbol  
VCC  
VI  
Parameter  
Conditions  
Min  
0.5  
0.5  
0.5  
50  
50  
-
Max  
+4.6  
+4.6  
VCC + 0.5  
-
Unit  
V
supply voltage  
[1]  
[1]  
input voltage  
V
VSW  
IIK  
switch voltage  
enable and disable mode  
VI < 0.5 V  
V
input clamping current  
switch clamping current  
switch current  
mA  
mA  
mA  
mA  
mA  
C  
ISK  
VI < 0.5 V  
-
ISW  
VSW = 0 V to VCC  
128  
+100  
-
ICC  
supply current  
-
IGND  
Tstg  
Ptot  
ground current  
100  
65  
-
storage temperature  
total power dissipation  
+150  
600  
[2]  
Tamb = 40 C to +125 C  
mW  
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.  
[2] For TSSOP56 packages: above 55 C the value of Ptot derates linearly with 8.0 mW/K.  
8. Recommended operating conditions  
Table 5.  
Symbol  
VCC  
Recommended operating conditions  
Parameter  
Conditions  
Min  
2.3  
0
Max  
3.6  
Unit  
supply voltage  
input voltage  
V
VI  
3.6  
V
VSW  
switch voltage  
ambient temperature  
enable and disable mode  
0
VCC  
+125  
200  
V
Tamb  
40  
0
C  
ns/V  
[1]  
t/V  
input transition rise and fall rate VCC = 2.3 V to 3.6 V  
[1] Applies to control signal levels.  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
4 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
9. Static characteristics  
Table 6.  
Static characteristics  
At recommended operating conditions voltages are referenced to GND (ground = 0 V).  
Symbol Parameter  
Conditions  
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit  
Min  
1.7  
2.0  
-
Typ[1]  
Max  
-
Min  
1.7  
2.0  
-
Max  
-
VIH  
VIL  
HIGH-level  
input voltage  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
-
-
-
-
-
V
-
-
V
LOW-levelinput VCC = 2.3 V to 2.7 V  
voltage  
0.7  
0.9  
1.0  
0.7  
0.9  
20  
V
VCC = 3.0 V to 3.6 V  
-
-
V
II  
input leakage  
current  
pin nOE; VI = GND to VCC  
VCC = 3.6 V  
;
-
-
A  
IS(OFF)  
IS(ON)  
IOFF  
ICC  
OFF-state  
leakage current  
VCC = 3.6 V; see Figure 4  
VCC = 3.6 V; see Figure 5  
VI or VO = 0 V to 3.6 V;  
-
-
-
-
-
-
-
-
1  
1  
-
-
-
-
20  
20  
50  
50  
A  
A  
A  
A  
ON-state  
leakage current  
power-off  
leakage current VCC = 0 V  
10  
10  
supply current VI = GND or VCC; IO = 0 A;  
VSW = GND or VCC  
VCC = 3.6 V  
;
[2]  
ICC  
additional  
pin nOE; VI = VCC 0.6 V;  
-
-
300  
-
2000  
A  
supply current VSW = GND or VCC  
;
VCC = 3.6 V  
CI  
input  
capacitance  
pin nOE; VCC = 3.3 V;  
VI = 0 V to 3.3 V  
-
-
-
0.9  
5.2  
-
-
-
-
-
-
-
-
-
pF  
pF  
pF  
CS(OFF) OFF-state  
capacitance  
VCC = 3.3 V; VI = 0 V to 3.3 V  
CS(ON)  
ON-state  
VCC = 3.3 V; VI = 0 V to 3.3 V  
14.3  
capacitance  
[1] All typical values are measured at Tamb = 25 C.  
[2] One input at 3 V, other inputs at VCC or GND.  
9.1 Test circuits  
V
CC  
V
CC  
nOE  
nBn  
nOE  
nAn  
V
V
IL  
IH  
I
I
I
s
s
s
nAn  
nBn  
A
A
A
GND  
GND  
V
V
V
V
O
l
O
l
001aam032  
001aam033  
VI = VCC or GND and VO = GND or VCC  
.
VI = VCC or GND and VO = open circuit.  
Fig 4. Test circuit for measuring OFF-state leakage  
current (one channel)  
Fig 5. Test circuit for measuring ON-state leakage  
current (one channel)  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
5 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
9.2 ON resistance  
Table 7.  
Resistance RON  
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Figure 6.  
Symbol Parameter Conditions Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit  
Min  
Typ[1]  
Max  
Min  
Max  
[2]  
RON  
ON resistance VCC = 2.3 V to 2.7 V;  
see Figure 7 to Figure 9  
ISW = 64 mA; VI = 0 V  
ISW = 24 mA; VI = 0 V  
ISW = 15 mA; VI = 1.7 V  
-
-
-
4.2  
4.2  
8.4  
8.0  
8.0  
40  
-
-
-
15.0  
15.0  
60.0  
VCC = 3.0 V to 3.6 V;  
see Figure 10 to Figure 12  
ISW = 64 mA; VI = 0 V  
ISW = 24 mA; VI = 0 V  
ISW = 15 mA; VI = 2.4 V  
-
-
-
4.0  
4.0  
6.2  
7.0  
7.0  
15  
-
-
-
11.0  
11.0  
25.5  
[1] Typical values are measured at Tamb = 25 C and nominal VCC  
.
[2] Measured by the voltage drop between the A and B terminals at the indicated current through the switch. ON-state resistance is  
determined by the lower of the voltages of the two (A or B) terminals.  
9.3 ON resistance test circuit and graphs  
001aai109  
11  
R
ON  
(Ω)  
9
7
5
3
V
SW  
V
V
CC  
(1)  
(2)  
nOE  
nAn  
V
IL  
nBn  
(3)  
(4)  
GND  
V
I
SW  
l
0
0.5  
1.0  
1.5  
2.0  
2.5  
V (V)  
I
001aam034  
RON = VSW / ISW  
.
(1) Tamb = 125 C.  
(2) Tamb = 85 C.  
(3)  
Tamb = 25 C.  
(4) Tamb = 40 C.  
Fig 6. Test circuit for measuring ON resistance  
(one channel)  
Fig 7. ON resistance as a function of input voltage;  
VCC = 2.5 V; ISW = 15 mA  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
6 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
001aai110  
001aai111  
11  
11  
R
ON  
R
ON  
(Ω)  
(Ω)  
9
7
5
3
9
7
5
3
(1)  
(2)  
(1)  
(2)  
(3)  
(4)  
(3)  
(4)  
0
0.5  
1.0  
1.5  
2.0  
2.5  
0
0.5  
1.0  
1.5  
2.0  
2.5  
V (V)  
I
V (V)  
I
(1) Tamb = 125 C.  
(2) amb = 85 C.  
(1) Tamb = 125 C.  
(2) amb = 85 C.  
T
T
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
Fig 8. ON resistance as a function of input voltage;  
VCC = 2.5 V; ISW = 24 mA  
Fig 9. ON resistance as a function of input voltage;  
VCC = 2.5 V; ISW = 64 mA  
001aai105  
001aai106  
8
8
R
ON  
R
ON  
(Ω)  
(Ω)  
6
4
2
6
4
2
(1)  
(2)  
(1)  
(2)  
(3)  
(4)  
(3)  
(4)  
0
1
2
3
4
0
1
2
3
4
V (V)  
I
V (V)  
I
(1) Tamb = 125 C.  
(2) amb = 85 C.  
(1) Tamb = 125 C.  
(2) amb = 85 C.  
T
T
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
Fig 10. ON resistance as a function of input voltage;  
VCC = 3.3 V; ISW = 15 mA  
Fig 11. ON resistance as a function of input voltage;  
VCC = 3.3 V; ISW = 24 mA  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
7 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
001aai107  
7.5  
R
ON  
(Ω)  
6.5  
5.5  
4.5  
3.5  
2.5  
(1)  
(2)  
(3)  
(4)  
0
1
2
3
4
V (V)  
I
(1)  
(2)  
T
amb = 125 C.  
amb = 85 C.  
T
(3) Tamb = 25 C.  
(4) Tamb = 40 C.  
Fig 12. ON resistance as a function of input voltage; VCC = 3.3 V; ISW = 64 mA  
10. Dynamic characteristics  
Table 8.  
Dynamic characteristics  
GND = 0 V; for test circuit see Figure 15  
Symbol Parameter Conditions  
Tamb = 40 C to +85 C Tamb = 40 C to +125 C Unit  
Min  
Typ[1]  
Max  
Min  
Max  
[2][3]  
tpd  
ten  
tdis  
propagation delay nAn to nBn or nBn to  
nAn; see Figure 13  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
-
-
-
-
0.13  
0.2  
-
-
0.2  
ns  
ns  
0.31  
[4]  
enable time  
disable time  
nOE to nAn or nBn;  
see Figure 14  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
1.0  
1.0  
2.0  
1.7  
7.0  
6.2  
1.0  
1.0  
7.8  
6.8  
ns  
ns  
[5]  
nOE to nAn or nBn;  
see Figure 14  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
1.0  
1.0  
2.6  
3.0  
7.2  
7.7  
1.0  
1.0  
8.1  
8.8  
ns  
ns  
[1] All typical values are measured at Tamb = 25 C and at nominal VCC  
.
[2] The propagation delay is the calculated RC time constant of the on-state resistance of the switch and the load capacitance, when driven  
by an ideal voltage source (zero output impedance).  
[3] tpd is the same as tPLH and tPHL  
[4] en is the same as tPZH and tPZL  
.
t
.
[5] tdis is the same as tPHZ and tPLZ  
.
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
8 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
11. Waveforms  
V
I
V
V
M
input  
0 V  
M
t
t
PLH  
PHL  
V
OH  
V
V
M
output  
M
V
OL  
001aai367  
Measurement points are given in Table 9.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 13. The data input (nAn or nBn) to output (nBn or nAn) propagation delays  
Table 9.  
Measurement points  
Supply voltage  
VCC  
Input  
VM  
Output  
VM  
VI  
tr = tf  
VX  
VY  
2.3 V to 2.7 V  
3.0 V to 3.6 V  
0.5VCC  
0.5VCC  
VCC  
VCC  
2.0 ns  
2.0 ns  
0.5VCC  
0.5VCC  
VOL + 0.15 V  
VOL + 0.3 V  
VOH 0.15 V  
VOH 0.3 V  
V
I
nOE input  
output  
V
M
GND  
t
t
PZL  
PLZ  
V
CC  
V
LOW-to-OFF  
OFF-to-LOW  
M
V
X
V
OL  
t
t
PZH  
PHZ  
V
OH  
V
Y
output  
HIGH-to-OFF  
OFF-to-HIGH  
V
M
GND  
switch  
enabled  
switch  
disabled  
switch  
enabled  
001aak860  
Measurement points are given in Table 9.  
Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.  
Fig 14. Enable and disable times  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
9 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
t
W
V
I
90 %  
negative  
pulse  
V
V
V
M
M
10 %  
0 V  
t
t
r
f
t
t
f
r
V
I
90 %  
positive  
pulse  
V
M
M
10 %  
0 V  
t
W
V
EXT  
R
V
CC  
L
V
V
O
I
G
DUT  
R
T
C
L
R
L
001aae331  
Test data is given in Table 10.  
Definitions for test circuit:  
RL = Load resistance.  
CL = Load capacitance including jig and probe capacitance.  
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.  
VEXT = External voltage for measuring switching times.  
Fig 15. Test circuit for measuring switching times  
Table 10. Test data  
Supply voltage  
VCC  
Load  
CL  
VEXT  
RL  
tPLH, tPHL  
open  
tPZH, tPHZ  
GND  
tPZL, tPLZ  
2VCC  
2.3 V to 2.7 V  
3.0 V to 3.6 V  
30 pF  
50 pF  
500   
500   
open  
GND  
2VCC  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
10 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
12. Package outline  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1 mm  
SOT364-1  
E
D
A
X
c
H
v
M
A
y
E
Z
56  
29  
Q
A
2
(A )  
3
A
A
1
pin 1 index  
θ
L
p
L
detail X  
1
28  
w
M
b
e
p
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions).  
A
(1)  
(2)  
UNIT  
A
A
A
b
c
D
E
e
H
E
L
L
p
Q
v
w
y
Z
θ
1
2
3
p
max.  
8o  
0o  
0.15  
0.05  
1.05  
0.85  
0.28  
0.17  
0.2  
0.1  
14.1  
13.9  
6.2  
6.0  
8.3  
7.9  
0.8  
0.4  
0.50  
0.35  
0.5  
0.1  
mm  
1.2  
0.5  
1
0.25  
0.25  
0.08  
0.1  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
99-12-27  
03-02-19  
SOT364-1  
MO-153  
Fig 16. Package outline SOT364-1 (TSSOP56)  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
11 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 4.4 mm  
SOT481-2  
E
A
D
X
c
y
H
E
v
M
A
Z
29  
56  
A
(A )  
3
2
A
A
1
pin 1 index  
θ
L
p
L
detail X  
1
28  
w
M
b
p
e
0
2.5  
5 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
(1)  
(2)  
(1)  
UNIT  
A
A
A
b
c
D
E
e
H
L
L
p
v
w
y
Z
θ
1
2
3
p
E
max.  
8o  
0o  
0.15  
0.05  
1.05  
0.80  
0.23  
0.13  
0.20  
0.09  
11.4  
11.2  
4.5  
4.3  
6.6  
6.2  
0.75  
0.45  
0.4  
0.1  
mm  
1.2  
0.4  
0.25  
1
0.2  
0.07  
0.08  
Notes  
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.  
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.  
REFERENCES  
OUTLINE  
EUROPEAN  
PROJECTION  
ISSUE DATE  
VERSION  
IEC  
JEDEC  
JEITA  
01-11-24  
SOT481-2  
- - -  
MO-194  
- - -  
Fig 17. Package outline SOT481-2 (TSSOP56)  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
12 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
13. Abbreviations  
Table 11. Abbreviations  
Acronym  
CDM  
Description  
Charged Device Model  
Complementary Metal-Oxide Semiconductor  
Device Under Test  
CMOS  
DUT  
ESD  
ElectroStatic Discharge  
Human Body Model  
HBM  
MM  
Machine Model  
14. Revision history  
Table 12. Revision history  
Document ID  
Release date  
20111215  
Data sheet status  
Change notice  
Supersedes  
74CBTLV16211 v.6  
Modifications:  
Product data sheet  
-
74CBTLV16211 v.5  
Legal pages updated.  
74CBTLV16211 v.5  
74CBTLV16211 v.4  
74CBTLV16211 v.3  
74CBTLV16211 v.2  
74CBTLV16211 v.1  
20101230  
20100816  
20100112  
20090826  
20080620  
Product data sheet  
-
-
-
-
-
74CBTLV16211 v.4  
74CBTLV16211 v.3  
74CBTLV16211 v.2  
74CBTLV16211 v.1  
-
Product data sheet  
Product data sheet  
Product data sheet  
Product data sheet  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
13 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
15. Legal information  
15.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
malfunction of an NXP Semiconductors product can reasonably be expected  
15.2 Definitions  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors products in such equipment or applications and  
therefore such inclusion and/or use is at the customer’s own risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
15.3 Disclaimers  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
Suitability for use — NXP Semiconductors products are not designed,  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
14 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
15.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
16. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
74CBTLV16211  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 6 — 15 December 2011  
15 of 16  
74CBTLV16211  
NXP Semiconductors  
24-bit bus switch  
17. Contents  
1
2
3
4
General description. . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits . . . . . . . . . . . . . . . . . . . . 1  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2  
5
5.1  
5.2  
Pinning information. . . . . . . . . . . . . . . . . . . . . . 3  
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3  
6
7
8
Functional description . . . . . . . . . . . . . . . . . . . 4  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Recommended operating conditions. . . . . . . . 4  
9
Static characteristics. . . . . . . . . . . . . . . . . . . . . 5  
Test circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
ON resistance. . . . . . . . . . . . . . . . . . . . . . . . . . 6  
ON resistance test circuit and graphs. . . . . . . . 6  
9.1  
9.2  
9.3  
10  
11  
12  
13  
14  
Dynamic characteristics . . . . . . . . . . . . . . . . . . 8  
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 13  
15  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 14  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 14  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
15.1  
15.2  
15.3  
15.4  
16  
17  
Contact information. . . . . . . . . . . . . . . . . . . . . 15  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2011.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 15 December 2011  
Document identifier: 74CBTLV16211  

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