935314087574 [NXP]
Microcontroller;型号: | 935314087574 |
厂家: | NXP |
描述: | Microcontroller 微控制器 外围集成电路 |
文件: | 总39页 (文件大小:851K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Document Number: QFN_Addendum
Rev. 0, 07/2014
Freescale Semiconductor
Addendum
Addendum for New QFN
Package Migration
This addendum provides the changes to the 98A case outline numbers for products covered in this book.
Case outlines were changed because of the migration from gold wire to copper wire in some packages. See
the table below for the old (gold wire) package versus the new (copper wire) package.
To view the new drawing, go to Freescale.com and search on the new 98A package number for your
device.
For more information about QFN package use, see EB806: Electrical Connection Recommendations for
the Exposed Pad on QFN and DFN Packages.
© Freescale Semiconductor, Inc., 2014. All rights reserved.
Original (gold wire)
package document number package document number
Current (copper wire)
Part Number
Package Description
48 QFN
MC68HC908JW32
MC9S08AC16
MC9S908AC60
MC9S08AC128
MC9S08AW60
MC9S08GB60A
MC9S08GT16A
MC9S08JM16
MC9S08JM60
MC9S08LL16
MC9S08QE128
MC9S08QE32
MC9S08RG60
MCF51CN128
MC9RS08LA8
MC9S08GT16A
MC9S908QE32
MC9S908QE8
MC9S08JS16
MC9S08QB8
98ARH99048A
98ASA00466D
48 QFN
32 QFN
32 QFN
32 QFN
24 QFN
98ARL10606D
98ARH99035A
98ARE10566D
98ASA00071D
98ARL10608D
98ASA00466D
98ASA00473D
98ASA00473D
98ASA00736D
98ASA00734D
MC9S08QG8
MC9S08SH8
24 QFN
24 QFN
24 QFN
16 QFN
8 DFN
98ARL10605D
98ARE10714D
98ASA00087D
98ARE10614D
98ARL10557D
98ASA00474D
98ASA00474D
98ASA00602D
98ASA00671D
98ASA00672D
MC9RS08KB12
MC9S08QG8
MC9RS08KB12
MC9S08QG8
MC9RS08KA2
6 DFN
98ARL10602D
98ASA00735D
Addendum for New QFN Package Migration, Rev. 0
2
Freescale Semiconductor
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MC9RS08KB12
Rev. 5, 1/2012
MC9RS08KB12
20-Pin SOIC
Case 751D
24-Pin QFN
MC9RS08KB12 Series
Case 1982-01
Covers:MC9RS08KB12
MC9RS08KB8
16-Pin SOIC N/B
Case 751B
16-Pin TSSOP
Case 948F
MC9RS08KB4
MC9RS08KB2
• 8-Bit RS08 Central Processor Unit (CPU)
– Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature
range of –40 °C to 85 °C
8-Pin SOIC
Case 751
8-Pin DFN
Case 1452-02
• Development Support
– Single-wire background debug interface
– Breakpoint capability to allow single breakpoint setting
during in-circuit debugging
– Subset of HC08 instruction set with added BGND
instruction
– Single Global interrupt vector
• Peripherals
• On-Chip Memory
– ADC — 12-channel, 10-bit resolution; 2.5 μs
conversion time; automatic compare function;
1.7 mV/°C temperature sensor; internal bandgap
reference channel; operation in stop; hardware trigger
– ACMP — Analog comparator; full rail-to-rail supply
operation; option to compare to fixed internal bandgap
reference voltage; can operate in stop mode
– TPM — One 2-channel timer/pulse-width modulator
module; selectable input capture, output compare, or
buffered edge- or center-aligned PWM on each channel
– IIC — Inter-integrated circuit bus module capable of
operation up to 100 kbps with maximum bus loading;
capable of higher baud rates with reduced loading
– SCI — One serial communications interface module
with optional 13-bit break; LIN extensions
– MTIM — Two 8-bit modulo timers; optional clock
sources
– Up to 12 KB flash read/program/erase over full
operating voltage and temperature,
12 KB/8 KB/4 KB/2 KB flash are optional
– Up to 254-byte random-access memory (RAM),
254-byte/126-byte RAM are optional
– Security circuitry to prevent unauthorized access to flash
contents
• Power-Saving Modes
– Wait mode — CPU shuts down; system clocks continue
to run; full voltage regulation
– Stop mode — CPU shuts down; system clocks are
stopped; voltage regulator in standby
– Wakeup from power-saving modes using RTI, KBI,
ADC, ACMP, SCI and LVD
• Clock Source Options
– Oscillator (XOSC) — Loop-control Pierce oscillator;
crystal or ceramic resonator range of 31.25 kHz to
39.0625 kHz or 1 MHz to 16 MHz
– RTI — One real-time clock with optional clock sources
– KBI — Keyboard interrupts; up to 8 ports
• Input/Output
– Internal Clock Source (ICS) — Internal clock source
module containing a frequency-locked-loop (FLL)
controlled by internal or external reference; precision
trimming of internal reference allows 0.2% resolution
and 2% deviation over temperature and voltage;
supporting bus frequencies up to 10 MHz
• System Protection
– 18 GPIOs in 24- and 20-pin packages; 14 GPIOs in 16-pin
package; 6 GPIOs in 8-pin package; including one
output-only pin and one input-only pin
– Hysteresis and configurable pullup device on all input
pins; configurable slew rate and drive strength on all
output pins
– Watchdog computer operating properly (COP) reset
with option to run from dedicated 1 kHz internal low
power oscillator
– Low-voltage detection with reset or interrupt
– Illegal opcode detection with reset
• Package Options
– MC9RS08KB12/MC9RS08KB8/MC9RS08KB4
— 24-pin QFN, 20-pin SOIC, 16-pin SOIC NB or
TSSOP
– MC9RS08KB2
– Illegal address detection with reset
– Flash-block protection
— 8-pin SOIC or DFN
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008-2012. All rights reserved.
Table of Contents
1
2
3
MCU Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Parameter Classification. . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . 7
3.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.5 ESD Protection and Latch-Up Immunity. . . . . . . . . . . . . 8
3.6 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.7 Supply Current Characteristics. . . . . . . . . . . . . . . . . . . 23
3.8 External Oscillator (XOSC) Characteristics . . . . . . . . . 26
3.9 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.9.1 Control Timing . . . . . . . . . . . . . . . . . . . . . . . . . .27
3.9.2 TPM/MTIM Module Timing . . . . . . . . . . . . . . . .28
3.10 Analog Comparator (ACMP) Electrical . . . . . . . . . . . . .28
3.11 Internal Clock Source Characteristics. . . . . . . . . . . . . .29
3.12 ADC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .29
3.13 Flash Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . .33
3.14 EMC Performance. . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
3.14.1 Radiated Emissions. . . . . . . . . . . . . . . . . . . . . .35
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36
4
5
Revision History
To provide the most up-to-date information, the revision of our documents on the World Wide Web will
be the most current. Your printed copy may be an earlier revision. To verify you have the latest information
available, refer to:
http://freescale.com/
The following revision history table summarizes changes contained in this document.
Revision
Date
Description of Changes
1
2
4/13/2009
5/22/2009
Updated on shared review comments, added package information.
Completed most of the TBDs, corrected the block diagram.
Completed all the TBDs.
Changed V
Changed SI
and added R in the Table 7.
ADC adder from stop, RTI adder from stop with 1 kHz clock source
LVD
PD
3
8/31/2009
,
DD
enabled and LVI adder from stop at 5 V in the Table 8
.
Split the 10-Bit ADC Characteristics to Table 15 and Table 16 for the V
DDAD
4
5
6/23/2011
1/30/2012
ranges.
Corrected the note 4 in the Table 8.
Added 24-pin QFN package.
Related Documentation
Find the most current versions of all documents at: http://www.freescale.com
Reference Manual (MC9RS08KB12RM)
Contains extensive product information including modes of operation, memory,
resets and interrupts, register definition, port pins, CPU, and all module
information.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
2
Freescale Semiconductor
MCU Block Diagram
1
MCU Block Diagram
The block diagram, Figure 1, shows the structure of the MC9RS08KB12 MCU.
V
V
V
V
V
V
DD
SS
REFH
REFL
DDAD
SSAD
ADP[3:0]
ADP[7:4]
ADP[11:8]
12-CH 10-BIT
ANALOG-TO-DIGITAL
CONVERTER(ADC)
ACMP+
ACMP-
ACMPO
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA2/KBIP2/SDA/RxD/ADP2
ANALOG COMPARATOR
(ACMP)
RS08 CORE
KBIP[3:0]
KBIP[7:4]
8-BIT KEYBOARD
PTA3/KBIP3/SCL/TxD/ADP3
INTERRUPT(KBI)
BDC
2
CPU
PTA4/ACMPO/BKGD/MS
TxD
RxD
1
PTA5/TCLK/RESET/V
PP
SERIAL COMMUNICATION
INTERFACE (SCI)
RS08 SYSTEM CONTROL
RESETS AND INTERRUPTS
MODES OF OPERATION
POWER MANAGEMENT
RESET
TPMCH0
TPMCH1
TCLK
2-CH TIMER/PWM
MODULE (TPM)
COP
RTI
MODULO TIMER
TCLK
TCLK
PTB0/KBIP4/RxD/ADP4
PTB1/KBIP5/TxD/ADP5
PTB2/KBIP6/ADP6
PTB3/KBIP7/ADP7
PTB4/TPMCH0
WAKEUP
LVD
(MTIM1)
USER FLASH
V
MODULO TIMER
PP
MC9RS08KB12 = 12 KB
MC9RS08KB8 = 8 KB
MC9RS08KB4 = 4 KB
MC9RS08KB2 = 2 KB
(MTIM2)
SCL
SDA
INTER-INTEGRATED
PTB5/TPMCH1
CIRCUIT MODULE (IIC)
USER RAM
MC9RS08KB12/KB8 = 254 BYTES
MC9RS08KB4/KB2 = 126 BYTES
PTB6/SDA/XTAL
PTB7/SCL/EXTAL
XTAL
20 MHz INTERNAL CLOCK
SOURCE (ICS)
EXTAL
LOW-POWER OSCILLATOR
31.25 kHz to 39.0625 kHz
1 MHz to 16 MHz
PTC0/ADP8
PTC1/ADP9
(XOSC)
PTC2/ADP10
PTC3/ADP11
V
V
DD
SS
VOLTAGE REGULATOR
NOTES:
1. PTA5/TCLK/RESET/VPP is an input-only pin when used as port pin
2. PTA4/ACMPO/BKGD/MS is an output-only pin when used as port pin
Figure 1. MC9RS08KB12 Series Block Diagram
2
Pin Assignments
This section shows the pin assignments in the packages available for the MC9RS08KB12 series.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
3
Pin Assignments
Table 1. Pin Availability by Package Pin-Count
Pin Number
<-- Lowest Priority --> Highest
24
20
16
8
Port Pin
Alt 1
Alt 2
Alt 3
Alt 4
1
2
3
—
4
3
—
4
3
VDD
—
4
NC
3
VSS
4
5
5
—
—
—
—
—
—
—
—
—
—
—
—
5
PTB7
PTB6
PTB5
PTB4
PTC3
PTC2
PTC1
PTC0
PTB3
PTB2
PTB1
PTB0
PTA3
PTA2
PTA1
PTA0
NC
SCL1
EXTAL
XTAL
5
6
6
SDA1
6
7
7
TPMCH12
TPMCH02
7
8
8
8
9
—
—
—
—
9
ADP11
9
10
11
12
13
14
15
16
17
18
19
20
—
—
—
1
ADP10
ADP9
ADP8
ADP7
ADP6
ADP5
ADP4
TxD3
10
11
12
13
14
15
16
17
18
19
20
21
22
23
KBIP7
KBIP6
KBIP5
KBIP4
KBIP3
KBIP2
KBIP1
KBIP0
10
11
12
13
14
15
16
—
—
—
1
TxD3
RxD3
SCL1
ADP3
6
SDA1
RxD3
ADP1
ADP0
ADP2
7
TPMCH12
TPMCH02
ACMP–
ACMP+
8
—
—
—
1
NC
NC
PTA5
PTA4
TCLK
RESET
MS
VPP
24
2
2
2
ACMPO
BKGD
1
IIC pins can be remapped to PTB6 and PTB7, default reset location is PTA2 and PTA3. It can be
configured only once.
2
3
TPM pins can be remapped to PTB4 and PTB5, default reset location is PTA0 and PTA1.
SCI pins can be remapped to PTA2 and PTA3, default reset location is PTB0 and PTB1. It can be
configured only once.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
4
Freescale Semiconductor
Pin Assignments
Pin 1 indicator
24 23 22 21 20 19
18
VDD
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA2/KBIP2/SDA/RxD/ADP2
PTA3/KBIP3/SCL/TxD/ADP3
PTB0/KBIP4/RxD/ADP4
1
2
17
16
15
14
13
NC
VSS
3
4
5
6
PTB7/SCL/EXTAL
PTB1/KBIP5/TxD/ADP5
PTB6/SDA/XTAL
PTB5/TPMCH1
PTB2/KBIP6/ADP6
8
9
7
10 11 12
Figure 2. MC9RS08KB12 Series 24-Pin QFN Package
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
1
20
19
18
17
16
15
14
13
PTA5/TCLK/RESET/VPP
PTA4/ACMPO/BKGD/MS
VDD
2
PTA2/KBIP2/SDA/RxD/ADP2
PTA3/KBIP3/SCL/TxD/ADP3
PTB0/KBIP4/RxD/ADP4
PTB1/KBIP5/TxD/ADP5
PTB2/KBIP6/ADP6
3
4
VSS
5
PTB7/SCL/EXTAL
PTB6/SDA/XTAL
PTB5/TPMCH1
PTB4/TPMCH0
6
7
8
PTB3/KBIP7/ADP7
9
PTC3/ADP11
PTC2/ADP10
12
11
PTC0/ADP8
PTC1/ADP9
10
Figure 3. MC9RS08KB12 Series 20-Pin SOIC Package
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
5
Electrical Characteristics
PTA5/TCLK/RESET/VPP
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA2/KBIP2/SDA/RxD/ADP2
PTA3/KBIP3/SCL/TxD/ADP3
PTB0/KBIP4/RxD/ADP4
16
15
14
13
1
2
3
4
5
6
7
8
PTA4/ACMPO/BKGD/MS
VDD
VSS
PTB7/SCL/EXTAL
PTB6/SDA/XTAL
PTB5/TPMCH1
PTB4/TPMCH0
12
11
PTB1/KBIP5/TxD/ADP5
PTB2/KBIP6/ADP6
10
9
PTB3/KBIP7/ADP7
Figure 4. MC9RS08KB12 Series 16-Pin SOIC NB/TSSOP Package
PTA5/TCLK/RESET/VPP
PTA0/KBIP0/TPMCH0/ADP0/ACMP+
8
7
6
5
1
2
3
4
PTA4/ACMPO/BKGD/MS
PTA1/KBIP1/TPMCH1/ADP1/ACMP–
PTA2/KBIP2/SDA/RxD/ADP2
PTA3/KBIP3/SCL/TxD/ADP3
VDD
VSS
Figure 5. MC9RS08KB12 Series 8-Pin SOIC/DFN Package
3
Electrical Characteristics
3.1
Introduction
This chapter contains electrical and timing specifications for the MC9RS08KB12 series of
microcontrollers available at the time of publication.
3.2
Parameter Classification
The electrical parameters shown in this supplement are guaranteed by various methods. To give the
customer a better understanding the following classification is used and the parameters are tagged
accordingly in the tables where appropriate:
Table 2. Parameter Classifications
Those parameters are guaranteed during production testing on each individual device.
P
C
Those parameters are achieved by the design characterization by measuring a statistically relevant
sample size across process variations.
Those parameters are achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted. All values shown in the typical column are within this
category.
T
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
6
Freescale Semiconductor
Electrical Characteristics
Table 2. Parameter Classifications
Those parameters are derived mainly from simulations.
D
NOTE
The classification is shown in the column labeled “C” in the parameter
tables where appropriate.
3.3
Absolute Maximum Ratings
Absolute maximum ratings are stress ratings only, and functional operation at the maxima is not
guaranteed. Stress beyond the limits specified in Table 3 may affect device reliability or cause permanent
damage to the device. For functional operating conditions, refer to the remaining tables in this chapter.
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (for instance, VSS or VDD) or the programmable pull-up
resistor associated with the pin is enabled.
Table 3. Absolute Maximum Ratings
Rating
Symbol
Value
Unit
Supply voltage
VDD
IDD
VIn
–0.3 to 5.8
120
V
mA
V
Maximum current into VDD
Digital input voltage
–0.3 to VDD + 0.3
Instantaneous maximum current
ID
±25
mA
Single pin limit (applies to all port pins)1 2 3
,
,
Storage temperature range
Tstg
–55 to 150
°C
1
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two
resistance values.
2
3
All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP pin which is internally
clamped to VSS only.
Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum
current conditions. If positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD
and could result in external power supply going out of regulation. Ensure external VDD load will shunt current greater
than maximum injection current. This will be the greatest risk when the MCU is not consuming power. Examples are:
if no system clock is present, or if the clock rate is very low which would reduce overall power consumption.
3.4
Thermal Characteristics
This section provides information about operating temperature range, power dissipation, and package
thermal resistance. Power dissipation on I/O pins is usually small compared to the power dissipation in
on-chip logic and voltage regulator circuits and it is user-determined rather than being controlled by the
MCU design. In order to take PI/O into account in power calculations, determine the difference between
actual pin voltage and VSS or VDD and multiply by the pin current for each I/O pin. Except in cases of
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
7
Electrical Characteristics
unusually high pin current (heavy loads), the difference between pin voltage and VSS or VDD will be very
small.
Table 4. Thermal Characteristics
Rating
Symbol
Value
Unit
Operating temperature range (packaged)
TL to TH
–40 to 85
TA
°C
Maximum junction temperature
Thermal resistance 24-pin QFN
Thermal resistance 20-pin SOIC
Thermal resistance 16-pin SOIC NB
Thermal resistance 16-pin TSSOP
Thermal resistance 8-pin SOIC
Thermal resistance 8-pin DFN
TJMAX
θJA
150
113
83
°C
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θJA
θJA
103
29
θJA
θJA
150
110
θJA
The average chip-junction temperature (TJ) in °C can be obtained from:
T = T + (P × θ )
JA
Eqn. 1
J
A
D
where:
TA = Ambient temperature, °C
θJA = Package thermal resistance, junction-to-ambient, °C /W
PD = Pint + PI/O
Pint = IDD × VDD, Watts chip internal power
PI/O = Power dissipation on input and output pins user determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ
(if PI/O is neglected) is:
P = K ÷ (T + 273°C)
Eqn. 2
D
J
Solving Equation 1 and Equation 2 for K gives:
2
K = P × (T + 273°C) + θ × (PD)
Eqn. 3
D
A
JA
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving Equation 1 and Equation 2 iteratively for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
8
Freescale Semiconductor
Electrical Characteristics
During the device qualification ESD stresses were performed for the human body model (HBM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
Table 5. ESD and Latch-Up Test Conditions
Model
Description
Series resistance
Symbol
Value
Unit
R1
C
1500
100
1
Ω
pF
—
V
Human
body
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
—
—
—
–2.5
7.5
Latch-up
V
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
9
Electrical Characteristics
No.
Table 6. ESD and Latch-Up Protection Characteristics
Rating1
Symbol
Min
Max
Unit
1
2
Human body model (HBM)
Charge device model (CDM)
Latch-up current at TA = 85 °C
VHBM
VCDM
ILAT
±2000
±500
±100
—
—
—
V
V
3
mA
1
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
3.6
DC Characteristics
This section includes information about power supply requirements, I/O pin characteristics, and power
supply current in various operating modes.
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient)
No.
C
Parameter
Symbol
Min
Typical
Max
Unit
Supply voltage (run, wait and stop modes.)
0 < fBus <10 MHz
1
—
VDD
1.8
—
5.5
V
Minimum RAM retention supply voltage applied to
VDD
2
3
C
P
VRAM
0.81
—
—
V
V
Low-voltage detection threshold
(VDD falling)
VLVD
1.80
1.88
1.86
1.94
1.95
2.05
(VDD rising)
1
4
5
C
C
Power on RESET (POR) voltage
VPOR
0.9
—
—
1.7
—
V
V
Input high voltage (VDD > 2.3V) (all digital inputs)
VIH
VIH
VIL
VIL
0.70 × VDD
Input high voltage (1.8 V ≤ VDD ≤ 2.3 V) (all digital
inputs)
6
7
C
C
C
C
P
0.85 × VDD
—
—
—
0.30 × VDD
0.30 × VDD
—
V
V
Input low voltage (VDD > 2.3 V) (all digital inputs)
—
Input low voltage (1.8 V ≤ VDD ≤ 2.3 V)
(all digital inputs)
8
—
0.06 × VDD
—
—
V
1
9
Input hysteresis (all digital inputs)
Vhys
—
V
Input leakage current (per pin)
VIn = VDD or VSS, all input only pins
10
|IIn
|
0.025
1.0
μA
High impedance (off-state) leakage current (per
pin)
11
P
|IOZ
|
—
0.025
1.0
μA
VIn = VDD or VSS, all input/output
12
13
P
P
Internal pullup resistors2(all port pins)
Internal pulldown resistors2(all port pins)
RPU
RPD
20
20
45
45
65
65
kΩ
kΩ
Output high voltage — Low drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
—
—
—
—
—
—
VDD – 0.8
1.8 V, ILoad = 0.5 mA
14
15
C
C
VOH
V
Output high voltage — High drive (PTxDSn = 1)
5 V, ILoad = 5 mA
3 V, ILoad = 3 mA
—
—
—
—
—
—
VDD – 0.8
1.8 V, ILoad = 2 mA
Maximum total IOH for all port pins
|IOHT
|
—
—
40
mA
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
10
Freescale Semiconductor
Electrical Characteristics
Table 7. DC Characteristics (Temperature Range = –40 to 85°C Ambient) (continued)
No.
C
Parameter
Symbol
Min
Typical
Max
Unit
Output low voltage — Low drive (PTxDSn = 0)
5 V, ILoad = 2 mA
3 V, ILoad = 1 mA
—
—
—
—
—
—
0.8
1.8 V, ILoad = 0.5 mA
16
C
VOL
V
Output low voltage — High drive (PTxDSn = 1)
5 V, ILoad = 5 mA
3 V, ILoad = 3 mA
—
—
—
—
—
—
0.8
40
1.8 V, ILoad = 2 mA
17
18
19
C
C
C
Maximum total IOL for all port pins
IOLT
—
—
mA
DC injection current3 4 5 6
,
,
,
VIn < VSS, VIn > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
—
—
—
—
0.2
0.8
mA
pF
Input capacitance (all non-supply pins)
CIn
—
—
7
1
2
3
This parameter is characterized and not tested on each device.
Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
All functional non-supply pins are internally clamped to VSS and VDD except the RESET/VPP which is internally clamped to
VSS only.
4
5
6
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate
resistance values for positive and negative clamp voltages, then use the larger of the two values.
This parameter is characterized and not tested on each device.
VOH vs. IOH (High Drive) at Vdd=5.5V
5.60
5.40
5.20
85C
5.00
25C
4.80
-40C
4.60
4.40
4.20
1
2
3
4
5
6
7
8
9
11 13 15 17
IOH (mA)
Figure 6. Typical V vs. I
OH
OH
V
= 5.5 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
11
Electrical Characteristics
VOH vs. IOH (Low Drive) at Vdd=5.5V
6.00
5.00
4.00
3.00
2.00
1.00
0.00
85C
25C
-40C
1
2
3
4
5
6
IOH (mA)
Figure 7. Typical V vs. I
OH
OH
V
= 5.5 V (Low Drive)
DD
VOH vs. IOH (High Drive) at Vdd=3.0V
3.50
3.00
2.50
2.00
1.50
1.00
0.50
0.00
85C
25C
-40C
1
2
3
4
5
6
7
8
9
10
IOH (mA)
Figure 8. Typical V vs. I
OH
OH
V
= 3.0 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
12
Freescale Semiconductor
Electrical Characteristics
VOH vs. IOH (Low Drive) at Vdd=3.0V
3.00
2.50
2.00
1.50
1.00
0.50
0.00
85C
25C
-40C
1
2
IOH (mA)
Figure 9. Typical V vs. I
OH
OH
V
= 3.0 V (Low Drive)
DD
VOH vs. IOH (High Drive) at Vdd=1.8V
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
85C
25C
-40C
1
2
3
IOH (mA)
Figure 10. Typical V vs. I
OH
OH
V
= 1.8 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
13
Electrical Characteristics
VOH vs. IOH (Low Drive) at Vdd=1.8V
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
85C
25C
-40C
0.3
0.4
0.5
0.6
0.7
IOH (mA)
Figure 11. Typical V vs. I
OH
OH
V
= 1.8 V (Low Drive)
DD
VOL vs. IOL (High Drive) at Vdd=5.5V
800.00
700.00
600.00
500.00
400.00
300.00
200.00
100.00
0.00
VOL @85C
VOL @25C
VOL @-40C
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17
IOL (mA)
Figure 12. Typical V vs. I
OL
OL
V
= 5.5 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
14
Freescale Semiconductor
Electrical Characteristics
VOL vs. IOL (Low Drive) at Vdd=5.5V
2500.00
2000.00
1500.00
1000.00
500.00
0.00
VOL @85C
VOL @25C
VOL @-40C
1
2
3
4
5
6
7
8
9
10 11
IOL (mA)
Figure 13. Typical V vs. I
OL
OL
V
= 5.5 V (Low Drive)
DD
VOL vs. IOL (High Drive) at Vdd=3.0V
1200.00
1000.00
800.00
600.00
400.00
200.00
0.00
VOL @85C
VOL @25C
VOL @-40C
1
2
3
4
5
6
7
8
9
10 11
IOL (mA)
Figure 14. Typical V vs. I
OL
OL
V
= 3.0 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
15
Electrical Characteristics
VOL vs. IOL (Low Drive) at Vdd=3.0V
1000.00
900.00
800.00
700.00
600.00
500.00
400.00
300.00
200.00
100.00
0.00
VOL @85C
VOL @25C
VOL @-40C
1
2
3
IOL (mA)
Figure 15. Typical V vs. I
OL
OL
V
= 3.0 V (Low Drive)
DD
VOL vs. IOL (High Drive) at Vdd=1.8V
800.00
700.00
600.00
500.00
400.00
300.00
200.00
100.00
0.00
VOL @85C
VOL @25C
VOL @-40C
0.8
1
2
3
4
IOL (mA)
Figure 16. Typical V vs. I
OL
OL
V
= 1.8 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
16
Freescale Semiconductor
Electrical Characteristics
VOL vs. IOL (Low Drive) at Vdd=1.8V
400.00
350.00
300.00
250.00
200.00
150.00
100.00
50.00
VOL @85C
VOL @25C
VOL @-40C
0.00
0.1
0.2
0.3
0.4
0.5
0.6
0.7
IOL (mA)
Figure 17. Typical V vs. I
OL
OL
V
= 1.8 V (Low Drive)
DD
VOH vs. IOH (High Drive) at Vdd=5.5V
5.60
5.40
5.20
5.00
4.80
4.60
4.40
4.20
85C
25C
-40C
1
2
3
4
5
6
7
8
9
11 13 15 17
IOH (mA)
Figure 18. Typical I vs. V –V
OH
DD OH
V
= 5.5 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
17
Electrical Characteristics
IOH vs VDD-VOH (Low Drive) at VDD = 5.5 V
VDD-VOH (V)
-12
-10
-8
85C
-6
25C
- 40C
-4
-2
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Figure 19. Typical I vs. V –V
OH
DD OH
V
= 5.5 V (Low Drive)
DD
IOH vs VDD-VOH (High Drive) at VDD = 3.0 V
VDD-VOH (V)
-25
-20
-15
-10
-5
85C
25C
- 40C
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Figure 20. Typical I vs. V –V
OH
DD OH
V
= 3 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
18
Freescale Semiconductor
Electrical Characteristics
IOH vs VDD-VOH (Low Drive) at VDD = 3.0 V
VDD-VOH (V)
-5
-4.5
-4
-3.5
-3
85C
-2.5
-2
25C
- 40C
-1.5
-1
-0.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Figure 21. Typical I vs. V –V
OH
DD OH
V
= 3 V (Low Drive)
DD
IOH vs VDD-VOH (High Drive) at VDD = 1.8 V
VDD-VOH (V)
-7
-6
-5
-4
-3
-2
-1
0
85C
25C
- 40C
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Figure 22. Typical I vs. V –V
OH
DD OH
V
= 1.8 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
19
Electrical Characteristics
IOH vs VDD-VOH (Low Drive) at VDD = 1.8 V
VDD-VOH (V)
-1.4
-1.2
-1
85C
25C
- 40C
-0.8
-0.6
-0.4
-0.2
0
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
Figure 23. Typical I vs. V –V
OH
DD OH
V
= 1.8 V (Low Drive)
DD
IOL vs VOL (High Drive) at VDD = 5.5 V
60.00
50.00
40.00
30.00
20.00
10.00
0.00
85C
25C
- 40C
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
VOL (V)
Figure 24. Typical I vs. V
OL
OL
V
= 5.5 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
20
Freescale Semiconductor
Electrical Characteristics
IOL vs VOL (Low Drive) at VDD = 5.5 V
16.00
14.00
12.00
10.00
8.00
85C
25C
- 40C
6.00
4.00
2.00
0.00
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
VOL (V)
Figure 25. Typical I vs. V
OL
OL
V
= 5.5 V (Low Drive)
DD
IOL vs VOL (High Drive) at VDD = 3.0 V
20.00
18.00
16.00
14.00
12.00
10.00
8.00
85C
25C
- 40C
6.00
4.00
2.00
0.00
0.2
0.4
0.6
0.8
1
1.2
1.4
VOL (V)
Figure 26. Typical I vs. V
OL
OL
V
= 3 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
21
Electrical Characteristics
IOL vs VOL (Low Drive) at VDD = 3.0 V
6.00
5.00
4.00
3.00
2.00
1.00
0.00
85C
25C
- 40C
0.2
0.4
0.6
0.8
1
1.2
1.4
VOL (V)
Figure 27. Typical I vs. V
OL
OL
V
= 3 V (Low Drive)
DD
IOL vs VOL (High Drive) at VDD = 1.8 V
6.00
5.00
4.00
3.00
2.00
1.00
0.00
85C
25C
- 40C
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VOL (V)
Figure 28. Typical I vs. V
OL
OL
V
= 1.8 V (High Drive)
DD
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
22
Freescale Semiconductor
Electrical Characteristics
IOL vs VOL (Low Drive) at VDD = 1.8 V
1.60
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0.00
85C
25C
- 40C
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VOL (V)
Figure 29. Typical I vs. V
OL
OL
V
= 1.8 V (Low Drive)
DD
3.7
Supply Current Characteristics
Table 8. Supply Current Characteristics
N
C
Parameter
Symbol
VDD (V)
Typical
Max1
Temp. (°C)
Unit
3.45
3.48
3.53
–40
25
85
1
P
5
7
3.39
3.42
3.49
–40
25
85
Run supply current2 measured at
(fBus = 10 MHz)
2
3
4
5
6
C
C
C
T
RIDD10
3
1.80
5
—
—
—
—
—
mA
2.40
2.42
2.44
–40
25
85
0.93
0.96
0.99
–40
25
85
0.91
0.92
0.92
–40
25
85
Run supply current3 measured at
(fBus = 1.25 MHz)
RIDD1
3
mA
0.66
0.67
0.68
–40
25
85
T
1.80
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
23
Electrical Characteristics
Table 8. Supply Current Characteristics (continued)
N
C
Parameter
Symbol
VDD (V)
Typical
Max1
Temp. (°C)
Unit
841.13
859.98
873.69
–40
25
85
7
C
5
—
Wait mode supply current3
measured at
(fBus = 2.00 MHz)
840.21
850.60
846.67
–40
25
85
8
T
T
C
T
T
P
C
C
C
T
T
C
T
T
WIDD2
3
1.80
5
—
—
—
—
—
11
—
—
—
—
—
—
—
—
μA
630.64
635.10
643.67
–40
25
85
9
667.86
683.38
688.02
–40
25
85
10
11
12
13
14
15
16
17
18
19
20
21
Wait mode supply current3
measured at
(fBus = 1.00 MHz)
666.34
672.79
669.15
–40
25
85
WIDD1
SIDD
—
3
μA
μA
μA
μA
505.39
509.28
502.52
–40
25
85
1.80
5
1.15
1.40
7.67
–40
25
85
1.05
1.26
4.52
–40
25
85
Stop mode supply current
3
0.39
0.56
4.21
–40
25
85
1.80
5
128.86
140.44
154.97
–40
25
85
102.98
111.71
118.33
–40
25
85
ADC adder from stop3
3
54.77
66.33
74.42
–40
25
85
1.80
5
14.43
15.96
16.77
–40
25
85
14.37
14.72
14.45
–40
25
85
ACMP adder from stop (ACME =
1)
—
3
13.05
14.02
12.92
–40
25
85
1.80
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
24
Freescale Semiconductor
Electrical Characteristics
Table 8. Supply Current Characteristics (continued)
N
C
Parameter
Symbol
VDD (V)
Typical
Max1
Temp. (°C)
Unit
0.10
0.10
0.17
–40
25
85
22
C
5
—
0.02
0.06
0.02
–40
25
85
RTI adder from stop with 1 kHz
clock source enabled4
23
24
25
26
27
28
29
30
T
T
T
T
T
C
T
T
—
3
1.80
5
—
—
—
—
—
—
—
—
μA
0.40
0.45
0.20
–40
25
85
0.70
1.08
1.94
–40
25
85
RTI adder from stop with
32.768KHz external clock source
reference enabled
0.56
0.56
0.62
–40
25
85
—
3
μA
0.70
0.86
0.50
–40
25
85
1.80
5
58.93
68.27
76.60
–40
25
85
58.89
61.98
63.45
–40
25
85
LVI adder from stop
(LVDE = 1 and LVDSE = 1)
—
3
μA
52.84
54.52
52.49
–40
25
85
1.80
1
Maximum value is measured at the nominal VDD voltage times 10% tolerance. Values given here are preliminary estimates
prior to completing characterization.
2
3
4
Not include any DC loads on port pins.
Required asynchronous ADC clock and LVD to be enabled.
Most customers are expected to find that auto-wakeup from stop can be used instead of the higher current wait mode. Wait
mode typical is 672.79 μA at 3 V and 509.28 μA at 1.8 V with fBus = 1 MHz.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
25
Electrical Characteristics
3.8
Num
1
External Oscillator (XOSC) Characteristics
Table 9. Oscillator Electrical Specifications (Temperature Range = –40 to 85°C Ambient)
C
Rating
Symbol
Min
Typical1 Max Unit
Oscillator crystal or resonator (EREFS = 1, ERCLKEN = 1)
Low range (RANGE = 0)
flo
fhi
fhi-hgo
fhi-lp
32
1
1
—
—
—
—
38.4 kHz
MHz
16 MHz
MHz
C
High range (RANGE = 1) FEE or FBE mode2
High range (RANGE = 1, HGO = 1) FBELP mode
High range (RANGE = 1, HGO = 0) FBELP mode
5
1
8
See crystal or resonator
manufacturer’s
2
3
D
D
Load capacitors
C1, C2
recommendation.
Feedback resistor
Low range (32 kHz to 100 kHz)
High range (1 MHz to 16 MHz)
RF
—
—
10
1
—
—
MΩ
kΩ
Series resistor
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)
High range, high gain (RANGE = 1, HGO = 1)
≥ 8 MHz
4 MHz
1 MHz
—
—
—
0
100
0
—
—
—
4
5
D
RS
—
—
—
0
0
0
0
10
20
Crystal start-up time3
t
Low range, low gain (RANGE = 0, HGO = 0)
Low range, high gain (RANGE = 0, HGO = 1)
High range, low gain (RANGE = 1, HGO = 0)4
High range, high gain (RANGE = 1, HGO = 1)4
—
—
—
—
200
400
5
—
—
—
—
CSTL-LP
t
C
D
ms
CSTL-HGO
t
CSTH-LP
t
20
CSTH-HGO
Square wave input clock frequency (EREFS = 0, ERCLKEN = 1)
6
FEE or FBE mode2
FBELP mode
fextal
0.03125
0
—
—
5
40
MHz
1
Typical data was characterized at 5.0 V, 25 °C or is recommended value.
The input clock source must be divided using RDIV to within the range of 31.25 kHz to 39.0625 kHz.
2
3
This parameter is characterized and not tested on each device. Proper PC board layout procedures must be followed to
achieve specifications.
4
4 MHz crystal.
MCU
EXTAL
XTAL
RS
RF
C1
Crystal or Resonator
C2
3.9
AC Characteristics
This section describes AC timing characteristics for each peripheral system.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
26
Freescale Semiconductor
Electrical Characteristics
3.9.1
Control Timing
Table 10. Control Timing
Num
C
Parameter
Bus frequency (tcyc = 1/fBus
Symbol
Min
Typical
Max
Unit
1
2
3
4
5
D
D
D
D
D
)
fBus
0
700
—
1000
—
10
1300
—
MHz
μs
Real time interrupt internal oscillator period
External RESET pulse width1
KBI pulse width2
tRTI
textrst
150
ns
tKBIPW
tKBIPWS
1.5 tcyc
100
—
—
ns
KBI pulse width in stop1
—
—
ns
Port rise and fall time (load = 50 pF)3
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
6
D
t
Rise, tFall
—
—
11
35
—
—
ns
1
This is the shortest pulse guaranteed to pass through the pin input filter circuitry. Shorter pulses may or may not be recognized.
2
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
3
Timing is shown with respect to 20% VDD and 80% VDD levels. Temperature range –40 °C to 85 °C.
textrst
RESET
Figure 30. Reset Timing
tKBIPWS
tKBIPW
KBI Pin
(rising or high level)
KBI Pin
(falling or low level)
tKBIPW
tKBIPWS
Figure 31. KBI Pulse Width
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
27
Electrical Characteristics
3.9.2
TPM/MTIM Module Timing
Synchronizer circuits determine the shortest input pulses that can be recognized or the fastest clock that
can be used as the optional external source to the timer counter. These synchronizers operate from the
current bus rate clock.
Table 11. TPM Input Timing
Num
C
Rating
Symbol
Min
Max
Unit
1
2
3
4
5
D
D
D
D
D
External clock frequency
External clock period
fTPMext
tTPMext
tclkh
DC
4
fBus/4
—
MHz
tcyc
tcyc
tcyc
tcyc
External clock high time
External clock low time
Input capture pulse width
1.5
1.5
1.5
—
tclkl
—
tICPW
—
tTCLK
tclkh
TCLK
tclkl
Figure 32. Timer External Clock
tICPW
TPMCHn
TPMCHn
tICPW
Figure 33. Timer Input Capture Pulse
3.10 Analog Comparator (ACMP) Electrical
Table 12. Analog Comparator Electrical Specifications
Num
C
Characteristic
Supply voltage
Symbol
Min
Typical
Max
Unit
1
2
3
4
5
6
7
8
D
P
D
C
C
C
P
C
VDD
IDDAC
VAIN
VAIO
VH
1.80
—
20
—
5.5
35
V
Supply current (active)
Analog input voltage1
—
μA
V
VSS – 0.3
VDD
40
Analog input offset voltage1
Analog Comparator hysteresis1
Analog source impedance1
Analog input leakage current
Analog Comparator initialization delay
—
3.0
—
20
9.0
—
mV
mV
kΩ
μA
μs
15.0
10
RAS
IALKG
tAINIT
—
—
1.0
1.0
—
—
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
28
Freescale Semiconductor
Electrical Characteristics
Table 12. Analog Comparator Electrical Specifications (continued)
Num
C
Characteristic
Symbol
Min
Typical
Max
Unit
Analog Comparator bandgap reference
voltage
9
P
VBG
1.1
1.208
1.3
V
1
These data are characterized but not production tested.
3.11 Internal Clock Source Characteristics
Table 13. Internal Clock Source Specifications
Num
C
Characteristic
Symbol
Min
Typical1
31.25
32.768 39.0625
Max
41.66
Unit
1
2
3
4
5
C
P
C
P
C
Average internal reference frequency — untrimmed
Average internal reference frequency — trimmed
DCO output frequency range — untrimmed
DCO output frequency range — trimmed
fint_ut
fint_t
fdco_ut
fdco_t
25
31.25
12.8
16
kHz
kHz
16
21.33
20
MHz
MHz
16.77
Resolution of trimmed DCO output frequency
at fixed voltage and temperature
Δfdco_res_t
—
—
0.2
%fdco
6
C
Total deviation of trimmed DCO output frequency
over voltage and temperature
Δfdco_t
—
—
—
—
2
1
%fdco
ms
FLL acquisition time2 3
tacquire
,
7
8
C
C
Stop recovery time (FLL wakeup to previous acquired
frequency)
t_wakeup
—
—
μs
IREFSTEN = 0
IREFSTEN = 1
100
86
1
2
3
Data in typical column was characterized at 3.0 V and 5.0 V, 25 °C or is typical recommended value.
This parameter is characterized and not tested on each device.
This specification applies to any time the FLL reference source or reference divider is changed, trim value changed or
changing from FLL disabled (FBILP) to FLL enabled (FEI, FBI).
3.12 ADC Characteristics
Table 14. 10-Bit ADC Operating Conditions
Characteristic
Conditions
Absolute
Symb
Min
Typ1
Max
Unit
Comment
Supply voltage
Input voltage
VDDAD
VADIN
CADIN
1.8
VREFL
—
—
—
5.5
VREFH
5.5
V
V
Input
4.5
pF
capacitance
Input
resistance
RADIN
—
3
5
kΩ
kΩ
Analog source
resistance
10-bit mode
RAS
External to
MCU
f
ADCK > 4MHz
—
—
—
—
5
10
fADCK < 4MHz
8-bit mode (all valid fADCK
)
—
—
10
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
29
Electrical Characteristics
Characteristic
Table 14. 10-Bit ADC Operating Conditions (continued)
Conditions
Symb
Min
Typ1
Max
Unit
Comment
ADC
conversion
clock Freq.
High speed (ADLPC=0)
Low power (ADLPC=1)
fADCK
0.4
0.4
—
—
8.0
4.0
MHz
1
Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are
for reference only and are not tested in production.
SIMPLIFIED
INPUT PIN EQUIVALENT
ZADIN
CIRCUIT
SIMPLIFIED
CHANNEL SELECT
CIRCUIT
Pad
ZAS
leakage
due to
ADC SAR
ENGINE
input
protection
RAS
RADIN
+
VADIN
–
CAS
VAS
+
–
RADIN
RADIN
RADIN
INPUT PIN
INPUT PIN
INPUT PIN
CADIN
Figure 34. ADC Input Impedance Equivalency Diagram
Table 15. 10-Bit ADC Characteristics (V
= V
, V
= V
, 2.7 V < V
< 5.5 V)
DDAD
REFH
DDAD
REFL
SSAD
C
Characteristic
Conditions
Symb
Min
Typ1
Max
Unit
Comment
T
Supply Current
ADLPC = 1
ADLSMP = 1
ADCO = 1
IDDAD
IDDAD
IDDAD
—
133
—
μA
T
T
Supply Current
ADLPC = 1
ADLSMP = 0
ADCO = 1
—
—
218
327
—
—
μA
μA
Supply Current
ADLPC = 0
ADLSMP = 1
ADCO = 1
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
30
Freescale Semiconductor
Electrical Characteristics
, 2.7 V < V < 5.5 V)
Table 15. 10-Bit ADC Characteristics (V
= V
, V
= V
REFL SSAD
REFH
DDAD
DDAD
C
Characteristic
Conditions
Symb
Min
Typ1
Max
Unit
Comment
C
Supply Current
ADLPC = 0
ADLSMP = 0
ADCO = 1
IDDAD
—
0.582
1
mA
C
D
ADC
Asynchronous
Clock Source
High Speed (ADLPC = 0)
Low Power (ADLPC = 1)
fADACK
2
3.3
2
5
MHz
tADACK =
1/fADACK
1.25
3.3
Conversion
Time (Including
sample time)
Short Sample (ADLSMP = 0)
Long Sample (ADLSMP = 1)
tADC
—
—
20
40
—
—
ADCK
cycles
See reference
manual for
conversion
time variances
Sample Time
Short Sample (ADLSMP = 0)
Long Sample (ADLSMP = 1)
10-bit mode
tADS
—
—
—
—
3.5
—
—
ADCK
cycles
D
C
23.5
±1.5
±0.7
Total
Unadjusted
Error
ETUE
±3.5
±1.5
LSB2
Includes
quantization
8-bit mode
T
Differential
Non-Linearity
10-bit mode
8-bit mode
DNL
—
—
±0.5
±0.3
±1.0
±0.5
LSB2
Monotonicity and No-Missing-Codes guaranteed
C
P
P
D
D
Integral
Non-Linearity
10-bit mode
8-bit mode
10-bit mode
8-bit mode
INL
EZS
EFS
EQ
—
—
—
—
—
—
—
—
—
—
±0.5
±0.3
±1.5
±0.5
±1
±1.0
±0.5
±2.5
±0.7
±1.5
±0.5
±0.5
±0.5
±2.5
±1
LSB2
LSB2
LSB2
LSB2
LSB2
Zero-Scale
Error
VADIN = VSSA
Full-Scale Error 10-bit mode
8-bit mode
VADIN = VDDA
±0.5
—
Quantization
Error
10-bit mode
8-bit mode
10-bit mode
8-bit mode
—
Input Leakage
Error
EIL
±0.2
±0.1
Padleakage2 *
RAS
1
2
Typical values assume VDDAD = 5.0 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference
only and are not tested in production.
Based on input pad leakage current. Refer to pad electricals.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
31
Electrical Characteristics
Table 16. 10-Bit ADC Characteristics (V
= V
, V
= V
, 1.8 V < V
< 2.7 V)
DDAD
REFH
DDAD
REFL
SSAD
C
Characteristic
Conditions
8-bit mode
Symb
Min
Typ1
Max
Unit
Comment
T
Supply Current
ADLPC = 1
ADLSMP = 1
ADCO = 1
IDDAD
IDDAD
IDDAD
IDDAD
—
88
—
μA
T
T
T
Supply Current
ADLPC = 1
ADLSMP = 0
ADCO = 1
8-bit mode
8-bit mode
8-bit mode
—
—
—
152
214
390
—
—
—
μA
μA
Supply Current
ADLPC = 0
ADLSMP = 1
ADCO = 1
Supply Current
ADLPC = 0
ADLSMP = 0
ADCO = 1
μA
C
D
ADC
Asynchronous
Clock Source
High Speed (ADLPC = 0)
Low Power (ADLPC = 1)
fADACK
2
3.3
2
5
MHz
tADACK =
1/fADACK
1.25
3.3
Conversion
Time (Including
sample time)
Short Sample (ADLSMP = 0)
Long Sample (ADLSMP = 1)
tADC
—
—
20
40
—
—
ADCK
cycles
See reference
manual for
conversion
time variances
Sample Time
Short Sample (ADLSMP = 0)
Long Sample (ADLSMP = 1)
10-bit mode
tADS
—
—
—
—
3.5
23.5
—
—
—
—
—
ADCK
cycles
D
C
Total
Unadjusted
Error
ETUE
LSB2
Includes
quantization
8-bit mode
±3.5
T
Differential
Non-Linearity
10-bit mode
8-bit mode
DNL
—
—
—
—
—
LSB2
±1.0
Monotonicity and No-Missing-Codes guaranteed
C
C
C
D
Integral
Non-Linearity
10-bit mode
8-bit mode
10-bit mode
8-bit mode
INL
EZS
EFS
EQ
—
—
—
—
—
—
—
—
—
±1.5
—
—
—
LSB2
LSB2
LSB2
LSB2
Zero-Scale
Error
—
VADIN = VSSA
±1.5
—
—
Full-Scale Error 10-bit mode
8-bit mode
—
VADIN = VDDA
±1.0
—
—
Quantization
Error
10-bit mode
8-bit mode
—
—
±0.5
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
32
Freescale Semiconductor
Electrical Characteristics
, 1.8 V < V < 2.7 V)
Table 16. 10-Bit ADC Characteristics (V
= V
, V
= V
REFL SSAD
REFH
DDAD
DDAD
C
Characteristic
Conditions
Symb
EIL
Min
Typ1
Max
Unit
Comment
D
Input Leakage
Error
10-bit mode
8-bit mode
—
—
—
—
LSB2
Padleakage2 *
RAS
±0.1
±1
1
2
Typical values assume VDDAD = 1.8 V, Temp = 25 °C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for reference
only and are not tested in production.
Based on input pad leakage current. Refer to pad electricals.
3.13 Flash Specifications
This section provides details about program/erase times and program-erase endurance for the flash
memory. For detailed information about program/erase operations, see the reference manual.
Table 17. Flash Characteristics
No.
C
Characteristic
Symbol
Min
Typical1
Max
Unit
1
2
D
D
Supply voltage for program/erase
Program/Erase voltage
VDD
VPP
2.7
—
5.5
V
V
11.8
12
12.2
V
PP current
3
C
Program
Mass erase
IVPP_prog
IVPP_erase
—
—
—
—
200
100
μA
μA
Supply voltage for read operation
0 < fBus < 10 MHz
4
D
VRead
1.8
—
5.5
V
5
6
7
P
P
C
Byte program time
tprog
tme
thv
20
500
—
—
—
—
40
—
8
μs
ms
ms
Mass erase time
Cumulative program HV time2
Total cumulative HV time
(total of tme & thv applied to device)
8
C
thv_total
—
—
2
hours
9
D
D
D
D
D
D
D
D
HVEN to program setup time
PGM/MASS to HVEN setup time
HVEN hold time for PGM
tpgs
tnvs
tnvh
tnvh1
tvps
tvph
tvrs
10
5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
μs
μs
μs
μs
ns
ns
ns
μs
10
11
12
13
14
15
16
5
HVEN hold time for MASS
100
20
20
200
1
V
PP to PGM/MASS setup time
HVEN to VPP hold time
VPP rise time3
Recovery time
trcv
Program/erase endurance
17
18
D
C
—
1000
15
—
—
—
—
cycles
years
T
L
to T
H = –40 °C to 85 °C
Data retention
tD_ret
1
2
Typicals are measured at 25 °C.
thv is the cumulative high voltage programming time to the same row before next erase. Same address can not be
programmed more than twice before next erase.
3
Fast VPP rise time may potentially trigger the ESD protection structure, which may result in over current flowing into the pad
and cause permanent damage to the pad. External filtering for the VPP power source is recommended. An example VPP
filter is shown in Figure 35.
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
Freescale Semiconductor
33
Electrical Characteristics
100 Ω
V
PP
1 nF
12 V
Figure 35. Example V Filtering
PP
tprog
Next
Data
WRITE DATA1
Data
tpgs
PGM
tnvs
tnvh
trcv
HVEN
trs
2
VPP
tvps
tvph
thv
1
2
Next Data applies if programming multiple bytes in a single row, refer to MC9RS08KB12 Series
Reference Manual.
VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 36. Flash Program Timing
tme
trcv
MASS
tnvh1
tnvs
HVEN
trs
1
VPP
tvps
tvph
1 VDD must be at a valid operating voltage before voltage is applied or removed from the VPP pin.
Figure 37. Flash Mass Erase Timing
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
34
Freescale Semiconductor
3.14 EMC Performance
Electromagnetic compatibility (EMC) performance is highly dependant on the environment in which the
MCU resides. Board design and layout, circuit topology choices, location and characteristics of external
components as well as MCU software operation all play a significant role in EMC performance. The
system designer should consult Freescale applications notes such as AN2321, AN1050, AN1263,
AN2764, and AN1259 for advice and guidance specifically targeted at optimizing EMC performance.
3.14.1 Radiated Emissions
Microcontroller radiated RF emissions are measured from 150 kHz to 1 GHz using the TEM/GTEM Cell
method in accordance with the IEC 61967-2 and SAE J1752/3 standards. The measurement is performed
with the microcontroller installed on a custom EMC evaluation board while running specialized EMC test
software. The radiated emissions from the microcontroller are measured in a TEM cell in two package
orientations (North and East).
Ordering Information
4
Ordering Information
This section contains ordering numbers for MC9RS08KB12 series devices. See below for an example of
the device numbering system.
9
KB 12 C XX
MC RS08
Status
(MC = Fully qualified)
(PC = Prototype)
Package designator (See Table 18)
Temperature range
(C = –40 °C to 85 °C)
Approximate memory size (in KB)
Memory
(9 = Flash-Based)
Core
Family
5
Package Information and Mechanical Drawings
Table 18 provides the available package types and their document numbers. The latest package
outline/mechanical drawings are available on the MC9RS08KB12 Series Product Summary pages at
http://www.freescale.com.
To view the latest drawing, either:
•
•
Click on the appropriate link in Table 18, or
Open a browser to the Freescale® website (http://www.freescale.com), and enter the appropriate
document number (from Table 18) in the “Enter Keyword” search box at the top of the page.
Table 18. Device Numbering System
Memory
Package
Device Number
Flash
RAM
Type
Designator
Document No.
24 QFN
20 SOIC WB
16 SOIC NB
16 TSSOP
8 SOIC NB
8 DFN
FK
WJ
SG
TG
SC
DC
98ASA00087D
98ASB42343B
98ASB42566B
98ASH70247A
98ASB42564B
98ARL10557D
MC9RS08KB12
MC9RS08KB8
MC9RS08KB4
12 KB
8 KB
4 KB
254 bytes
254 bytes
126 bytes
MC9RS08KB2
2 KB
126 bytes
MC9RS08KB12 Series MCU Data Sheet, Rev. 5
36
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Rev. 5
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