935323786528_技术文档

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN

Transceivers

Short data sheet: advance information

Rev. 1.0 — 14 December 2017

1 General description

The FS6500/FS4500 SMARTMOS devices are a multi-output, power supply, integrated

circuit, including CAN Flexible Data (FD) and/or LIN transceivers, dedicated to the

automotive market.

Multiple switching and linear voltage regulators, including low-power mode (32 μA) are

available with various wake-up capabilities. An advanced power management scheme

is implemented to maintain high efficiency over a wide range of input voltages (down to

2.7 V) and output current ranges (up to 2.2 A).

The FS6500/FS4500 includes configurable fail-safe/fail silent safety behavior and

features, with two fail-safe outputs, becoming a full part of a safety oriented system

partitioning, to reach a high integrity safety level (up to ASIL D).

The built-in CAN FD interface fulfills the ISO 11898-2 and -5 standards. The LIN interface

fulfills LIN protocol specifications 2.0, 2.1, 2.2, and SAEJ2602-2.

2 Features

• Battery voltage sensing and MUX output pin

• Highly flexible SMPS pre-regulator, allowing two topologies: non-inverting buck-boost

and standard buck

• Family of devices to supply MCU core from 1.0 V to 5.0 V, with SMPS (0.8 A, 1.5 A or

2.2 A) or LDO (0.5 A)

• 36 V maximum input operating voltage

• Linear voltage regulator dedicated to auxiliary functions, or to sensor supply (V_CCA

tracker or independent), 5.0 V or 3.3 V

• Linear voltage regulator dedicated to MCU A/D reference voltage or I/Os supply (V_CCA),

5.0 V or 3.3 V

• 3.3 V keep alive memory supply available in low-power mode

• Long duration timer, counting up to 6 months with 1.0 s resolution

• Multiple wake-up sources in low-power mode: CAN, LIN, IOs, LDT

• Five configurable I/Os

3 Applications

• Drive train electrification (BMS, hybrid EV and HEV, inverter, DCDC, alterno starter)

• Drive train - chassis and safety (active suspension, steering, safety domain gateway)

• Power train (EMS, TCU, gear box)

• ADAS (LDW, Radar, sensor fusion safety area)

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

4 Simplified application diagram

Figure 1.ꢀFS6500C simplified application diagram - buck boost configuration - FS1B

ꢀ

V_CORE

V_PRE

+Battery

(KL30)

VDD

VCORE_SNS FB_CORE

COMP_CORE

MCU

V_PRE

VSUP3

VSENSE

FCRBM

VCCA_E

VAUX_E

VAUX_B

VCCA_B

VCCA

V_CCA

AD ref.

voltage

V_AUX

VAUX

FS6500L

VDDIO

V_COREor

V_CCA

SELECT

V_PRE

ADC Input

Vstandby

MUX_OUT

IO_5/VKAM

CAN-5V

DEBUG

mode

MOSI

MISO

SCLK

NCS

SPI

Ignition Key

(KL15)

IO_0

INTB

NMI

To switch

IO_4

V_DDIO

RSTB

Reset

CANH

CANL

CAN BUS

TXD

RXD

CAN

LIN

VSUP3

LIN BUS

V_DDIO

TXDL

RXDL

LIN

V_DDIO

IO_3

IO_2

Fail-safe Drive

FCCU

FS0B

GNDA

GND_COM

DGND

Figure 2.ꢀFS6500L simplified application diagram - buck configuration - LIN - V_CCA=100 mA

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

2 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

Figure 3.ꢀFS4500C simplified application diagram - buck boost configuration - FS1B

5 Ordering information

5.1 Part numbers definition

MC33FSꢁcꢁ5ꢁxꢁyꢁzꢁAE/R2

Table 1.ꢀPart number breakdown

Code

Option

Variable

Description

Linear

c

4 series

V_COREtype

6 series

DCDC

x

y

0

1

2

0

1

2

3

4

N

C

L

0.5 A or 0.8 A

1.5 A

V_COREcurrent

2.2 A

none

FS1B

Functions

LDT

FS1B, LDT

LDT, VKAM ON by default

none

z

Physical interface

CAN FD

CAN FD and LIN

FS6500-FS4500SDS

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Short data sheet: advance information

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NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

5.2 Part numbers list

Table 2.ꢀOrderable part variations

Part number

Temperature

Package

FS1B

LDT

VCORE

type

VKAM on

CAN FD

LIN

Notes

(T_A)

MC33FS4500CAE

MC33FS4500LAE

MC33FS4500NAE

MC33FS4501CAE

MC33FS4501NAE

MC33FS4502CAE

MC33FS4502LAE

MC33FS4502NAE

MC33FS4503CAE

MC33FS4503NAE

MC33FS6500CAE

MC33FS6500LAE

MC33FS6500NAE

MC33FS6501CAE

MC33FS6501NAE

MC33FS6502CAE

MC33FS6502LAE

MC33FS6502NAE

MC33FS6503CAE

MC33FS6503NAE

MC33FS6504LAE

MC33FS6510CAE

MC33FS6510LAE

MC33FS6510NAE

MC33FS6511CAE

MC33FS6511NAE

MC33FS6512CAE

MC33FS6512LAE

MC33FS6512NAE

MC33FS6513CAE

MC33FS6513NAE

MC33FS6514LAE

MC33FS6520CAE

MC33FS6520LAE

MC33FS6520NAE

MC33FS6521CAE

MC33FS6521NAE

MC33FS6522CAE

MC33FS6522LAE

MC33FS6522NAE

MC33FS6523CAE

MC33FS6523NAE

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0.5 A

0.8 A

1.5 A

2.2 A

Linear

by SPI

by default

by SPI

by default

by SPI

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

Linear

DC DC

48-pin LQFP

exposed pad

[1] [2]

–40 °C to 125 °C

[1] To order parts in tape and reel, add the R2 suffix to the part number.

[2] LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B is not, and vice versa. VKAM on by

default is available on certain part numbers only.

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

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NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

6 Block diagram

V_PRE

TSD

V_PRESMPS

V_CORESMPS

V_PRE

TSD

VCCA_E

VCCA_B

VCCA

VAUX_E

V_AUXLinear Regulator

V_CCALinear Regulator

VAUX_B

VAUX

V_REF

(2.5 V)

Die

Temp

V_SENSE

GNDA

V_PRE

V_SUP3

V_PRE

TSD

CAN-5V

V_CAN

Analog

Reference #1

MUX

Interface

Charge Pump

MUX_OUT

Linear Regulator

IO_0 VKAM

SELECT

Select

V_SUP3

DEBUG

INTB

OSC

Main

IO_0

IO_2

IO_3

IO_4

V2p5d

Main

Debug

VKAM

I/Os

Interface

Power Management

State Machine

NCS

5

SCLK

MOSI

MISO

SPI

Main

*

IO_5/VKAM

MISO FS

CAN/LIN diag

VDDIO

V_{SENSE_MON}

V_{SUP_MON}

*

Long

Duration

Timer

V_SUP3

Select

Debug

CAN-5V V_AUXV_CCAFB_{_CORE}

V2p5d

FS

SPI

FS

V_PRE

Voltage Regulator

SUPERVISOR

(Over & undervoltage)

VSENSE

OSC

FS

FCRBM

Analog Reference #2

FS

5

V_PRE

V_SUP3

Fail-safe Machine

RSTB

FS0B

V_SUP3

*

FS1B

V_PRE

FS1B delay

& driver

VPU_FS

CAN-5V

RXD

TXD

*

CAN Flexible Data Interface

CANH

CANL

GND_COM

RXDL

TXDL

*

LIN Interface

LIN

Part Number dependent

*

Fail-safe logic & supply

Figure 4.ꢀFS6500/FS4500 with CAN and LIN simplified internal block diagram

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

5 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

7 Pinning information

7.1 Pinning

VSUP1

1

36

BOOT_CORE

SW_CORE

VCORE_SNS

COMP_CORE

FB_CORE

VSUP2

VSENSE

VSUP3

2

3

35

34

4

5

33

32

FS1B

GND_COM

SELECT

6

7

8

9

31

30

29

28

CAN_5V

CANH

VDDIO

INTB

NCS

CANL

IO_4

10

27

SCLK

MOSI

IO_5/VKAM

11

12

26

25

IO_0

MISO

Figure 5.ꢀFS6500 pinout with CAN and FS1B

VSUP1

1

36

BOOT_CORE

SW_CORE

VCORE_SNS

COMP_CORE

FB_CORE

VSUP2

VSENSE

VSUP3

2

3

35

34

4

5

33

32

LIN

GND_COM

SELECT

6

7

8

9

31

30

29

28

CAN_5V

CANH

VDDIO

INTB

CANL

NCS

IO_4

10

27

SCLK

MOSI

MISO

IO_5/VKAM

11

12

26

25

IO_0

Figure 6.ꢀFS6500 pinout with CAN and LIN

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

6 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

VSUP1

1

36

BOOT_CORE

SW_CORE

VCORE_SNS

COMP_CORE

FB_CORE

VSUP2

VSENSE

VSUP3

2

3

35

34

4

5

33

32

NC

GND_COM

SELECT

6

7

8

9

31

30

29

28

CAN_5V

NC

VDDIO

INTB

NCS

NC

IO_4

10

27

SCLK

MOSI

IO_5/VKAM

11

12

26

25

IO_0

MISO

Figure 7.ꢀFS6500 pinout without CAN, without LIN

VSUP1

1

36

NC

VSUP2

VSENSE

VSUP3

2

3

35

34

VCORE

VCORE_SNS

NC

4

5

33

32

FS1B

FB_CORE

SELECT

GND_COM

6

7

8

9

31

30

29

28

CAN_5V

CANH

VDDIO

INTB

NCS

CANL

IO_4

10

27

SCLK

MOSI

IO_5/VKAM

11

12

26

25

IO_0

MISO

Figure 8.ꢀFS4500 pinout with CAN and FS1B

7.2 Pin description

Table 3.ꢀ FS6500/FS4500 pin definition

Symbol

Type

Definition

1

VSUP1

A_IN

Power supply of the device. An external reverse battery protection diode in series is

mandatory.

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

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NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

Symbol

Type

Definition

2

VSUP2

A_IN

Second power supply. Protected by the external reverse battery protection diode used

for VSUP1. VSUP1 and VSUP2 must be connected together externally.

3

4

VSENSE

VSUP3

A_IN

Sensing of the battery voltage. Must be connected prior to the reverse battery

protection diode.

Third power supply dedicated to the device supply. Protected by the external reverse

battery protection diode used for VSUP1. Must be connected between the reverse

protection diode and the input PI filter.

LIN

A_IN/OUT

D_OUT

LIN single-wire bus transmitter and receiver

or FS1B

Second output of the safety block (active low). The pin is asserted low at start-up and

when a fault condition is detected, with a configurable delay or duration versus FS0B

output terminal. Open drain structure.

5

LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B is not,

and vice versa. If neither LIN, nor FS1B functions are used, this pin must be left open.

6

GND_COM

CAN_5V

CANH

GROUND

A_OUT

Dedicated ground for physical layers

7

Output voltage for the embedded CAN FD interface

8

A_IN/OUT

CAN output high. If CAN function is not used, this pin must be left open.

CAN output low. If CAN function is not used, this pin must be left open.

9

CANL

10

IO_4

D_IN

Can be used as digital input (load dump proof) with wake-up capability or as an output

gate driver

A_OUT

Digital input: Pin status can be read through the SPI. Can be used to monitor error

signals from another IC for safety purposes (when used in conjunction with IO_5).

Wake-up capability: Can be selectable to wake-up on edges or levels

Output gate driver: Can drive a logic level low-side NMOS transistor. Controlled by

the SPI.

IO_5/VKAM

A_IN

Can be used as digital input with wake-up capability or as an analog output providing

keep alive memory supply in low-power mode.

D_IN

Analog input: Pin status can be read through the MUX output terminal

A_OUT

Digital input: Pin status can be read through the SPI. Can be used to monitor error

signals from another IC for safety purposes (when used in conjunction with IO_4).

11

12

Wake-up capability: Can be selectable to wake-up on edges or levels

Supply output: Provide keep alive memory supply in low-power mode

VKAM can be enabled or disabled by default at power up. The differentiation is made by part numbers.

IO_0

A_IN

D_IN

Can be used as analog or digital input (load dump proof) with wake-up capability

(selectable)

Analog input: Pin status can be read through the MUX output terminal

Digital input: Pin status can be read through the SPI

Wake-up capability: Can be selectable to wake-up on edges or levels

13

14

FCRBM

FS0B

A_IN

Feedback core resistor bridge monitoring: For safety purposes, this pin is used to

monitor the middle point of a redundant resistor bridge connected on V_CORE(in parallel

to the one used to set the V_COREvoltage). If not used, this pin must be connected

directly to FB_CORE.

D_OUT

First output of the safety block (active low). The pin is asserted low at start-up and

when a fault condition is detected. Open drain structure.

15

16

17

DEBUG

AGND

D_IN

Debug mode entry input

Analog ground connection

GROUND

A_OUT

MUX_OUT

Multiplexed output to be connected to a MCU ADC. Selection of the analog parameter

is available at MUX-OUT through the SPI.

18

19

IO_2:3

D_IN

Digital input pin with wake-up capability (logic level compatible)

Digital input: Pin status can be read through the SPI. Can be used to monitor FCCU

error signals from MCU for safety purposes.

Wake-up capability: Can be selectable to wake-up on edges or levels

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

8 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

Symbol

Type

Definition

20

TXD

D_IN

Transceiver input from the MCU which controls the state of the CAN bus. Internal pull-

up to VDDIO.

If CAN function is not used, this pin must be left open.

21

22

RXD

D_OUT

Receiver output which reports the state of the CAN bus to the MCU

If CAN function is not used, this pin must be left open

Transceiver input from the MCU controlling the state of the LIN bus. Internal pull-up to

VDDIO.

TXDL

D_IN

or VPU_FS

A_OUT

Pull-up output for FS1B function

LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B is not,

and vice versa. If neither LIN, nor FS1B functions are used, this pin must be left open.

23

24

RXDL

D_OUT

Receiver output reporting the state of the LIN bus to the MCU.

If LIN function is not used, this pin must be left open.

RSTB

D_OUT

This output is asserted low when the safety block reports a failure. The main function is

to reset the MCU. Reset input voltage is also monitored in order to detect external reset

and fault condition. Open drain structure.

25

26

27

28

29

MISO

MOSI

SCLK

NCS

D_OUT

D_IN

SPI bus. Master input slave output

SPI bus. Master output slave input

SPI Bus. Serial clock

D_IN

Not chip select (active low)

INTB

D_OUT

This output pin generates a low pulse when an Interrupt condition occurs. Pulse

duration is configurable. Internal pull-up to VDDIO.

30

31

32

33

VDDIO

A_IN

D_IN

A_IN

Input voltage for MISO output buffer. Allows voltage compatibility with MCU I/Os.

Hardware selection pin for VAUX and VCCA output voltages

VCORE voltage feedback. Input of the error amplifier.

SELECT

FB_CORE

COMP_COR A_OUT

E

Compensation network. Output of the error amplifier.

For FS4500 series, this pin must be left open (NC).

34

35

VCORE_SNS A_IN

VCORE input voltage sense

SW_CORE

or VCORE

A_OUT

VCORE output switching point for FS6500 series

VCORE output voltage for FS4500 series

36

BOOT_COR A_IN/OUT

E

Bootstrap capacitor for VCORE internal NMOS gate drive.

For FS4500 series, this pin must be left open (NC).

37

38

39

40

41

42

43

44

45

46

47

48

VPRE

A_IN

VPRE input voltage sense

VAUX

A_OUT

GROUND

VAUX output voltage. External PNP ballast transistor. Collector connection

VAUX voltage regulator. External PNP ballast transistor. Base connection

VAUX voltage regulator. External PNP ballast transistor. Emitter connection

VCCA voltage regulator. External PNP ballast transistor. Emitter connection

VCCA voltage regulator. External PNP ballast transistor. Base connection

VCCA output voltage. External PNP ballast transistor. Collector connection

Low-side MOSFET gate drive for non-inverting buck-boost configuration

Digital ground connection

VAUX_B

VAUX_E

VCCA_E

VCCA_B

VCCA

GATE_LS

DGND

BOOT_PRE A_IN/OUT

Bootstrap capacitor for the VPRE internal NMOS gate drive

Second pre-regulator output switching point

SW_PRE2

SW_PRE1

A_OUT

First pre-regulator output switching point

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

9 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

8 Maximum ratings

Table 4.ꢀ Maximum ratings

All voltages are with respect to ground, unless otherwise specified. Exceeding these ratings may cause a malfunction or

permanent damage to the device.

Symbol

Electrical ratings

V_SUP1/2/3

V_SENSE

Ratings

Value

Unit

Notes

[1]

DC voltage at power supply pins

DC voltage at battery sense pin (with ext R in series mandatory)

DC voltage at SW_PRE1 and SW_PRE2 pins

DC voltage at VPRE pin

–1.0 to 40

–14 to 40

–1.0 to 40

–0.3 to 8

–1.0 to 50

–1.0 to 8

0.0 to 8

V

V_SW1,2

V_PRE

V_{GATE_LS}

V_{BOOT_PRE}

V_{SW_CORE}

V_{CORE_SNS}

V_{BOOT_CORE}

V_{FB_CORE}

V_{COMP_CORE}

V_FCRBM

V_{AUX_B,E}

V_AUX

DC voltage at Gate_LS pin

DC voltage at BOOT_PRE pin

DC voltage at SW_CORE pin

DC voltage at VCORE_SNS pin

DC voltage at BOOT_CORE pin

DC voltage at FB_CORE pin

0.0 to 15

–0.3 to 2.5

–0.3 to 8

–0.3 to 40

–2.0 to 40

–0.3 to 8

–0.3 to 40

–0.3 to 20

–0.3 to 8

DC voltage at COMP_CORE pin

DC voltage at FCRBM pin

DC voltage at VAUX_B, VAUX_E pins

DC voltage at VAUX pin

V_{CCA_B,E}

V_CCA

DC voltage at VCCA_B, VCCA_E pins

DC voltage at VCCA pin

V_DDIO

DC voltage at VDDIO pin

V_{CAN_5V}

V_{PU_FS}

DC voltage on CAN_5V pin

DC voltage at VPU_FS pin

V_FSxB

DC voltage at FS0B, FS1B pins (with ext R in series mandatory)

DC voltage at DEBUG pin

V_DEBUG

V_{IO_0,4}

DC voltage at IO_0, IO_4 pins (with ext R in series mandatory)

DC voltage at IO_5 pin

V_{IO_5}

V_KAM

DC voltage at VKAM pin

V_DIG

DC voltage at INTB, RSTB, MISO, MOSI, NCS, SCLK, MUX_OUT, RXD,

TXD, IO_2, IO_3 pins

V_SELECT

V_{BUS_CAN}

V_{BUS_LIN}

I_I_SENSE

I_{_}IO_{0, 4, 5}

DC voltage at SELECT pin

–0.3 to 8

V

DC voltage on CANL, CANH pins

DC voltage on LIN pin

–27 to 40

–18 to 40

–5.0 to 5.0

V

V_SENSEmaximum current capability

IOs maximum current capability (IO_0, IO_4, IO_5)

mA

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

10 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

Symbol

Ratings

Value

Unit

Notes

ESD voltage

[2]

Human body model (JESD22/A114) – 100 pF, 1.5 kΩ

V_ESD-HBM1

V_ESD-HBM2

V_ESD-HBM3

V_ESD-HBM4

• All pins

±2.0

±4.0

±6.0

±8.0

kV

• VSUP1,2,3, VSENSE, VAUX, IO_0,4, FS0B, FS1B, DEBUG

• CANH, CANL

• LIN

Charge device model (JESD22/C101):

V_ESD-CDM1

V_ESD-CDM2

• All pins

±500

±750

V

• Corner pins

System level ESD (gun test)

• VSUP1, 2, 3, VSENSE, VAUX, IO_0, 4, 5, FS0B, FS1B

V_ESD-GUN1

V_ESD-GUN2

330 Ω/150 pF unpowered according to IEC61000-4-2

±8.0

kV

330 Ω/150 pF unpowered according to OEM LIN, CAN, FLexray

Conformance

V_ESD-GUN3

V_ESD-GUN4

2.0 kΩ/150 pF unpowered according to ISO10605.2008

±8.0

kV

2.0 kΩ/330 pF powered according to ISO10605.2008

• CANH, CANL

V_ESD-GUN5

V_ESD-GUN6

330 Ω/150 pF unpowered according to IEC61000-4-2

±15.0

±12.0

kV

330 Ω/150 pF unpowered according to OEM LIN, CAN, FLexray

conformance

V_ESD-GUN7

V_ESD-GUN8

2.0 kΩ/150 pF unpowered according to ISO10605.2008

±15.0

±12.0

kV

2.0 kΩ/330 pF powered according to ISO10605.2008

• LIN

V_ESD-GUN9

V_ESD-GUN10

V_ESD-GUN11

V_ESD-GUN12

Thermal ratings

T_A

330 Ω/150 pF unpowered according to IEC61000-4-2:

±12.0

kV

330 Ω/150 pF unpowered according to OEM LIN, CAN, flexray conformance ±12.0

2.0 kΩ/150 pF unpowered according to ISO10605.2008

2.0 kΩ/330 pF powered according to ISO10605.2008

±12.0

Ambient temperature

Junction temperature

Storage temperature

–40 to 125

–40 to 150

–55 to 150

°C

T_J

T_STG

Thermal resistance

[3]

[4]

[5]

R_θJA

Thermal resistance junction to ambient

30

°C/W

R_θJCTOP

R_θJCBOTTOM

Thermal resistance junction to case top

Thermal resistance junction to case bottom

23.8

0.9

[1] All VSUPs (V_SUP1/2/3) must be connected to the same supply

[2] Compared to AGND

[3] Per JEDEC JESD51-6 with the board (JESD51-7) horizontal

[4] Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC - 883 Method 1012.1).

[5] Thermal resistance between the die and the solder pad on the bottom of the packaged based on simulation without any interface resistance.

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

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NXP Semiconductors

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Safety Power System Basis Chip with CAN FD and LIN Transceivers

9 Packaging

9.1 Package mechanical dimensions

Package dimensions are provided in package drawings. To find the most current

package outline drawing, go to www.nxp.com and perform a keyword search for the

drawing's document number.

Table 5.ꢀPackage mechanical dimensions

Package

Suffix

Package outline drawing number

7.0 × 7.0, 48–Pin LQFP exposed pad,

with 0.5 mm pitch, and a 4.5 × 4.5

exposed pad

AE

98ASA00173D

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

12 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

FS6500-FS4500SDS

All information provided in this document is subject to legal disclaimers.

Short data sheet: advance information

Rev. 1.0 — 14 December 2017

13 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

FS6500-FS4500SDS

All information provided in this document is subject to legal disclaimers.

Short data sheet: advance information

Rev. 1.0 — 14 December 2017

14 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

FS6500-FS4500SDS

All information provided in this document is subject to legal disclaimers.

Short data sheet: advance information

Rev. 1.0 — 14 December 2017

15 / 20

NXP Semiconductors

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Safety Power System Basis Chip with CAN FD and LIN Transceivers

10 References

The following are URLs where you can obtain information on related NXP products and

application solutions.

NXP.com support pages

AN5238

Description

URL

Hardware design and product guidelines

Quad flat package (QFP)

http://www.nxp.com/AN5238-DOWNLOAD

http://www.nxp.com/files/analog/doc/app_note/AN4388.pdf

AN4388

Power dissipation tool (Excel file)

http://www.nxp.com/files/analog/software_tools/FS6500-FS4500-power-

dissipation-calculator.xlsx

V_COREcompensation network simulation tool (CNC)

Upon demand

FMEDA

FS6500/FS4500 FMEDA

Upon demand

FS6500-FS4500SMUG

FS6500-FS4500

FS6500/FS4500 Safety Manual – user guide

https://www.nxp.com/webapp/Download?colCode=FS6500-FS4500SMUG

Power System Basis Chip with CAN Flexible Data https://www.nxp.com/webapp/Download?colCode=FS6500-FS4500

and LIN Transceivers data sheet

KITFS6522LAEEVM

FS6500 evaluation board with LIN (no FS1B)

FS4500 evaluation board with FS1B (no LIN)

FS6500 evaluation board with FS1B (no LIN)

http://www.nxp.com/KITFS6522LAEEVM

http://www.nxp.com/KITFS4503CAEEVM

http://www.nxp.com/KITFS6523CAEEVM

http://www.nxp.com/FS6500

KITFS4503CAEEVM

KITFS6523CAEEVM

FS6500 product summary page

FS4500 product summary page

http://www.nxp.com/FS4500

Analog power management home page

http://www.nxp.com/products/power-management

11 Revision history

Table 6.ꢀRevision history

Document ID

Release date

20171214

Data sheet status

Change notice

Supersedes

FS6500-FS4500SDS v.1.0

Data sheet: advance

information

—

FS6500-FS4500SDS

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Rev. 1.0 — 14 December 2017

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NXP Semiconductors

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Safety Power System Basis Chip with CAN FD and LIN Transceivers

12 Legal information

12.1 Data sheet status

Document status^[1][2]

Product status^[3]

Definition

[short] Data sheet: product preview

Development

Qualification

Production

This document contains certain information on a product under development.

NXP reserves the right to change or discontinue this product without notice.

[short] Data sheet: advance information

[short] Data sheet: technical data

This document contains information on a new product. Specifications and

information herein are subject to change without notice.

This document contains the product specification. NXP Semiconductors

reserves the right to change the detail specifications as may be required to

permit improvements in the design of its products.

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple

devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

12.2 Definitions

to the publication hereof.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes

modifications or additions. NXP Semiconductors does not give any

no representation or warranty that such applications will be suitable

representations or warranties as to the accuracy or completeness of

for the specified use without further testing or modification. Customers

information included herein and shall have no liability for the consequences

are responsible for the design and operation of their applications and

of use of such information.

products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

Short data sheet — A short data sheet is an extract from a full data sheet

design. It is customer’s sole responsibility to determine whether the NXP

with the same product type number(s) and title. A short data sheet is

Semiconductors product is suitable and fit for the customer’s applications

intended for quick reference only and should not be relied upon to contain

and products planned, as well as for the planned application and use of

detailed and full information. For detailed and full information see the

customer’s third party customer(s). Customers should provide appropriate

relevant full data sheet, which is available on request via the local NXP

design and operating safeguards to minimize the risks associated with

Semiconductors sales office. In case of any inconsistency or conflict with the

their applications and products. NXP Semiconductors does not accept any

short data sheet, the full data sheet shall prevail.

liability related to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer is

Product specification — The information and data provided in a

technical data data sheet shall define the specification of the product as

responsible for doing all necessary testing for the customer’s applications

agreed between NXP Semiconductors and its customer, unless NXP

and products using NXP Semiconductors products in order to avoid a

Semiconductors and customer have explicitly agreed otherwise in writing.

default of the applications and the products or of the application or use by

In no event however, shall an agreement be valid in which the NXP

customer’s third party customer(s). NXP does not accept any liability in this

Semiconductors product is deemed to offer functions and qualities beyond

respect.

those described in the technical data data sheet.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

12.3 Disclaimers

Limited warranty and liability — Information in this document is believed

Characteristics sections of this document is not warranted. Constant or

to be accurate and reliable. However, NXP Semiconductors does not

repeated exposure to limiting values will permanently and irreversibly affect

give any representations or warranties, expressed or implied, as to the

accuracy or completeness of such information and shall have no liability

the quality and reliability of the device.

for the consequences of use of such information. NXP Semiconductors

takes no responsibility for the content in this document if provided by an

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

information source outside of NXP Semiconductors. In no event shall NXP

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

Semiconductors be liable for any indirect, incidental, punitive, special or

agreed in a valid written individual agreement. In case an individual

consequential damages (including - without limitation - lost profits, lost

agreement is concluded only the terms and conditions of the respective

savings, business interruption, costs related to the removal or replacement

agreement shall apply. NXP Semiconductors hereby expressly objects to

of any products or rework charges) whether or not such damages are based

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

on tort (including negligence), warranty, breach of contract or any other

legal theory. Notwithstanding any damages that customer might incur for

any reason whatsoever, NXP Semiconductors’ aggregate and cumulative

liability towards customer for the products described herein shall be limited

in accordance with the Terms and conditions of commercial sale of NXP

Semiconductors.

Suitability for use in automotive applications — This NXP

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

Right to make changes — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

17 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

12.4 Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

NXP — is a trademark of NXP B.V.

SafeAssure — is a trademark of NXP B.V.

SMARTMOS — is a trademark of NXP B.V.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

18 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

Tables

Tab. 1.

Tab. 2.

Tab. 3.

Part number breakdown ....................................3

Orderable part variations ...................................4

FS6500/FS4500 pin definition ...........................7

Tab. 4.

Tab. 5.

Tab. 6.

Maximum ratings .............................................10

Package mechanical dimensions .................... 12

Revision history ...............................................16

Figures

Fig. 1.

Fig. 2.

Fig. 3.

FS6500C simplified application diagram -

Fig. 4.

FS6500/FS4500 with CAN and LIN

buck boost configuration - FS1B .......................2

FS6500L simplified application diagram -

buck configuration - LIN - VCCA =100 mA ........2

FS4500C simplified application diagram -

buck boost configuration - FS1B .......................3

simplified internal block diagram ....................... 5

FS6500 pinout with CAN and FS1B ..................6

FS6500 pinout with CAN and LIN ..................... 6

FS6500 pinout without CAN, without LIN .......... 7

FS4500 pinout with CAN and FS1B ..................7

Fig. 5.

Fig. 6.

Fig. 7.

Fig. 8.

FS6500-FS4500SDS

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Short data sheet: advance information

Rev. 1.0 — 14 December 2017

19 / 20

NXP Semiconductors

FS6500, FS4500

Safety Power System Basis Chip with CAN FD and LIN Transceivers

Contents

1

2

General description ............................................ 1

Features ............................................................... 1

3

4

5

5.1

5.2

6

Applications .........................................................1

Simplified application diagram ..........................2

Ordering information .......................................... 3

Part numbers definition ......................................3

Part numbers list ............................................... 4

Block diagram ..................................................... 5

Pinning information ............................................ 6

Pinning ...............................................................6

Pin description ...................................................7

Maximum ratings ...............................................10

Packaging .......................................................... 12

Package mechanical dimensions .................... 12

References .........................................................16

Revision history ................................................ 16

Legal information ..............................................17

7

7.1

7.2

8

9

9.1

10

11

12

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 14 December 2017

Document identifier: FS6500-FS4500SDS


型号：	935323786528
厂家：	NXP
描述：	Interface Circuit
文件：	总20页 (文件大小：734K)
中文：	中文翻译
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935323786528 [NXP]

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