A3G18H500-04SR3 [NXP]

RF Power Field-Effect Transistor;


型号：	A3G18H500-04SR3
厂家：	NXP
描述：	RF Power Field-Effect Transistor
文件：	总16页 (文件大小：302K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Document Number: A3G18H500--04S

Rev. 0, 05/2017

NXP Semiconductors

Technical Data

RF Power GaN Transistor

This 107 W asymmetrical Doherty RF power GaN transistor is designed for

cellular base station applications requiring very wide instantaneous bandwidth

capability covering the frequency range of 1805 to 1880 MHz.

A3G18H500--04SR3

This part is characterized and performance is guaranteed for applications

operating in the 1805 to 1880 MHz band. There is no guarantee of performance

when this part is used in applications designed outside of these frequencies.

1805–1880 MHz, 107 W AVG., 48 V

AIRFAST RF POWER GaN

TRANSISTOR

1800 MHz

•

Typical Doherty Single--Carrier W--CDMA Performance: V_DD= 48 Vdc,

_DQA= 200 mA, V_GSB= –5 Vdc, P_out= 107 W Avg., Input Signal

PAR = 9.9 dB @ 0.01% Probability on CCDF.

Output PAR

(dB)

ACPR

(dBc)

Frequency

1805 MHz

1840 MHz

1880 MHz

(dB)

15.3

15.4

(%)

58.4

57.7

7.1

7.0

6.7

–31.9

–33.2

–33.8

NI--780S--4L

Features

•

High terminal impedances for optimal broadband performance

Advanced high performance in--package Doherty

Able to withstand extremely high output VSWR and broadband operating

conditions

Carrier

RF /V

outA DSA

inA GSA

RF /V

inB GSB

RF /V

outB DSB

Peaking

(Top View)

Figure 1. Pin Connections

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

Table 1. Maximum Ratings

Rating

Symbol

Value

125

Unit

Vdc

°C

Drain--Source Voltage

Gate--Source Voltage

Operating Voltage

DSS

–8, 0

0 to +55

Maximum Forward Gate Current @ T = 25°C

GMAX

Storage Temperature Range

stg

–65 to +150

–55 to +150

–55 to +225

275

Case Operating Temperature Range

Operating Junction Temperature Range

°C

(1)

Absolute Maximum Junction Temperature

MAX

°C

Table 2. Thermal Characteristics

Characteristic

Symbol

(IR)

Value

Unit

(2)

Thermal Resistance by Infrared Measurement, Active Die Surface--to--Case

0.60

°C/W

Case Temperature 76°C, P = 94.2 W

(3)

Thermal Resistance by Finite Element Analysis, Junction--to--Case

(FEA)

1.02

°C/W

Case Temperature 76°C, P = 94.2 W

Table 3. ESD Protection Characteristics

Test Methodology

Class

Human Body Model (per JESD22--A114)

Charge Device Model (per JESD22--C101)

Table 4. Electrical Characteristics (T = 25°C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

Unit

(4)

Off Characteristics

Drain--Source Breakdown Voltage

—

Vdc

(BR)DSS

(V = –8 Vdc, I = 24.3 mAdc)

Carrier

Peaking

150

(V = –8 Vdc, I = 35.1 mAdc)

On Characteristics -- Side A, Carrier

Gate Threshold Voltage

–3.8

–3.6

–7.5

–3.0

—

–2.3

—

Vdc

GS(th)

(V = 10 Vdc, I = 24.3 mAdc)

Gate Quiescent Voltage

(V = 48 Vdc, I = 200 mAdc, Measured in Functional Test)

GSA(Q)

Gate--Source Leakage Current

(V = 0 Vdc, V = –5 Vdc)

mAdc

GSS

On Characteristics -- Side B, Peaking

Gate Threshold Voltage

–3.8

–7.7

–3.3

—

–2.3

—

Vdc

GS(th)

(V = 10 Vdc, I = 20 mAdc)

Gate--Source Leakage Current

(V = 0 Vdc, V = –5 Vdc)

mAdc

GSS

1. Functional operation above 225°C has not been characterized and is not implied. Operation at T

(275°C) reduces median time to failure

MAX

by an order of magnitude; operation beyond T

could cause permanent damage.

MAX

2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.nxp.com/RF and search for AN1955.

3. R

(FEA) must be used for purposes related to reliability and limitations on maximum junction temperature. MTTF may be estimated by

[A + B/(T + 273)]

the expression MTTF (hours) = 10

, where T is the junction temperature in degrees Celsius, A = –10.3 and B = 8260.

4. Each side of device measured separately.

(continued)

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

Table 4. Electrical Characteristics (T = 25°C unless otherwise noted) (continued)

Characteristic

Symbol

Min

Typ

Max

Unit

(1,2)

Functional Tests

(In NXP Doherty Test Fixture, 50 ohm system) V = 48 Vdc, I

= 200 mA, V

= –5 Vdc, P = 107 W Avg.,

DQA

GSB

out

f = 1840 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF. ACPR measured

in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset. [See note on correct biasing sequence.]

Power Gain

14.5

53.0

6.3

15.4

57.7

7.0

17.5

—

Drain Efficiency

Output Peak--to--Average Ratio @ 0.01% Probability on CCDF

Adjacent Channel Power Ratio

PAR

—

dBc

ACPR

—

–33.2

–29.0

Load Mismatch (In NXP Test Fixture, 50 ohm system) I

= 200 mA, V

= –5 Vdc, f = 1840 MHz, 12 μsec(on), 10% Duty Cycle

GSB

DQA

VSWR 10:1 at 55 Vdc, 575 W Pulsed CW Output Power

No Device Degradation

(3 dB Input Overdrive from 417 W Pulsed CW Rated Power)

(2)

Typical Performance

(In NXP Doherty Test Fixture, 50 ohm system) V = 48 Vdc, I

= 200 mA, V

= –5 Vdc, 1805–1880 MHz

GSB

DQA

Bandwidth

(3)

@ 3 dB Compression Point

P3dB

—

537

—

out

AM/PM

(Maximum value measured at the P3dB compression point across

–15

the 1805–1880 MHz bandwidth)

VBW Resonance Point

VBW

—

200

—

MHz

res

(IMD Third Order Intermodulation Inflection Point)

Gain Flatness in 75 MHz Bandwidth @ P = 107 W Avg.

—

0.3

—

out

Gain Variation over Temperature

∆G

0.009

dB/°C

(–30°C to +85°C)

Output Power Variation over Temperature

∆P1dB

—

0.004

—

dB/°C

(–30°C to +85°C)

Table 5. Ordering Information

Device

Tape and Reel Information

R3 Suffix = 250 Units, 32 mm Tape Width, 13--inch Reel

Package

A3G18H500--04SR3

NI--780S--4L

1. Part internally input matched.

2. Measurements made with device in an asymmetrical Doherty configuration.

3. P3dB = P + 7.0 dB where P is the average output power measured using an unclipped W--CDMA single--carrier input signal where

avg

output PAR is compressed to 7.0 dB @ 0.01% probability on CCDF.

NOTE: Correct Biasing Sequence for GaN Depletion Mode Transistors

Turning the device ON

1. Set V to –5 V

2. Turn on V to nominal supply voltage (48 V)

3. Increase V until I current is attained

4. Apply RF input power to desired level

Turning the device OFF

1. Turn RF power off

2. Reduce V down to –5 V

3. Reduce V down to 0 V (Adequate time must be allowed

for V to reduce to 0 V to prevent severe damage to device.)

4. Turn off V

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

DDA

C15

GGA

A3G18H500--04S

Rev. 3

C27

C28

C22

C13

C16

C25 C26

C12

C21

C18

C19

C20

C17

C23

C24

C10

C11

C30

C29

D96809

GGB

C14

DDB

Figure 2. A3G18H500--04SR3 Test Circuit Component Layout

Table 6. A3G18H500--04SR3 Test Circuit Component Designations and Values

Part

Description

10 pF Chip Capacitor

Part Number

Manufacturer

C1, C2

GQM2195C2E100JB12

ATC100B100GT500XT

GQM2195C2E150JB12

GQM2195C2ER90BB12

GQM2195C2ER80BB12

GQM2195C2ER60BB12

MCGPR63V477M13X26-RH

C3225X7S1H106K

Murata

C3, C16, C17

C4, C19

10 pF Chip Capacitor

ATC

15 pF Chip Capacitor

Murata

Multicomp

TDK

0.9 pF Chip Capacitor

0.8 pF Chip Capacitor

0.6 pF Chip Capacitor

470 μF, 63 V Electrolytic Capacitor

10 μF Chip Capacitor

C7, C21

C8, C9

C10, C11, C12, C13, C22,

C23, C24, C25, C26

C14, C15, C27, C28, C29, C30

10 μF Chip Capacitor

C5750X7S2A106M

ATC100B3R0BT500XT

GQM2195C2E1R3BB12

CRCW08053R30FKEA

C8A50Z4A

TDK

C18

C20

R1, R2

3 pF Chip Capacitor

ATC

1.3 pF Chip Capacitor

Murata

Vishay

Anaren

MTL

3.3 Ω, 1/4 W Chip Resistor

50 Ω, 8 W Termination Chip Resistor

1800-2200 MHz Band, 90°, 2 dB Directional Coupler

X3C20F1-02S

PCB

Rogers RO4350B, 0.020″, ε = 3.66

D96809

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

TYPICAL CHARACTERISTICS — 1805–1880 MHz

16.4

16.2

= 48 Vdc, P = 107 W (Avg.), I

= 200 mA, V

= –5 Vdc

out

DQA

GSB

Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth

16.0

15.8

15.6

–2.4

–2.6

–31

–32

–33

–34

–35

–36

15.4

15.2

ACPR

–2.8

–3.0

15.0

14.8

14.6

14.4

PARC

–3.2

–3.4

Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF

1760 1780 1800 1820

1840 1860 1880 1900 1920

f, FREQUENCY (MHz)

Figure 3. Single--Carrier Output Peak--to--Average Ratio Compression

(PARC) Broadband Performance @ P_out= 107 Watts Avg.

–10

= 48 Vdc, P = 10 W (PEP), I

= 200 mA

out

DQA

GSB

= –5 Vdc, Two--Tone Measurements

(f1 + f2)/2 = Center Frequency of 1840 MHz

–20

–30

–40

–50

–60

IM3--U

IM3--L

IM5--U

IM5--L

IM7--L

IM7--U

TWO--TONE SPACING (MHz)

100

500

Figure 4. Intermodulation Distortion Products

versus Two--Tone Spacing

–15

–20

–25

–30

17.0

16.5

16.0

15.5

15.0

= 48 Vdc, I

= 200 mA, V

= –5 Vdc, f = 1840 MHz

GSB

DQA

Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth

–1

–2

–3

–4

–5

–1 dB = 51.4 W

ACPR

–2 dB = 82.0 W

–35

–40

–45

PARC

–3 dB = 108.0 W

14.5

14.0

Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF

100

120

140

, OUTPUT POWER (WATTS)

out

Figure 5. Output Peak--to--Average Ratio

Compression (PARC) versus Output Power

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

TYPICAL CHARACTERISTICS — 1805–1880 MHz

= 48 Vdc, I

= 200 mA, V

= –5 Vdc

DQA

GSB

Single--Carrier W--CDMA

3.84 MHz Channel Bandwidth

–10

–20

–30

–40

–50

–60

1840 MHz 1880 MHz

1805 MHz

ACPR

1805 MHz

1840 MHz

1880 MHz

1840 MHz

1805 MHz

Input Signal PAR = 9.9 dB @ 0.01% Probability on CCDF

10 100

, OUTPUT POWER (WATTS) AVG.

500

out

Figure 6. Single--Carrier W--CDMA Power Gain, Drain

Efficiency and ACPR versus Output Power

= 48 Vdc

= 0 dBm

= 200 mA

= –5 Vdc

DQA

GSB

Gain

1350 1450 1550 1650 1750 1850 1950 2050 2150

f, FREQUENCY (MHz)

Figure 7. Broadband Frequency Response

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

Table 7. Carrier Side Load Pull Performance — Maximum Power Tuning

= 48 Vdc, I

= 250 mA, Pulsed CW, 10 μsec(on), 10% Duty Cycle

DQA

Max Output Power

P1dB

(1)

AM/PM

(°)

(Ω)

load

(Ω)

source

(Ω)

(%)

60.6

58.6

58.1

Gain (dB)

17.9

(dBm)

53.3

(W)

215

210

(MHz)

1805

1840

1880

2.56 – j6.80

3.18 – j7.25

3.88 – j7.65

2.88 + j6.46

4.22 – j7.66

4.33 – j8.32

4.43 – j8.45

–9

3.29 + j6.72

3.69 + j6.85

17.8

53.2

17.8

53.0

201

Max Output Power

P3dB

(2)

(Ω)

AM/PM

(°)

(Ω)

load

source

(Ω)

(%)

65.1

63.9

62.5

Gain (dB)

(dBm)

(W)

(MHz)

1805

1840

1880

2.56 – j6.80

2.63 + j6.74

5.40 – j8.08

5.30 – j8.38

5.88 – j9.20

16.2

54.2

265

–11

–12

3.18 – j7.25

3.88 – j7.65

3.01 + j7.11

3.52 + j7.35

16.2

54.1

54.0

256

251

(1) Load impedance for optimum P1dB power.

(2) Load impedance for optimum P3dB power.

= Measured impedance presented to the input of the device at the package reference plane.

= Impedance as measured from gate contact to ground.

= Measured impedance presented to the output of the device at the package reference plane.

source

load

Table 8. Carrier Side Load Pull Performance — Maximum Efficiency Tuning

= 48 Vdc, I

= 250 mA, Pulsed CW, 10 μsec(on), 10% Duty Cycle

DQA

Max Drain Efficiency

P1dB

(1)

AM/PM

(°)

(Ω)

load

(Ω)

source

(Ω)

(%)

71.3

70.5

68.1

Gain (dB)

(dBm)

(W)

(MHz)

1805

1840

1880

2.56 – j6.80

3.18 – j7.25

3.88 – j7.65

2.52 + j6.98

3.66 – j4.40

3.39 – j4.12

3.61 – j4.65

19.4

51.8

151

–23

–26

–25

2.81 + j7.53

3.38 + j7.76

19.6

19.5

51.0

51.1

126

130

Max Drain Efficiency

P3dB

(2)

(Ω)

AM/PM

(°)

(Ω)

load

source

(Ω)

(%)

75.4

74.3

72.2

Gain (dB)

(dBm)

(W)

(MHz)

1805

1840

1880

2.56 – j6.80

2.23 + j7.22

3.93 – j4.40

4.03 – j4.47

4.53 – j5.02

17.5

52.6

181

–29

–27

3.18 – j7.25

3.88 – j7.65

2.63 + j7.72

3.25 + j8.11

17.6

17.7

52.4

52.5

175

176

(1) Load impedance for optimum P1dB efficiency.

(2) Load impedance for optimum P3dB efficiency.

= Measured impedance presented to the input of the device at the package reference plane.

= Impedance as measured from gate contact to ground.

= Measured impedance presented to the output of the device at the package reference plane.

source

load

Input Load Pull

Tuner and Test

Circuit

Output Load Pull

Tuner and Test

Circuit

Device

Under

Test

load

source

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

P1dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz

–2

–4

–6

–2

49.5

–4

–6

50.5

51.5

–8

52.5

–10

REAL (Ω)

Figure 9. P1dB Load Pull Efficiency Contours (%)

Figure 8. P1dB Load Pull Output Power Contours (dBm)

–2

–4

–6

–24

–22

–20

20.5

–18

–4

–16

–14

–6

–8

19.5

–12

–10

–8

18.5

–8

17.5

–10

REAL (Ω)

Figure 10. P1dB Load Pull Gain Contours (dB)

Figure 11. P1dB Load Pull AM/PM Contours (°)

NOTE:

= Maximum Output Power

= Maximum Drain Efficiency

Gain

Drain Efficiency

Linearity

Output Power

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

P3dB – TYPICAL CARRIER SIDE LOAD PULL CONTOURS — 1840 MHz

–2

–4

–6

–2

51.5

50.5

–4

–6

52.5

53.5

–8

53.5

–10

REAL (Ω)

Figure 12. P3dB Load Pull Output Power Contours (dBm)

Figure 13. P3dB Load Pull Efficiency Contours (%)

–2

–4

–6

–28

–26

–24

18.5

–4

–22

–20

–18

–6

17.5

–16

–14

–12

–8

16.5

15.5

–10

REAL (Ω)

Figure 14. P3dB Load Pull Gain Contours (dB)

Figure 15. P3dB Load Pull AM/PM Contours (°)

NOTE:

= Maximum Output Power

= Maximum Drain Efficiency

Gain

Drain Efficiency

Linearity

Output Power

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

Table 9. Peaking Side Load Pull Performance — Maximum Power Tuning

= 48 Vdc, V

= 3.1 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle

GSB

Max Output Power

P1dB

(1)

AM/PM

(°)

(Ω)

load

(Ω)

source

(Ω)

(%)

54.5

54.3

53.2

Gain (dB)

17.7

(dBm)

54.8

(W)

302

297

(MHz)

1805

1840

1880

1.66 – j6.38

1.51 + j6.91

1.79 – j4.63

2.06 – j4.97

2.01 – j5.25

–13

2.64 – j7.07

2.30 – j7.54

2.11 + j7.34

2.13 + j7.92

17.8

54.7

17.8

54.6

292

Max Output Power

P3dB

(2)

(Ω)

AM/PM

(°)

(Ω)

load

source

(Ω)

(%)

58.7

56.4

56.8

Gain (dB)

(dBm)

(W)

(MHz)

1805

1840

1880

1.66 – j6.38

1.37 + j6.95

2.61 – j5.42

2.86 – j5.78

2.87 – j5.92

16.0

56.0

398

–13

2.64 – j7.07

2.30 – j7.54

2.02 + j7.47

2.02 + j8.07

15.9

16.1

55.8

55.6

378

365

(1) Load impedance for optimum P1dB power.

(2) Load impedance for optimum P3dB power.

= Measured impedance presented to the input of the device at the package reference plane.

= Impedance as measured from gate contact to ground.

= Measured impedance presented to the output of the device at the package reference plane.

source

load

Table 10. Peaking Side Load Pull Performance — Maximum Efficiency Tuning

= 48 Vdc, V

= 3.1 Vdc, Pulsed CW, 10 μsec(on), 10% Duty Cycle

GSB

Max Drain Efficiency

P1dB

(1)

AM/PM

(°)

(Ω)

load

(Ω)

source

(Ω)

(%)

63.1

63.8

62.0

Gain (dB)

(dBm)

(W)

(MHz)

1805

1840

1880

1.66 – j6.38

1.46 + j7.24

1.79 – j3.09

2.02 – j3.16

2.04 – j3.54

19.3

53.1

203

–25

–24

2.64 – j7.07

2.30 – j7.54

2.04 + j7.76

2.06 + j8.33

19.3

19.5

53.0

53.1

200

203

Max Drain Efficiency

P3dB

(2)

(Ω)

AM/PM

(°)

(Ω)

load

source

(Ω)

(%)

69.4

68.9

67.1

Gain (dB)

(dBm)

(W)

(MHz)

1805

1840

1880

1.66 – j6.38

1.38 + j7.43

2.15 – j2.96

2.37 – j3.17

2.52 – j3.41

17.7

53.9

247

–32

–30

2.64 – j7.07

2.30 – j7.54

1.93 + j8.02

2.01 + j8.60

17.6

17.9

54.1

54.0

256

250

(1) Load impedance for optimum P1dB efficiency.

(2) Load impedance for optimum P3dB efficiency.

= Measured impedance presented to the input of the device at the package reference plane.

= Impedance as measured from gate contact to ground.

= Measured impedance presented to the output of the device at the package reference plane.

source

load

Input Load Pull

Tuner and Test

Circuit

Output Load Pull

Tuner and Test

Circuit

Device

Under

Test

load

source

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

P1dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz

–2

–3

–4

–5

–6

–2

50.5

51.5

–3

52.5

–4

–5

–6

53.5

54.5

REAL (Ω)

Figure 16. P1dB Load Pull Output Power Contours (dBm)

Figure 17. P1dB Load Pull Efficiency Contours (%)

–2

–3

–4

–5

–6

20.5

–28

–26

–24

–22

–3

–20

–18

–16

–4

–5

–6

19.5

–14

–12

18.5

16.5

17.5

REAL (Ω)

Figure 18. P1dB Load Pull Gain Contours (dB)

Figure 19. P1dB Load Pull AM/PM Contours (°)

NOTE:

= Maximum Output Power

= Maximum Drain Efficiency

Gain

Drain Efficiency

Linearity

Output Power

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

P3dB – TYPICAL PEAKING SIDE LOAD PULL CONTOURS — 1840 MHz

–2

–3

–4

–5

–6

–7

–2

52.5

53.5

–3

–4

–5

–6

–7

54.5

55.5

REAL (Ω)

Figure 20. P3dB Load Pull Output Power Contours (dBm)

Figure 21. P3dB Load Pull Efficiency Contours (%)

–2

–3

–4

–5

–6

–7

–28

–26

–24

18.5

–3

–4

–5

–6

–7

–22

–20

17.5

–18

–16

–14

–12

16.5

14.5

15.5

REAL (Ω)

Figure 23. P3dB Load Pull AM/PM Contours (°)

Figure 22. P3dB Load Pull Gain Contours (dB)

NOTE:

= Maximum Output Power

= Maximum Drain Efficiency

Gain

Drain Efficiency

Linearity

Output Power

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

PACKAGE DIMENSIONS

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

PRODUCT DOCUMENTATION, SOFTWARE AND TOOLS

Refer to the following resources to aid your design process.

Application Notes

•

AN1908: Solder Reflow Attach Method for High Power RF Devices in Air Cavity Packages

AN1955: Thermal Measurement Methodology of RF Power Amplifiers

Engineering Bulletins

EB212: Using Data Sheet Impedances for RF LDMOS Devices

Software

.s2p File

Development Tools

Printed Circuit Boards

•

To Download Resources Specific to a Given Part Number:

1. Go to http://www.nxp.com/RF

2. Search by part number

3. Click part number link

4. Choose the desired resource from the drop down menu

REVISION HISTORY

The following table summarizes revisions to this document.

Revision

Date

Description

May 2017

• Initial release of data sheet

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

Information in this document is provided solely to enable system and software

implementers to use NXP products. There are no express or implied copyright licenses

granted hereunder to design or fabricate any integrated circuits based on the information

in this document. NXP reserves the right to make changes without further notice to any

products herein.

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nxp.com/support

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application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation consequential or incidental damages. “Typical” parameters

that may be provided in NXP data sheets and/or specifications can and do vary in

different applications, and actual performance may vary over time. All operating

parameters, including “typicals,” must be validated for each customer application by

customer’s technical experts. NXP does not convey any license under its patent rights

nor the rights of others. NXP sells products pursuant to standard terms and conditions of

sale, which can be found at the following address: nxp.com/SalesTermsandConditions.

NXP, the NXP logo, and Airfast are trademarks of NXP B.V. All other product or service

names are the property of their respective owners.

E 2017 NXP B.V.

A3G18H500--04SR3

RF Device Data

NXP Semiconductors

Document Number: A3G18H500--04S

Rev. 0, 05/2017

A3G18H500-04SR3 [NXP]

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