ASL5108FHN_技术文档

ASL5xxxyHz

Matrix LED Controller (MLC)

Rev. 2.1 — 5 February 2019

Product data sheet

1 General description

The ASL5xxxyHz family is a fully featured and flexible Matrix LED Controller (MLC). It

provides a cost effective design solution, specifically targeting advanced automotive

exterior lighting applications. The family consists of part numbers with different maximum

currents and different driving modes, Smart and direct PWM.

Smart PWM part numbers determine PWM dimming duty cycle from information stored

inside the MLC in the form of dimming polynomial curve coefficients. These coefficients

are programmable by the customer according to the dimming profile they would like to

see. The MLC uses these polynomial coefficients to calculate the PWM duty cycle to 12-

bit resolution. The MLC also provides the capability to increase the speed of the PWM

dimming curve dynamically or sequence several PWM dimming curves together.

It is possible to store polynomials for up to eight PWM dimming curves. By storing

these polynomial coefficients internally, it is not necessary for the microcontroller to

send updated PWM dimming information to each LED switch continuously. Instead, the

microcontroller selects the PWM curve and LED to which it must be applied. Therefore,

the PWM dimming information from the microcontroller is reduced, which reduces the

volume of data transfer from the microcontroller to the MLC.

The MLC also provides the functionality to correct for LED brightness variations. This

feature is especially useful to ensure a homogenous light output from LEDs that have

luminance variations with the same LED current.

The MLC has many diagnostic features, including:

• Direct NTC feedback for monitoring the LED temperature

• Direct identification resistor input for PCB characterization

• Single LED open/short detection and protection

• Internal IC junction temperature monitoring

• Power-on-Reset (POR) monitoring; mandatory for off-board configuration and following

safety requirements

• Power OK bit (POK) to ensure that the complete MLC is working as expected

• External components (NTC, ID resistor, charge pump capacitor) monitoring and fail

detection

• Full communication diagnosis, including flagging illegal actions

• Possibility to clear Open Circuit (OC) and Short Circuit (SC) flags and reset the internal

mosfets dynamically and without a need of a power-on-reset

All this diagnostic information is available to the microcontroller via the MLC interface. A

microcontroller controls the MLC through a high-speed serial CAN interface. Through this

interface, the microcontroller can control up to 32 MLCs, enabling control of up to 384

LEDs or segments.

The MLC has an internal 200 MHz oscillator that avoids the need of an external quartz

(reducing system cost and providing better EMC behavior) for synchronization and clock

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ASL5xxxyHz

Matrix LED Controller (MLC)

generation. All the internal clocks are synchronized with the internal oscillator and the

trimming is done via the CAN message (CAN-ID). This process allows for a very accurate

clock (accuracy < 0.25 %).

The MLC can be mounted close to the LEDs on an IMS PCB. Because the pinning

has been optimized to avoid any crossing tracks, a single-layer PCB can be used. The

ASL5xxxyHz family is available in automotive-qualified, thermally enhanced, 36-pin

HVQFN and 48-pin HLQFP packages.

The device is designed to meet the stringent requirements of automotive applications,

being fully AEC Q100 grade 1 and AEC Q006 qualified. It operates over the –40 °C to

+125 °C ambient temperature range.

The Matrix LED Controller (MLC) also offers the possibility to be driven in direct PWM

mode. In this mode, the microcontroller needs to update the PWM value in every channel

with a certain cycle, determined by the system specifications. These part numbers,

ASL5115yHz and ASL5108yHz, also offer 12-bit resolution to ensure a smooth dimming

performance to avoid glitches in the output light.

The MLC family also offers two different maximum currents per switch. Part numbers

ASL5008yHz and ASL5108yHz offer a maximum current per switch of 0.8 A. Part

numbers ASL5015yHz and ASL5115yHz offer a maximum current per switch of 1.5 A.

All part numbers are pin-to-pin compatible, which offers a completely scalable and

flexible system solution that can be adapted to any system requirements.

ASL5xxxyHz

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Product data sheet

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ASL5xxxyHz

Matrix LED Controller (MLC)

2 Features

• Automotive grade product that is AEC-Q100 grade 1 and AEC-Q006 qualified

• Operating ambient temperature range of –40 °C to +125 °C

• Maximum junction temperature of 175 °C

• Operating input voltage 5 V ± 0.5 V. Vcc pin.

• Able to drive up to 12 LEDs / segments, with a string voltage range up to 57 V

• Able to drive multiple LEDs per switch (MTP configurable)

• 12 channels, arranged in 4 configurable blocks of 3 switches per block

• Each block of three can fully float up to 60 V with respect to ground and can be

paralleled with any other block

• Each switch can control up to 1.5 A LED current in the ASL5x15yHz family and up to

0.8 A in the ASL5x08yHz family

• 100 mΩ (Rdson) switches for 1.5 A part numbers and 200 mΩ for 0.8 A part numbers

• PWM dimming with 12-bit resolution and built-in phase shifting for minimum losses

• Internal PWM duty cycle generator with incremental calculation for glitch-free operation

in the ASL50xxyHz family—Smart

• On-chip storage of preprogrammed PWM curves to reduce data traffic in ASL50xxyHz

family—Smart

• LED brightness variation correction functionality

• On-chip 200 MHz oscillator, avoiding need for external quartz

• CAN-based serial interface with optional external CAN physical layer

• Broadcast messages to reduce system latency and bus load

• Low Electromagnetic Emission (EME) and high Electromagnetic Immunity (EMI)

• Individual LED open and LED short-fault monitoring, with bypass feature on open

condition

• NTC input with 6-bit resolution for LED temperature monitoring; directly connected to

MLC

• Identification resistor input

• MLC can be used in a configuration of up to 32 ICs in a single CAN network

• Small package outline, leadless HVQFN package with improved Automated Optical

Inspection (AOI) capability and leaded HLQFP package

• Low operational current consumption

• Sleep and wake-up modes available

• Standby current consumption < 1.35 mA

• Input under voltage protection

• 9-bit resolution IC junction temperature feedback via CAN interface

• Internally programmed Limp Home Mode (LHM) in case of communication failure

• Built-in charge pump failure operation mode (CPFSO)

3 Applications

• Automotive lighting

– Matrix/pixel high beam (ADB / Glare-Free High Beam - GFHB)

– Matrix/pixel low beam (ADB)

– Dynamic turning indicator

– Welcoming scenarios

– Dynamic rear lights

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ASL5xxxyHz

Matrix LED Controller (MLC)

– Dynamic cornering lights

4 Orderable parts

Table 1.ꢀOrderable part variations

Type number Package

Name

Description

Version

ASL5015SHN HVQFN36

ASL5115SHN HVQFN36

ASL5008SHN HVQFN36

ASL5108SHN HVQFN36

ASL5015FHN HVQFN36

Smart internal PWM generator with prestored curves (Smart – 1.5 A) – CAN SOT1092-4

Direct PWM data for every channel (Direct – 1.5 A) – CAN

SOT1092-4

Smart internal PWM generator with prestored curves (Smart – 0.8 A) – CAN SOT1092-4

Direct PWM data for every channel (Direct – 0.8 A) – CAN

SOT1092-4

Smart internal PWM generator with prestored curves (Smart – 1.5 A) –

CAN-FD

ASL5115FHN HVQFN36

ASL5008FHN HVQFN36

Direct PWM data for every channel (Direct – 1.5 A) – CAN-FD

SOT1092-4

Smart internal PWM generator with prestored curves (Smart – 0.8 A) –

CAN-FD

ASL5108FHN HVQFN36

ASL5015SHV HLQFP48

ASL5115SHV HLQFP48

ASL5008SHV HLQFP48

ASL5108SHV HLQFP48

ASL5015FHV HLQFP48

Direct PWM data for every channel (Direct – 0.8 A) – CAN-FD

SOT1092-4

Smart internal PWM generator with prestored curves (Smart – 1.5 A) – CAN SOT1571-1

Direct PWM data for every channel (Direct – 1.5 A) – CAN SOT1571-1

Smart internal PWM generator with prestored curves (Smart – 0.8 A) – CAN SOT1571-1

Direct PWM data for every channel (Direct – 0.8 A) – CAN

SOT1571-1

Smart internal PWM generator with prestored curves (Smart – 1.5 A) –

CAN-FD

ASL5115FHV HLQFP48

ASL5008FHV HLQFP48

Direct PWM data for every channel (Direct – 1.5 A) – CAN-FD

SOT1571-1

Smart internal PWM generator with prestored curves (Smart – 0.8 A) –

CAN-FD

ASL5108FHV HLQFP48

Direct PWM data for every channel (Direct – 0.8 A) – CAN-FD

SOT1571-1

ASL5xxxyHz

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ASL5xxxyHz

Matrix LED Controller (MLC)

5 Application diagram

Figure 1.ꢀApplication diagram for the ASL5xxxyHz family (OFF board configuration)

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ASL5xxxyHz

Matrix LED Controller (MLC)

6 Block diagram

Figure 2.ꢀBlock diagram

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ASL5xxxyHz

Matrix LED Controller (MLC)

7 Pinning information

7.1 Pinning – HVQFN36 package

terminal 1

index area

1

2

3

4

5

6

7

8

9

27

GND

TXD

RXD

VCC

RXD

TXD

NC

ICP

NTC

GND

ID

26

25

24

23

22

21

20

19

37 - EXP

A4

A3

A2

VMAX

CP

A1

A0

aaa-031764

Transparent top view

Figure 3.ꢀPin configuration for HVQFN36

7.2 Pin description – HVQFN36 package

Table 2.ꢀPin description

Symbol

GND

TXD

1

Description

Ground

2

Bus data OUT

Bus data IN

RXD

V_CC

3

4

External supply (5 V)

RXD

TXD

5

Bus data IN (Internally connected with pin 3)

Bus data OUT (Internally connected with pin 2)

Not connected

6

NC

7

VMAX

CP

8

Voltage reference for the charge pump

External charge pump input

Drain of switch 12

9

SW15

SW14

SW13

SW12

NC

10

11

12

13

14

15

16

17

18

Source of switch 12 and drain of switch 11

Source of switch 11 and drain of switch 10

Source of switch 10

Not Connected

SW11

SW10

SW9

SW8

Drain of switch 9

Source of switch 9 and drain of switch 8

Source of switch 8 and drain of switch 7

Source of switch 7

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ASL5xxxyHz

Matrix LED Controller (MLC)

Symbol

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

Description

Address bit 0

Address bit 1

Address bit 2

Address bit 3

Address bit 4

A0

A1

A2

A3

A4

ID

Connection for the identification resistor

Ground

GND

NTC

Connection to the NTC

Internally connected

ICP (Internally Connected Pin) – Connect to ground

Drain of switch 6

SW7

SW6

SW5

SW4

NC

Source of switch 6 and drain of switch 5

Source of switch 5 and drain of switch 4

Source of switch 4

Not Connected

SW3

SW2

SW1

SW0

EXP

Drain of switch 3

Source of switch 3 and drain of switch 2

Source of switch 2 and drain of switch 1

Source of switch 1

Exposed pad – Connect it to ground

NC pins are inserted between two blocks of switches to prevent high voltages between

two adjacent pins. An NC pin is also inserted between VMAX and TXD pins. NC pins

must float.

The exposed center pad of the package is internally connected to ground. For enhanced

thermal and electrical performance, it is highly recommended to connect the exposed

center pad the the board's ground.

Both RXD pins and both TXD pins are internally connected to facilitate single-layer PCB

layout without jumpers.

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Matrix LED Controller (MLC)

7.3 Pinning – HLQFP48 package

1

2

36

35

34

33

32

31

30

29

28

27

26

25

NC

GND

TXD

RXD

VCC

RXD

TXD

NC

ICP

NTC

GND

ID

3

4

5

6

NC

A4

49 - EXP

7

8

A3

9

NC

A2

10

11

12

VMAX

CP

A1

A0

NC

aaa-029231

Transparent top view

Figure 4.ꢀPin configuration for LQFP48

7.4 Pin description – HLQFP48 package

Table 3.ꢀPin description

Symbol

NC

1

Description

Not connected

Ground

GND

TXD

RXD

VCC

RXD

TXD

NC

2

3

Bus data OUT

Bus data IN

4

5

External supply ±10 % (5 V)

Bus data IN

6

7

Bus data OUT

8

Not connected (can be used for ground routing)

Not connected

NC

9

VMAX

CP

10

11

12

13

14

15

16

17

Max. voltage reference for the charge pump

External charge pump input

Not connected

NC

Not connected

SW15

SW14

SW13

SW12

Drain of switch 12

Source of switch 12 and drain of switch 11

Source of switch 11 and drain of switch 10

Source of switch 10

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ASL5xxxyHz

Matrix LED Controller (MLC)

Symbol

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

Description

SW12

NC

Source of switch 10

Not connected

Drain of switch 9

SW11

SW10

SW9

SW8

NC

Source of switch 9 and drain of switch 8

Source of switch 8 and drain of switch 7

Source of switch 7

Not connected

NC

Not connected

A0

Address bit 0

A1

Address bit 1

A2

Address bit 2

A3

Address bit 3

A4

Address bit 4

NC

Not connected

BIN

Connection for the identification resistor

Ground

GND

NTC

ICP

Connection to the NTC

ICP (Internally Connected Pin) – Connect it to ground

Not connected

NC

Not connected

SW7

SW6

SW5

SW4

NC

Drain of switch 6

Source of switch 6 and Drain of switch 5

Source of switch 5 and Drain of switch 4

Source of switch 4

Not connected

SW3

SW2

SW1

SW0

NC

Drain of switch 3

Source of switch 3 and Drain of switch 2

Source of switch 2 and Drain of switch 1

Source of switch 1

Not connected

EXP

Exposed pad - Connect it to ground

NC pins are inserted between two blocks of switches to prevent high voltages between

two adjacent pins. Two NC pins are also inserted between VMAX and TXD pins. The NC

pins must float, only pin 8 can be used for ground routing, since pin 9 (NC) still keep the

isolation between ground and high voltage.

The exposed center pad must be connected to ground during layout routing.

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ASL5xxxyHz

Matrix LED Controller (MLC)

Both RXD pins and both TXD pins are internally connected to facilitate single-layer PCB

layout without jumpers.

8 Functional description

8.1 Integrated switches for single or multiple LEDs dimming

The floating blocks make it possible for the ASL5xxxyHz family (Matrix LED Controller,

MLC) to drive 12 single LEDs or multiple LEDs per switch and multiple strings with

different currents and string voltages. The 12 independent switches are separated in 4

floating blocks of 3 switches each. Every block can float at 60 V with respect to ground

and can be driven separately or as a unique system.

Figure 5 and Figure 6 show possible configurations.

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ASL5xxxyHz

Matrix LED Controller (MLC)

Figure 5.ꢀSingle LED driving configuration application diagram

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Matrix LED Controller (MLC)

Figure 6.ꢀMultiple strings with segment driving configuration application diagram

Polarity must be respected in the internal MOSFET.

8.2 LED current capability and power dissipation

The LED string current is provided by a separate buck or boost converter. The

specifications of the matrix controller are matched to the multichannel buck converter

ASLx41xSHN. The MLC can also be driven by other buck driver or constant current

suppliers. One buck converter output supplies the current for one LED string. For the

MLC, the maximum LED string voltage is 57 V, maximum LED string current is 1.5 A in

serial configuration, and up to 6 A in parallel configuration for ASL5x15yHzpart numbers.

For part numbers ASL5x08yHz, the maximum LED string current is 0.8 A, in serial

configuration, and up to 3.2 A when paralleling all switches' blocks.

The internal power dissipation depends on the number of LEDs that are bypassed. The

maximum dissipation in the Matrix LED Controller occurs when all switches are closed

with 1.5 A LED current through them, the dissipation is estimated to be 5 W at 120 °C

junction temperature.

8.3 Internal PWM dimming generator and phase shifting

The ASL5015yHz and ASL5008yHz part numbers have an internal PWM generator

module for each channel. The PWM has 12-bit resolution, which means a time accuracy

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ASL5xxxyHz

Matrix LED Controller (MLC)

of 4.1 ms/4096 = 1 µs , at 244 Hz or 0.5 µs, at 488 Hz. The resolution in terms of PWM

percentage is 0.024 %. This resolution ensures very smooth LED dimming to very low

light levels.

When a PWM switch turns on, the forward voltage of the whole string decreases with the

V_fof one LED. During the negative slope, there could be a high discharge current from

the string capacitor that also flows through the entire LED string. If more than one LED is

bypassed at the same time, then this injected current is higher when additional LEDs are

bypassed. Therefore, it is desired to close only one switch at a time. For that reason, the

MLC incorporates an internal phase-shifting module that ensures closing switches one at

a time.

Note: Automated phase shifting feature is applicable to all Matrix LED controllers part

numbers.

Figure 7 shows a phase-shifting example in an MLC IC, during just one PWM cycle.

Figure 7.ꢀBuilt in phase shifting

sequence

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ASL5xxxyHz

Matrix LED Controller (MLC)

Each block of switches can be assigned to a block of channels and phases; each block

can be paralleled with any other block. For paralleling switches, it is necessary that they

turn on at the same instant and use the same PWM information.

The shiting between two consecutuve switches of the same block is 256 clocks. The

shifting between two consecutive switches of different blocks is 512 clocks.

Two bits per block are required in the MTP to define which group of channels are

assigned to a phase sequence. In Figure 8, there is an example of all blocks assigned to

different phase shifting sequences.

Switch block 1

Switch block 2

Switch block 3

Switch block 1

Switch block 2

Switch block 3

Switch block 1

Switch block 2

Switch block 3

Switch block 1

Switch block 2

Switch block 3

Switch block 4

0

1

0

1

aaa-026320

Figure 8.ꢀBlocks of switches can be assigned to phase shifting sequences

The MTP configuration bits (2 bits) are showed in the bottom side of the blocks.

Depending on the selected configuration, a different block may be highlighted in the

graph. These two bits are used to select the phase shifting sequence of the associated

channels/switches. When blocks are in series, the two bits should be different in each

block. For parallel configuration, the blocks that work together should have the same

phase shifting sequence (same 2 bits value).

This way of defining the PWM periods guarantees that two or more switches are never

closed at the same moment, unless they are in parallel. It makes programming easier

and reduces the voltage ripple on the LED string.

The sequence for each individual block can be programmed in the MTP. See Section 14

"Nonvolatile Multitime Programmable Memory (MTP)".

8.4 Programming and execution of PWM dimming – ASL50xxyHz

In order to reduce data traffic over the serial interface, a polynomial curve defines the

PWM dimming profile. Coefficients for the PWM dimming polynomial curves can be

stored in an internal nonvolatile MTP (Multiple Time Programmable) memory. This

programming is done once at the end of the customer production line.

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ASL5xxxyHz

Matrix LED Controller (MLC)

(1) Curve_1_Fade_in/out

(2) Curve_2_Fade_in/out

(3) Curve_3_Fade_in/out

(4) Curve_4_Fade_in/out

(5) Curve_5_Fade_in/out

(6) Curve_6_Fade_in/out

(7) Curve_7_Fade_in/out

(8) Curve_8_Fade_in/out

Figure 9.ꢀExample PWM Polynomial curves (Default curves in MTP)

The equation to determine the curve is up to a third-grade polynomial:

Ax³+ Bx²+ Cx + D

The system makes an absolute calculation with the first x (step) value and then uses an

incremental calculation to ensure no glitch between consecutive PWM Duty Cycle values,

even when the shift value is changed to modify the curve speed. Absolute calculation

is applied only when START command is used, for NOW or AUTO bits, the incremental

calculation is used.

Note: A system emulation tool is available and can reproduce any possible scenario.

The implementation of a differential calculation ensures a glitch-free system. This method

allows a very smooth LED dimming without any undesirable light glitch.

The information to be stored in the MTP are only the polynomial coefficient values A, B,

C and D. Then, the system calculates the resulting PWM duty cycle on the fly with an

internal PWM generator (in the Smart version, ASL50xxyHz).

Several curves can be sequenced in case of long fade-in or fade-out scenarios. This

feature is only available in the Smart versions, ASL50xxyHz.

The ASL5015yHz and ASL5008yHz allow the storage of eight-polynomial curves. The

curves can be followed in both directions, depending on whether the stop position is

greater or lower than the start position; and the number of fade-in scenarios do not have

to be the same as the fade-out ones.

It may be necessary to speed up or slow down a curve or interrupt a fade-in curve to set

the PWM duty cycle to 100 % immediately, such as in the case of high-beam flashing.

This adjustment is possible by changing the shift value.

The programmed coefficients in the internal MTP can also be negative, for that reason

there are 13 bits reserved per coefficient. That gives the possibility to make smoother

curves and shapes that are not possible with just positive coefficients. The available

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ASL5xxxyHz

Matrix LED Controller (MLC)

simulation tool supports both signed coefficients and shows the system behavior in any

possible condition.

8.4.1 Channel programming registers map

Table 4.ꢀCurve selection, auto-bit, shift value, start/stop positions and delay factor (Read/Write)

Address Register

D7

D6

D5

D4

D3

D2

D1

D0

Default

00h

01h

02h

03h

04h

05h

06h

07h

08h

09h

0Ah

0Bh

0Ch

0Dh

0Eh

0Fh

10h

11h

12h

13h

14h

15h

16h

17h

18h

19h

1Ah

1Bh

1Ch

1Dh

1Eh

1Fh

20h

CURVID1

SHIFT1[2:0]

AUTO1 NOW1

STARTPOS1[7:0]

STOPPOS1[7:0]

DELAY1[7:0]

CURVEID1[2:0]

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

STARTPOS1

STOPPOS1

DELAY1

CURVID2

SHIFT2[2:0]

SHIFT3[2:0]

SHIFT4[2:0]

SHIFT5[2:0]

SHIFT6[2:0]

SHIFT7[2:0]

SHIFT8[2:0]

SHIFT9[2:0]

AUTO2 NOW2

STARTPOS2[7:0]

STOPPOS2[7:0]

DELAY2[7:0]

CURVEID2[2:0]

CURVEID3[2:0]

CURVEID4[2:0]

CURVEID5[2:0]

CURVEID6[2:0]

CURVEID7[2:0]

CURVEID8[2:0]

CURVEID9[2:0]

STARTPOS2

STOPPOS2

DELAY2

CURVID3

AUTO3 NOW3

STARTPOS3[7:0]

STOPPOS3[7:0]

DELAY3[7:0]

STARTPOS3

STOPPOS3

DELAY3

CURVID4

AUTO4 NOW4

STARTPOS4[7:0]

STOPPOS4[7:0]

DELAY4[7:0]

STARTPOS4

STOPPOS4

DELAY4

CURVID5

AUTO5 NOW5

STARTPOS5[7:0]

STOPPOS5[7:0]

DELAY5[7:0]

STARTPOS5

STOPPOS5

DELAY5

CURVID6

AUTO6 NOW6

STARTPOS6[7:0]

STOPPOS6[7:0]

DELAY6[7:0]

STARTPOS6

STOPPOS6

DELAY6

CURVID7

AUTO7 NOW7

STARTPOS7[7:0]

STOPPOS7[7:0]

DELAY7[7:0]

STARTPOS7

STOPPOS7

DELAY7

CURVID8

AUTO8 NOW8

STARTPOS8[7:0]

STOPPOS8[7:0]

DELAY8[7:0]

STARTPOS8

STOPPOS8

DELAY8

CURVID9

AUTO9 NOW9

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Matrix LED Controller (MLC)

Address Register

D7

D6

D5

D4

D3

D2

D1

D0

Default

21h

22h

23h

24h

25h

26h

27h

28h

29h

2Ah

2Bh

2Ch

2Dh

2Eh

2Fh

STARTPOS9

STOPPOS9

DELAY9

STARTPOS9[7:0]

STOPPOS9[7:0]

DELAY9[7:0]

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

CURVID10

STARTPOS10

STOPPOS10

DELAY10

SHIFT10[2:0]

SHIFT11[2:0]

SHIFT12[2:0]

AUTO10 NOW10

STARTPOS10[7:0]

STOPPOS10[7:0]

DELAY10[7:0]

CURVEID10[2:0]

CURVEID11[2:0]

CURVEID12[2:0]

CURVID11

STARTPOS11

STOPPOS11

DELAY11

AUTO11 NOW11

STARTPOS11[7:0]

STOPPOS11[7:0]

DELAY11[7:0]

CURVID12

STARTPOS12

STOPPOS12

DELAY12

AUTO12 NOW12

STARTPOS12[7:0]

STOPPOS12[7:0]

DELAY12[7:0]

SHIFTx: These three bits determine the shift value used in the internal PWM generator.

The speed of the curve depends on the shift value. When the lowest shift value is

selected (2), the fastest curve is performed. Table 5 shows the different possible values.

Table 5.ꢀSHIFT values

SHIFT[2:0]

Value

111

110

101

100

011

010

001

000

2

4

8

16

32

64

128

256

AUTOx: Set this bit to 1 when the channel is already following another curve, so that this

new configuration can be followed at the end of the current sequence.

NOWx: To implement changes immediately, set this bit to 1. The system will implement

the new SHIFT, AUTO and CURVEID to the specific channel/switch immediately and

automatically proceed with the PWM calculation. If this bit is set to 0, then all the other

values (SHIFT, AUTO and CURVEID) are stored in the shadow register until the current

sequence is done and another trigger is set (START command or AUTO bit).

CURVEIDx: These three bits are used to identify the curve the channel follows during the

fade sequence. With three bits, eight curves can be selected.

STARTPOSx: In this register, the start position must be set. The value is referred to as a

step from 0 to 255 (8 bits resolution).

STOPPOSx: In this register, the stop position must be set. The value is referred to as a

step from 0 to 255 (8 bits resolution).

Note: Because any curve can be followed in both directions, a fade-in sequence

occurs when the start value is smaller than the stop value. As soon as the start value is

greater than the stop value, then the sequence is a fade-out one. When using negative

coefficients, the curve behavior could change depending on the coefficient values.

DELAYx: This 8-bit register is used to add a delay to the sequence start. Because it is an

8-bit register and this delay is related to steps, the delay value is from 0 to 255. The delay

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time depends on the PWM frequency. For example, if the PWM frequency is 244 Hz,

then the delay value has a resolution of 4 ms. If the PWM frequency is 488 Hz, then the

delay time resolution is 2 ms. This factor is a great help in simplifying dynamic turning-

indicator sequences.

The microcontroller has the possibility of reading back the current PWM values in every

cycle. These values are accessible from the register 42h to 59h, as shown in Table 6.

This accessibility ensures maximum control of the system and LED board feedback.

Table 6.ꢀPWM-Feedback registers (only Read registers)

Address

42h

43h

44h

45h

46h

47h

48h

49h

4Ah

4Bh

4Ch

4Dh

4Eh

4Fh

50h

51h

52h

53h

54h

55h

56h

57h

58h

59h

Register

D7

D6

D5

D4

D3

PWM [7:0]

D2

D1

D0

ReadCH1-LB

ReadCH1-MB

ReadCH2-LB

ReadCH2-MB

ReadCH3-LB

ReadCH3-MB

ReadCH4-LB

ReadCH4-MB

ReadCH5-LB

ReadCH5-MB

ReadCH6-LB

ReadCH6-MB

ReadCH7-LB

ReadCH7-MB

ReadCH8-LB

ReadCH8-MB

ReadCH9-LB

ReadCH9-MB

ReadCH10-LB

ReadCH10-MB

ReadCH11-LB

ReadCH11-MB

ReadCH12-LB

ReadCH12-MB

unused

PWM [11:8]

PWM [7:0]

unused

Table 7.ꢀImmediate OFF commands. Set duty cycle to zero (Read/Write)

Address Register

D7

D6

D5

D4

D3

D2

D1

D0

30h

31h

IMMOFFREG1

IMMOFFREG2

CH8

CH7

CH6

CH5

CH4

CH12

CH3

CH2

CH1

CH9

unused

CH11

CH10

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Registers IMMOFFREG1 and IMMOFFREG2 are used to turn all the channels OFF

immediately. That means 100 % duty cycle in the internal FET gate (switch in low ohmic

state and bypassing the LEDs) and 0 % PWM duty cycle in the LED or LEDs associated

to this channel. These registers can be sent to a selected IC or as a broadcast message,

depending on the frame ID only (command bits). The microcontroller can control every

channel individually.

Table 8.ꢀStart commands for each channel (Read/Write)

Address Register

D7

D6

D5

D4

D3

D2

D1

D0

32h

33h

START1

START2

CH8

CH7

CH6

CH5

CH4

CH12

CH3

CH11

CH2

CH10

CH1

CH9

unused

Registers START1 and START2, are used to start the sequences. These commands

should be sent after all the channels have been programmed with the desired values.

The microcontroller can control every channel individually. Other way of starting a

channel is programing the CURVEIDx resgister with NOW bit =1, but at least one

previous START command must be performed from the moment the MLC startup.

8.5 Delay coefficient – ASL50xxyHz

The delay coefficient can be set in the DELAYx register. See Section 8.4.1 "Channel

programming registers map". This setting is individual for each channel and has a

resolution of 8 bits. After the delay coefficient is set, a delay for a PWM curve can

be programmed and the channel starts following the PWM dimming curve after the

programmed step delay.

This feature on the ASL50xxyHz saves many software lines in the MCU and reduces the

load on the communication bus. The combination of the delay and the fade-in/fade-out

curves can be used in applications such as dynamic turn indicator or welcome scenarios.

The delay resolution is 4.09 ms in case the PWM frequency is set to 244 Hz or 2 ms if it

is set to 488 Hz.

8.6 Diagnostics

8.6.1 Direct NTC input

The MLC is able to read the voltage drop in an attached NTC from 0 V to 1.1 V. This

analog voltage drop is converted to a digital value with an internal ADC. The customer

can read the 6-bit digital value of this voltage drop in register 39h.

The MLC uses a continuos current of 25 µA to check the NTC status. This check is

to determine if an open or short condition is present. The MLC uses a current of 440

µA to measure the voltage drop in the NTC and provide the digital value (only when

CAN command 13 or 46 are sent). Figure 10 shows the measurement process. The

microcontroller triggers the NTC read with command 13 for selective MLC or command

46 for broadcast trigger.

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aaa-026323

2.4

(1)

(2)

2.2

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

(3)

NTC

(KΩ)

60

70

80

90

100

110

120

130

140

150

160

PCB temperature (°C)

(1) NTC resistance High

(2) NTC resistance Typical

(3) NTC resistance Low

Figure 10.ꢀTypical NTC resistance vs. temperature in the range 70 °C to 130 °C

8.6.2 Direct Identification resistor input

Eight resistors with 1 % precision can be connected to the ID pin to read the

identification / characterization information. The current on the ID pin is fixed to 25 µA

±10 %. The value of the resistor is determined at the MLC start-up and is available to the

microcontroller in register 3Ah. The ID value is only read during device startup. To get

the identification value, the microcontroller can read this register directly or ask for the IC

diagnosis, the register 3Ah is included in the 8 bytes of diagnosis answer.

The voltage drop in the ID pin is read and converted to a digital value via an internal

ADC. The ID resistors' values are not overlapping in ranges in Table 9.

Table 9.ꢀPossible identification resistors for nonoverlapping

Resistor

Value

4.75

000

8.06

001

11.3

010

14.3

011

17.4

100

21.5

101

26.7

110

32.4

111

[kΩ]

binary

8.6.3 LED fault detection

Each PWM switch has an Open Circuit and a Short Circuit comparator, even when the

system is in Limp Home mode.

Open Circuit detection (OC): The OC detection threshold can be set to 6 V ±1 V

(default value) or 17 V ±1.5 V, see Section 10 "ASL50xxyHz Register map". In case

of an OC detection event, the PWM switch is closed and an error bit set. This process

allows the IC to bypass this LED and the other LEDs to continue to operate. The bit flag

can be reset by removing the supply voltage (V_CC) or by a bus command writing a 1 in

the register 34h, bit 1. In case of clearing the flags (writing in register 34h), the action is

done dynamically and a power-on-reset is not necessary. If the open circuit was just a

lapse, then the system recovers automatically when clearing the flags. The open circuit is

immediately detected when the switch passes from low ohmic to high ohmic state.

Short Circuit detection (SC): The SC detection limit is set to 1 V ± 0.5 V. The system

can use a blanking time of 16 µs (default) or 32 µs, depending on the driving current and

the string capacitor. The blanking time can be selected in the internal MTP bit 4, register

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60h. The blancking time is applicable from the moment the internal switch passes from a

low ohmic to a high ohmic state.

When there is a detection of an SC, the error bit is set and the microcontroller is aware of

the fail. The microcontroller can then decide whether to close the switch associated to the

shorted LED or not. If the microcontroller decides to close the switch, the rest of the LED

string can continue working and just the affected LED is bypassed.

Restore the fail bit flag by a bus command writing a 1 in the register 34h, bit 0 or

removing the supply voltage. If the flag is restored with a CAN message (write a 1 in

the CLEAR_SC bit of register 34h), then the MLC does not need a power-on-reset. In

addition, an automatic recheck action is executed by the IC to confirm whether the fail is

still present or not. If the fail is still present, then the MLC will flag it again.

8.6.4 Internal junction temperature warnings

The maximum allowed junction temperature on the ASL5xxxyHz family is 175 °C. The

user can program two warning thresholds to be activated. The default values are 140 °C

for OTW_1 and 160 °C for OTW_2. As soon as the microcontroller receives these

temperature warnings, it decides what action to take. For example, the microcontroller

might reduce the LED string current to reduce the junction temperature and the whole

system temperature. If the MLC reaches its maximum allowable internal temperature,

175 °C, it will not take any action. The microcontroller must correct any overtemperature

situations to prevent a safety violation. OTW_1 and OTW_2 can be programmed in the

MTP.

The microcontroller triggers the junction temperature read and consequent flagging with

command 13 for selective MLC or command 46 for broadcast trigger.

Table 10.ꢀJunction temperature warning bits (Read)

Address

Register

D7

D6

D5

D4

D3

D2

D1

D0

3Ah

ID

OTW_1

OTW_2

POK

LHM_STATUS

ID[3:1]

ID-FAIL

Note: If the MLC junction temperature reaches the OTW_2, reduce the LED string

current. The OTW measurement has a ±10 % accuracy.

8.6.5 Undervoltage detection and protection

The MLC incorporates an undervoltage protection on the V_CC. The device switches off

below 4.3 V.

When an undervoltage condition is detected, all the switches get open (high ohmic state)

and the communication with the device is not possible. If Vcc gets recovered, then the IC

allows the communication again and a power on reset is not required.

A full system diagnosis should be run after an undervoltage condition.

8.6.6 Diagnosis registers map

8.6.6.1 Register 34h - Status register

Register 34h has read and write rights.

This register can be sent/received to any MLC IC individually or can be a broadcast

message. It depends on the CAN frame Extended-ID command.

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Table 11.ꢀCLEAR - CLEAR control register (address 34h) bit allocation

Bit

7

6

5

4

3

2

1

0

Symbol

POR

ILLEGAL _

COMMAND

MTP_LOCK

REG_ILLE

MTP_ILLE

MTP_ACC

CLR_ CLR_

GAL_ACCESS GAL_ACCESS ESS_STATUS

OC

SC

Reset

0

Access

R/W

Table 12.ꢀCLEAR - CLEAR control register (address 34h) bit description

Bit

Symbol

Description

7

POR

Power-on-reset (POR)

0 — A power-on-reset has happened due to any external interference or power

supply fail

1 — Set by the microcontroller during the MLC startup

The microcontroller can check this bit status to know if a POR has happened. If

so, the MLC must be programmed with the values of the desired registers again,

because after a POR, the MLC returns to the default values.

6

ILLEGAL _COMMAND

Illegal command

0 — The MLC received a valid command.

1 — The microcontroller sent a nonexisting command, a wrong message

configuration or a command that is restricted to a different part number.

The microcontroller writes a 1 in this location to clear the flag.

5

4

MTP_LOCK

MTP lock

0 — The MTP is available to be read/write.

1 — The user attempt to read / write in the MTP with a wrong key for 3

consecutive times. The MTP is not accessible by the micro.

REG_ILLEGAL_ACCESS

Register illegal access

0 — The selected register is accessible by the microcontroller.

1 — The microcontroller tries to write/read in an invalid register.

If the value of this bit is 0 after writing or reading a register, then the action was

performed in a valid register. The microcontroller writes a 1 in this location to

clear the flag. The flag is not stopping the communication.

3

2

MTP_ILLEGAL_ACCESS

MTP_ACCESS_STATUS

MTP illegal access

0 — The register the microcontroller is trying to access is not restricted

1 — The microcontroller is trying to read/write in a restricted register.

The microcontroller should write a 1 in this location to clear the flag.

MTP access status

0 — The MLC was not able to access the required MTP register

1 — The MLC succeeded accessing the required MTP register. The

microcontroller should write a 1 in this location to clear the flag

Note: If neither MTP_ACCESS_STATUS, MTP_ILLEGAL_STATUS or

ILLEGAL_COMMAND is set after MTP read/write request, the request is ignored

due to an internal MTP function. The microcontroller must repeat the action.

1

CLR_OC

Clear open-circuit detection

0 — Always 0 when the microcontroller reads it.

1 — Write a 1 in this location to clear all the OC flags and restart the channels.

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Bit

Symbol

Description

0

CLR_SC

Clear short-circuit detection

0 — Always 0 when the microcontroller reads it.

1 — A 1 in this location to clear all the SC flags and restart the channels.

8.6.6.2 Read diagnostic bits, from MLC to microcontroller

Table 13.ꢀOpen Circuit and Short Circuit registers (Read only)

Address

35h

Register

D7

D6

D5

D4

D3

D2

D1

D0

READ_OC1

READ_OC2

READ_SC1

READ_SC2

OC8

OC7

OC6

OC5

OC4

OC12

SC4

OC3

OC11

SC3

OC2

OC10

SC2

OC1

OC9

SC1

SC9

36h

unused

SC7

unused

37h

SC8

SC6

SC5

38h

SC12

SC11

SC10

Registers READ_OC1, READ_OC2, READ_SC1, and READ_SC2 are used to read the

fail flags. The microcontroller can read these registers to know if any fail occurs during

the system operation. These registers can be cleared with the CLEAR register (34h), bits

0 and 1. Or, the microcontroller can clear all the OC and SC flags sending the command

39.

OC stands for "Open Circuit" and the number next to it represents the channel linked to

the flag.

SC satnds for "Short Circuit" and the number next to it represents the channel linked to

the flag.

Note: The MLC IC must be turned ON before the Buck converter provides current to

the LED string, see start-up sequence in the application notes. When the MLC is ON,

it is able to detect the open circuit condition and close the switch associated with the

open LED, automatically. If the MLC is not running before the Buck converter and there

is an open circuit condition, the MLC is not able to close the switch associated to the

failure LED automatically, causing the voltage in the associated switch to be higher than

the allowable maximum. This condition may damages the MLC IC. The system startup

sequence is to turn ON the MLC IC first and wait until the POK bit is set to 1.

Table 14.ꢀNTC - NTC control register (address 39h) bit allocation

Bit

7

CPFAIL

0

6

5

4

3

2

1

0

NTCFAIL

0

Symbol

Reset

Access

NTC

0

R/W

Table 15.ꢀNTC - NTC control register (address 39h) bit description

Bit

Symbol

Description

7

CPFAIL

Used for the internal charge pump circuit.

0 — No open or short condition is detected in the charge pump

1 — An open or short condition has happened in the external capacitor, the MLC cannot

drive the gates of the switches, and the dimming function is not available.

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Bit

Symbol

Description

6 to 1 NTC

NTC (voltage drop in the NTC resistance).

111001 — 0,980 (70 °C)

110111 — 0,951 (71 °C)

110101 — 0,924 (72 °C)

110100 — 0,897 (73 °C)

110010 — 0,871 (74 °C)

...

000111 — 0.136 (150 °C)

0

NTCFAIL

NTC fail

0 — No Open or Short condition is detected in the NTC pin

1 — An Open or Short condition is detected in the NTC pin

Table 16.ꢀID - ID control register (address 3Ah) bit allocation

Bit

7

6

5

POK

0

4

3

2

1

0

Symbol

Reset

Access

OTW_1

OTW_2

LHM_STATUS

IDENTIFICATION

ID-FAIL

0

R

Table 17.ꢀID - ID control register (address 3Ah) bit description

Bit

Symbol

Description

7

OTW_1

Overtemperature Warning 1

0 — The junction temperature does not reach the programmed threshold

1 — The junction temperature reaches the programmed threshold

6

5

4

OTW_2

Overtemperature Warning 2

0 — The junction temperature does not reach the programmed threshold

1 — The junction temperature reaches the programmed threshold

POK

MLC IC check

0 — MLC IC is not working properly or not fully operational

1 — MLC IC is working properly and fully operational

LHM_STATUS

Limp Home mode status

0 — MLC is not in LHM state

1 — The device is in Limp Home mode.

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Bit

3 to 1 IDENTIFICATION Resistor value

000 — Resistor value 1

Symbol

Description

001 — Resistor value 2

010 — Resistor value 3

100 — Resistor value 4

011 — Resistor value 5

101 — Resistor value 6

110 — Resistor value 7

111 — Resistor value 8

In this register, the microcontroller can read the identification resistor value with a 3-bit

resolution, from bit 1 to 3. Those three bits give the possibility of using eight different

resistors to characterize the board or LEDs used with the MLC IC.

0

ID-FAIL

Identification resistor fail

0 — No open or short condition is detected in the ID pin.

1 — An open or short condition is detected in the ID pin.

Table 18.ꢀInternal Status - Internal status control register (address 3Bh) bit allocation

Bit

7

6

5

4

3

2

1

0

Symbol

Reset

Access

TXD_BUFFER_OVERFLOW

unused

0

R

Table 19.ꢀInternal Status - Internal status control register (address 3Bh) bit description

Bit

Symbol

Description

7

TXD_BUFFER_

OVERFLOW

Used to flag a message buffer overflow

0 — The communication buffer has less than three messages in the queue

1 — The communication buffer has three or more messages in the queue

Note: The MLC communication buffer has four free spaces. If the microcontroller continues

requesting information and does not give time for the MLC to answer, then when the buffer is

overflowed, the MLC will start overwriting the content of the last position.

6 to 0

unused

8.7 Internal oscillator 200 MHz for digital blocks

The internal oscillator provides the clock signal for the internal digital blocks. This block

is automatically trimmed to generate a 200 MHz clock signal with 10 % accuracy. The

200 MHz oscillator and an adaptive prescaler gives the 10 MHz needed for the serial

CAN communication. The preamble of the CAN message (standard-ID) is used to

calibrate the prescaler. Therefore, the CAN clock has an accuracy of less than 0.25 %.

The internal oscillator helps to reduce the system cost and improves the system behavior

when synchronizing the internal modules and different MLCs. This feature also helps the

MLC system to have a superior EMC behavior.

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8.8 Charge Pump

The charge pump mechanism integrated in the ASL5xxxyHz family is able to detect

the maximum LED string voltage to have a voltage always at least 5 V higher than the

maximum detected LED string voltage. This action allows the internal charge pump

circuit to drive all the switches of the MLC without any problem and in a safe way. This

intelligent charge pump controls all the blocks, even when they are driving different LED

strings with different configurations. The charge pump only requires one external small

capacitor.

The multiplexer that is connected to the highest switches in every floating block is

responsible for detecting the maximum voltage of the LED string. With this mechanism,

the Matrix LED Controller (MLC), is able to detect the maximum voltage in the blocks

even when they are controlling different LED strings.

The charge pump mechanism needs an external capacitor. The external capacitor value

selections are described in Table 20.

Table 20.ꢀExternal charge pump capacitor selection

N° of switches in parallel

Minimum capacitor

4.7 nF / 16 V / X7R

10 nF / 16 V / X7R

15 nF / 16 V / X7R

22 nF / 16 V / X7R

Comments

—

2

No blocks in parallel

2 blocks in parallel

3 blocks in parallel

4 blocks in parallel

3

4

The selection criteria are based on the current and gate charge required to close the

switches safely. When blocks are parallel, more current is required to act in more

switches at the same time, for that reason the charge pump capacitor has a greater

value.

The maximum allowed capacitor value in the CP pin is 68 nF, because a higher value

can affect the IC startup time and may produce a CPFAIL status.

A 220 pF capacitor should be connected between the VMAX pin and ground (100 V

capacitor) to reduce the charge pump ripple and the electromagnetic emissions. The

capacitor con also be connected between VMAX pin and SW15 pin (16 V capacitor) See

Figure 6.

8.9 Charge pump fail-safe operation mode (CPFSO)

In case of failure in the internal charge pump circuit or external charge pump capacitor,

the Matrix LED Controller (MLC) enters in a fail-safe operation mode (CPFSO) to provide

the maximum operability as possible.

If the charge pump fails, the MLC is not able to drive the following:

• Top switch of the top block, in case of driving LED segment.

• First two switches of the top block, in case of driving single LED per switch.

The charge pump fail-safe operation mode starts when the MLC detects a problem in the

charge pump. Depending on the open circuit threshold programmed in the MTP, it opens

(high ohmic state) the first switch of the top block (OC = 1) or the first two switches of the

top block (OC = 0).

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Table 21.ꢀOC threshold selection and CPFSx selection in MTP

Register

Bit

4

Symbol

OC1

Description

58h

59h

5Ah

5Bh

5Ch

5Dh

5Eh

5Fh

OC threshold selection for Block 1

OC threshold selection for Block 2

OC threshold selection for Block 3

OC threshold selection for Block 4

Select Block 1 as top block

4

OC2

4

OC3

4

OC4

15

CPFS0

CPFS1

CPFS2

CPFS3

Select Block 2 as top block

Select Block 3 as top block

Select Block 4 as top block

If the OC bit is set to 0, the open circuit threshold is 6 V ±1 V, if it is 1, then the threshold

is 17 V ±1.5 V.

In case of OC = 0 and a failure in the charge pump, the MLC opens the first two switches

of the Blocks with a 1 in the linked CPFSx bit. When OC = 1, the MLC opens only the top

switch of the selected blocks.

With this practice, if the MLC is in normal operation mode, it is able to continue driving

the rest of switches with the programmed PWM.

In case the MLC is in LHM, the fail-safe operation reaction is the same and it continues

respecting the LHM configuration programmed in the MTP for the rest of the switches.

Note: CPFS3 is linked to Block 4 of switches; these are the top switches if all blocks are

in series. This bit should be the only one set to 1, of CPFSx bits, when all blocks are in

serial configuration.

8.10 Matrix LED controller interface and configuration

The ASL5xxxyHz family incorporates a CAN controller for communication with the

microcontroller. CAN-FD versions (ASL5xxxFHz) are also available in the ASL5xxxyHz

family. If these versions are required, please contact NXP Semiconductors.

This serial interface is used to write into internal registers and read the data from

the diagnostics register. The interface is also used to monitor any fault flags. The

microcontroller has full control via the bus interface.

No external clock is required for the oversampling, due to the on-chip 200 MHz oscillator.

More information regarding On-Board and Off-Board configuration can be found in the

application notes.

There are two physical options:

• When the microcontroller is located close to the MLC and on the same PCB, there can

be a direct connection using the TX and RX lines. No physical layer is needed.

• When the microcontroller is on a separate board or otherwise far away (> 10 cm) from

the MLC, two CAN physical layer transceivers are needed. The physical layer will

guarantee a robust and reliable communication over a long distance.

In both configurations, the clock signal, generated by the internal oscillator, is divided

by an adaptive prescaler to calibrate the clock to the incoming data. This process is to

ensure a common communication speed.

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Matrix LED Controller (MLC)

Synchronization between MLCs is therefore done through CAN communication. There is

no need for a separate sync signal, which can compromise EMI performance and board

layout.

The communications protocol is byte-oriented. Because up to 32 devices can be

connected together, five bits are sufficient to address the MLC device. Extended ID is

used for addressing the device and differentiate between oriented or broadcast message.

The Standard ID includes the preamble to synchronize all devices in the bus and ensure

a CAN clock accuracy of less than 0.25 %.

8.11 External IC addressing

To make logistics easier, the MLC can be addressed externally with specific hardware

configuration of pins from A0 to A4.

Five pins are available to address the MLC externally. Therefore, the system can connect

up to 32 MLCs. The same physical layer, in case of an off-board configuration, can

control all of these MLCs.

All these pins have an internal pull-up resistor of 60 kΩ. Thus, if a logic 1 is needed, the

pin should remain floating. If a logic 0 is needed, the pin should be connected to ground.

8.12 Protection against missing V_CC

When V_CCis missing, the MLC is off and all switches remain open. But when V_CCis

present and the device is working properly, it sets a bit in the diagnostics register that the

microcontroller can read (POK). The microcontroller should only enable the LED driver

when it is able to read this bit.

8.13 LED brightness calibration factor

The LED brightness calibration factor can be programmed and read out from the MTP

of the MLC by the microcontroller. This capability allows the customer to correct for any

differences in the luminance of LEDs, as a result of LED production spread, automatically

inside the MLC.

The LED brightness calibration factor has a 5-bit resolution (from 0 to 31); and for that

reason, the brightness reduction can be from 0 % to 24.22 %¹. With this factor, the

microcontroller does not need to adapt the PWM duty cycle for the brightness variation,

because it is calculated inside the MLC. Therefore, when the microcontroller associates

a prestored dimming curve that delivers 100 % duty cycle to a channel, and this channel

has a brightness reduction associated to it, then the LED brightness cannot be 100 %,

but reduced by the brightness calibration factor.

The brightness reduction factor is applicable to any PWM duty cycle value and is not a

fixed value but a percentage. Two examples are shown below:

LED brightness calibration factor for both examples = 20 (10100 in the MTP)

• Example 1

– The PWM duty cycle value in the curve is 100 %

– Output brightness = 1 * (1 – (20/128)) = 0.84 = 84 %

• Example 2

– The PWM duty cycle value in the curve is 50 %

1

The factor division inside of the MLC is by 128.

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– Output brightness = 0.5 * (1 – (20/128) = 0.42 = 42 %

The examples above demonstrate that the reduced brightness value is not always the

same for the different PWM duty cycle values. The default value for all the channels is

0 % reduction.

See Section 14 "Nonvolatile Multitime Programmable Memory (MTP)" for detailed

information about the MTP selectable values.

8.14 Limp Home mode operation

When there is no communication with the microcontroller, but V_CCis present, the MLC

automatically enters Limp Home mode state (LHM). Each channel is either fully ON or

fully OFF, as defined by a bit in the MTP. This bit is programmable by the user at the end

of the production line. Default state of the switches is all OFF, which means all LEDs are

ON.

Table 22.ꢀLHM - Limp Home mode control register (address 3Ch) bit allocation

Bit

7

6

5

LHM_EXIT

0

4

3

2

1

0

MTP_CFG

0

Symbol

Reset

Access

BYPASS_BINNING

LHM_TIMEOUT

0

R/W

Table 23.ꢀLHM - Limp Home mode control register (address 3Ch) bit description

Bit

Symbol

BYPASS_BINNING Bypass binning.

0 — Scaling/calibration factor is applied to the final PWM DC calculation

Description

7

1 — Scaling/calibration factor is not applied to the final PWM DC calculation

This bit can be used to:

• Bypass the calibration factor during Camera calibration

• Measure single LED brightness during manufacturing process

Note: This bit is not related to the Limp Home Mode configuration of triggering.

6 to 4 LHM_EXIT

Limp Home mode deactivation sequence and LHM timeout refresh.^[1]

001 — Deactivation sequence, step 1

010 — Deactivation sequence, step 2

100 — Deactivation sequence, step 3

111 — LHM timeout refresh

3 to 1 LHM_TIMEOUT

Timeout setting for activation of Limp Home mode.^[2]

000 — 4.5 ms, setting 1

001 — 9 ms, setting 2

010 — 18 ms, setting 3

011 — 36 ms, setting 4

100 — 72.1 ms, setting 5

101 — 144.2 ms, setting 6

110 — 288.4 ms, setting 7

111 — 576.7 ms, setting 8

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Matrix LED Controller (MLC)

Bit

Symbol

Description

0

MTP_CFG

MTP configuration.

0 — MLC normal operation

1 — MLC in MTP configuration mode

Note: To read or write the MTP, the microcontroller must enter MTP configuration mode.

[1] When refreshing the timeout timer with 111 in bits [6:4], the Limp Home mode timeout setting is written as well in bits [3:1]

[2] When changing the Limp Home mode timeout setting, the LHM_EXIT bits should be set to “111” to refresh the timeout timer

After MTP configuration, the limp home settings are permanently stored. Once the MLC

detects a communication failure event (Limp Home mode watch dog timer runs out), the

device turns the switches ON or OFF, depending on the Limp Home mode configuration

stored in the MTP.

In case the system recovers from the error, Limp Home mode can be left via the exit

Limp Home mode sequence. With the completion of the exit sequence, the device

operates in normal conditions and the configuration registers are open for write access

again. The MLC keeps the LHM configuration in the output until the microcontroller starts

another sequence.

Limp Home and normal operation modes offer the same diagnosis behavior. This

behavior includes the undervoltage protection as well as the failure behavior (open and

short-circuit detection).

8.14.1 Limp Home mode activation

If no write to the Limp Home mode exit bits (register 3Ch, bits 6:4) with data 111 is

executed for the timeout time as defined in the Limp Home mode control register, a

Limp Home mode is automatically activated. During start-up, the MLC is preconfigured

to the maximum allowed watchdog timeout possible (576.7 ms). If this value wants to

be changed, the user must set a new watchdog timeout during the configuration of the

register. If the microcontroller does not send an LHM_Refresh command before 576.7 ms

after the startup, then the MLC automatically enters in Limp Home mode.

Before entering MTP configuration mode, refresh the watchdog timeout. During the MTP

configuration, the watchdog is stopped and the refreshing action is not necessary during

this time.

8.14.2 Limp Home mode operation

Once the system has entered Limp Home mode, the MLC switches to the configuration

as defined in the MTP memory. See Section 14 "Nonvolatile Multitime Programmable

Memory (MTP)" for more information about the Limp Home mode configuration.

During Limp Home mode, operation of the CAN interface remains functional, but only

the Limp Home mode control register can be written. The other registers offer only read

access.

8.14.3 Limp Home mode deactivation

To deactivate Limp Home mode, a dedicated Limp Home mode deactivation sequence is

written to the Limp Home mode control register.

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Matrix LED Controller (MLC)

Table 24.ꢀLimp Home mode deactivation sequence

Deactivation step

Step 1

Data to LHM_EXIT[6:4]

001

010

100

Step 2

Step 3

This sequence could be applied to any single IC or as a broadcast message.

Sequence to exit LHM in a single IC:

CMD 3 = 000011, target MLC's LHM_Exit [6:4] bits with 3 bytes of data in the data field.

Only one CAN message is needed to exit the LHM status.

The order in Table 25 shows from byte 0 to byte 2 in the CAN message data field.

Table 25.ꢀLimp Home mode exit sequence messages

Address

Register

D7

D6

D5

D4

D3

D2

D1

D0

3Ch

LHM

0

1

111

0

Address

Register

D7

D6

D5

D4

D2

D0

3Ch

LHM

0

1

0

111

0

Address

Register

D7

D6

D5

D4

D2

D0

3Ch

LHM

0

1

0

111

0

Message:

Command = 3

Data_0 = 1E

Data_1 = 2E

Data_2 = 4E

Sequence to exit LHM with a broadcast or selective message:

Command 3 is used for selective LHM exit and command 38 for broadcast LHM exit.

Once the deactivation sequence is completed, the MLC is immediately fully operational.

LEDs will follow LHM configuration until the microcontroller starts a new sequence.

8.15 Communication interface

The ASL5xxxyHz family uses a CAN interface to communicate with an external

microcontroller. The CAN interface can be used for setting all the registers related to the

12 available channels and other configuration registers. See Section 10 "ASL50xxyHz

Register map" and Section 11.1 "ASL51xxSHy Register MAP".

If the MLC system is on a board other than the board that has the microcontroller, a CAN

physical layer should be used (CAN transceiver) and TXD and RXD should be connected

between the transceiver and the different MLC ICs.

If the MLC system is on the same board of the microcontroller, a physical layer is not

needed and just the TXD and RXD pins of the different ICs should be connected, as well

as a pull-up resistor and a bridge between TXD and RXD line. The pull-up resistor should

not allow current higher than 4 mA in the TXD and RXD pins.

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The first byte to be read by the MLC is the Most Significant Byte (MSB). Data byte 1

(DB1) in Figure 11.

To ensure a robust communication and an accuracy in the CAN clock of less than

0.25 %, the microcontroller sends a dummy clock trimming every 9 ms. The message

uses the CAN command 34 and it has no data in the data field. If another message has

a cycle of less than 9 ms, then the clock trimming is done with this message and the

dummy clock trimming message is not needed any more.

The MLC can be controlled by several ECUs thanks to the reserved bits in the extended

ID. These bits help to identify the different masters controlling the same MLC or

controllers and also gives the possibility of setting a priority due to the known arbitration

of the CAN protocol.

The master microcontroller can use the same CAN controller to communicate with the

rest of the vehicle and with the MLC. The designer just needs to ensure there are no

message collisions, which respects ISO CAN rules.

8.16 Application protocol

Master to Slave command is always with Extended ID and fixed value in the Standard ID

field for synchronization as shown in Figure 11.

Measure

and

calibrate

rec

DB1

DB8

dom

Idle

(11)

Std-ID

(11)

Ext-ID

(18)

Data

(0...8 byte)

CRC

(15)

EoF

(10)

SoF

SRTR

IDE

RTR DLC

r1 r0 (4)

Del

Ack

aaa-026613

Figure 11.ꢀCAN Ext-ID frame

All the MLC ICs are synchronized in every CAN frame they receive, ensuring good

synchronization between ICs and a very accurate sampling clock, with an accuracy of

less than 0.25 %.

Table 26.ꢀStandard-ID and the synchronization sequence

Standard-ID

1

0

1

0

1

0

1

0

1

0

1

Table 27.ꢀExtended-ID format

Extended-ID

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

reserved

CMD[10:5]

Address[4:0]

Reserved = should be 0 to fit with the ID of the supplied DBC file. These bits can also

be used to drive the MLC or group of MLCs with multiple masters or to avoid message

collision when using the same CAN controller in the main microcontroller to communicate

with the rest of the vehicle.

Address [4:0]: MLC device address (up to 32 ICs in the same CAN network)

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Matrix LED Controller (MLC)

9 CAN commands

Table 28.ꢀCAN and CAN-FD commands

Command Type

CMD[10:5]

Description

PWM Mode CAN/CAN CAN Valid CAN-FD Valid Other Invalid conditions

-FD

DLC

(Smart /

Direct)

0

1

Selective Consecutive

register write

All

2 to 8

3 to 15

LHM Mode || Number of Reg. fitting

DLC(CAN-FD)* || No.of Registers = 0

Selective Selective

register write

All

2, 4, 6, 8

3, 5, 7, 9 to 15 LHM Mode || Number of Reg. fitting

DLC(CAN-FD)* || No.of Registers = 0

2

3

4

Invalid command

Selective LHM exit

All

3

2

3

2

NA

Selective MLC channel All

start

LHM mode

5

Selective MLC channel All

All

2

LHM mode

immediate

OFF

6

7

Selective LHM refresh

All

1

0

1

0

NA

Selective Dummy

trimming

8

Selective Write direct

PWM CH

Direct

All

8

NA

LHM mode

1,2,3,4

9

Selective Write direct

PWM CH

5,6,7,8

10

Selective Write direct

PWM CH

9,10,11,12

11

12

Invalid command

Broadcast Write all PWM Direct

- 2 MLCs registers

only

CAN-FD

NA

14

LHM mode

NA

13

14

Selective Diagnosis

ADC trigger

All

0

4

0

4

Selective MTP write

All

LHM mode || MTP_Locked || Invalid

Key || mtp_cfg = 0

15

16

Invalid command

Selective Consecutive

register read

All

CAN

1

NA

17

18

19

20

21

Selective Selective

register read

All

CAN

1 to 8

0

NA

Selective Diagnosis

read

All

0

Selective Consecutive

register read

All

CAN-FD

All

NA

0

2

Number of Reg. fitting DLC(CAN-FD)*

|| No.of Registers = 0

Selective Selective

register read

All

2 to 15

0

Number of Reg. fitting DLC(CAN-FD)*

|| No.of Registers = 0

Selective Read smart

PWM

Smart

NA

feedback

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Matrix LED Controller (MLC)

Command Type

CMD[10:5]

Description

PWM Mode CAN/CAN CAN Valid CAN-FD Valid Other Invalid conditions

-FD

DLC

(Smart /

Direct)

22

23

24

25

26

27

28

29

30

Invalid command

Selective MTP read

All

2

LHM mode || MTP_Locked || Invalid

Key

31

32

Invalid command

Broadcast MLC channel All

start

All

2

LHM mode

33

Broadcast MLC channel All

immediate

OFF

34

35

36

Broadcast Dummy

trimming

All

0

NA

Broadcast POK register

read

Broadcast POR register

read

37

38

39

Broadcast LHM refresh

Broadcast LHM exit

All

1

3

0

1

3

0

NA

Broadcast Clear all OC/

SC flags

40

41

42

43

44

Broadcast Diagnosis

read

All

0

NA

Broadcast Go to sleep

Broadcast Partial sleep

Broadcast Partial wake

All

0

LHM mode || Partial networking

enabled

All

4

LHM mode || partial networking

disabled

All

4

LHM mode || partial networking

disabled || Not in Sleep mode

Broadcast Write all PWM Direct

CAN-FD

NA

12

LHM mode

registers of all

MLCs

45

46

Broadcast Read smart

PWM

Smart

All

0

NA

feedback

Broadcast Diagnosis

ADC trigger

NA

47

48

49

50

Invalid command

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Matrix LED Controller (MLC)

Command Type

CMD[10:5]

Description

PWM Mode CAN/CAN CAN Valid CAN-FD Valid Other Invalid conditions

-FD

DLC

(Smart /

Direct)

51

52

53

54

55

56

57

58

59

60

61

62

63

Invalid command

Broadcast Junction

All

0

LHM mode

temperature

read

Note: Invalid Flag is not set when device is in SLEEP mode. Read or write MTP during

LHM state is also not a valid scenario.

Table 29.ꢀNumber of Register fitting DLC (CAN - FD)

DLC

0

CMD - 0

Invalid

1

CMD - 1

Invalid

1

CMD - 19

Invalid

≤ 64

CMD - 20

Invalid

1

2

3

Invalid

≤ 2

4

≤ 2

Invalid

≤ 2

≤ 3

5

≤ 3

≤ 4

6

≤ 4

Invalid

≤ 3

≤ 5

7

≤ 5

≤ 6

8

≤ 6

Invalid

≤ 5

≤ 7

9

≤ 10

≤ 14

≤ 18

≤ 22

≤ 30

≤ 46

≤ 62

≤ 11

≤ 15

≤ 19

≤ 23

≤ 31

≤ 47

≤ 63

10

11

12

13

14

15

≤ 7

≤ 9

≤ 11

≤ 15

≤ 23

≤ 31

For more information regarding CAN commands, refer to the application notes.

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Matrix LED Controller (MLC)

Table 30 represents the Standard-ID format when the MLC answers the microcontroller

petition.

Table 30.ꢀStandard–ID format in a response frame

1

A4

A3

A2

A1

A0

A4 to A0: MLC IC address

When the microcontroller configures the MLC registers, Standard-ID = 555h is used

for baud rate calculations and synchronization. Because the Standard-ID is fixed in the

message from the microcontroller to the Matrix controllers, and arbitration is done during

this time, the microcontroller always wins the arbitration phase in the second bit.

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Matrix LED Controller (MLC)

10 ASL50xxyHz Register map

Table 31.ꢀASL50xxyHz Register map

Address

Register

D7

D6

D5

D4

D3

D2

D1

D0

Reset

0

CURVID1

SH1[7:5]

AUTO1

NOW1

CURVEID1[2:0]

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

00000000

11111111

1

STARTPOS1

STOPPOS1

DELAY1

STARTPOS1[7:0]

STOPPOS1[7:0]

DELAY1[7:0]

2

3

4

CURVID2

SH2[7:5]

SH3[7:5]

SH4[7:5]

SH5[7:5]

SH6[7:5]

SH7[7:5]

SH8[7:5]

SH9[7:5]

SH10[7:5]

SH11[7:5]

AUTO2

NOW2

CURVEID2[2:0]

CURVEID3[2:0]

CURVEID4[2:0]

CURVEID5[2:0]

CURVEID6[2:0]

CURVEID7[2:0]

CURVEID8[2:0]

CURVEID9[2:0]

CURVEID10[2:0]

CURVEID11[2:0]

5

STARTPOS2

STOPPOS2

DELAY2

STARTPOS2[7:0]

STOPPOS2[7:0]

DELAY2[7:0]

6

7

8

CURVID3

AUTO3

NOW3

9

STARTPOS3

STOPPOS3

DELAY3

STARTPOS3[7:0]

STOPPOS3[7:0]

DELAY3[7:0]

A

B

C

CURVID4

AUTO4

NOW4

D

STARTPOS4

STOPPOS4

DELAY4

STARTPOS4[7:0]

STOPPOS4[7:0]

DELAY4[7:0]

E

F

10

11

12

13

14

15

16

17

18

19

1A

1B

1C

1D

1E

1F

20

21

22

23

24

25

26

27

28

29

2A

CURVID5

AUTO5

NOW5

STARTPOS5

STOPPOS5

DELAY5

STARTPOS5[7:0]

STOPPOS5[7:0]

DELAY5[7:0]

CURVID6

AUTO6

NOW6

STARTPOS6

STOPPOS6

DELAY6

STARTPOS6[7:0]

STOPPOS6[7:0]

DELAY6[7:0]

CURVID7

AUTO7

NOW7

STARTPOS7

STOPPOS7

DELAY7

STARTPOS7[7:0]

STOPPOS7[7:0]

DELAY7[7:0]

CURVID8

AUTO8

NOW8

STARTPOS

STOPPOS

DELAY8

STARTPOS8[7:0]

STOPPOS8[7:0]

DELAY8[7:0]

CURVID9

AUTO9

NOW9

STARTPOS9

STOPPOS9

DELAY9

STARTPOS9[7:0]

STOPPOS9[7:0]

DELAY9[7:0]

CURVID10

STARTPOS10

STOPPOS10

DELAY10

AUTO10

NOW10

STARTPOS10[7:0]

STOPPOS10[7:0]

DELAY10[7:0]

CURVID1

AUTO11

NOW11

STARTPOS11

STOPPOS11

STARTPOS11[7:0]

STOPPOS11[7:0]

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Address

2B

Register

D7

D6

D5

D4

D3

D2

D1

D0

Reset

DELAY11

CURVID12

STARTPOS12

STOPPOS12

DELAY12

IMMOFF 1

IMMOFF 2

START 1

DELAY11[7:0]

00000000

11111111

00000000

2C

SH12[7:5]

AUTO12

NOW12

CURVEID12[2:0]

2D

STARTPOS12[7:0]

STOPPOS12[7:0]

DELAY12[7:0]

2E

2F

30

IMMOFF8

CH8

IMMOFF7

IMMOFF6

CH6

IMMOFF5

IMMOFF4

IMMOFF3

IMMOFF2

IMMOFF1

31

unused

IMMOFF12 IMMOFF11 IMMOFF10 IMMOFF9

32

CH7

CH5

CH4

CH12

MTP_

CH3

CH11

MTP_

CH2

CH10

CH1

CH9

33

START 2

unused

34

CLEAR

POR

Illegal_

MTP_

REG_

CLR_OC

CLR_SC

command

Locked

ILLEGAL_

ACCESS

ILLEGAL_ ACCESS_

ACCESS

STATUS

35

36

37

38

39

3A

READ_OC1

READ_OC2

READ_SC1

READ_SC2

NTC

OC8

SC8

OC7

OC6

SC6

OC5

OC4

OC3

OC2

OC10

SC2

OC1

OC9

00000000

unused

OC12

SC4

OC11

SC3

SC7

SC5

SC1

unused

SC12

SC11

SC10

SC9

CPFAIL

OTW_1

NTC[6:1]

NTCFAIL

ID-FAIL

ID

OTW_2

POK

LHM_

ID[3:1]

STATUS

3B

3C

Internal_Status

LHM

TXD_

Buffer_Full

unused

00000000

Bypass_

binning

LHM_EXIT[6:4]

LHM_TIMEOUT[3:1]

MTP_CFG

3D

3E

3F

40

41

42

43

44

45

46

47

48

49

4A

4B

4C

4D

4E

4F

50

51

52

53

54

55

MTP Write Control1

MTP Write D1

MTP Write D2

MTP Read D1

MTP Read D2

ReadCH1-LB

ReadCH1-MB

ReadCH2-LB

ReadCH2-MB

ReadCH3-LB

ReadCH3-MB

ReadCH4-LB

ReadCH4-MB

ReadCH5-LB

ReadCH5-MB

ReadCH6-LB

ReadCH6-MB

ReadCH7-LB

ReadCH7-MB

ReadCH8-LB

ReadCH8-MB

ReadCH9-LB

ReadCH9-MB

ReadCH10-LB

ReadCH10-MB

unused

MTP Register Adress [6:0]

00000000

MTP Write Data D1 [7:0]

MTP Write Data D2 [7:0]

MTP Read Data D1 [7:0]

MTP Read Data D2 [7:0]

PWM[7:0]

unused

PWM[11:8]

PWM[7:0]

unused

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ASL5xxxyHz

Matrix LED Controller (MLC)

Address

Register

D7

D6

D5

D4

D3

D2

D1

D0

Reset

56

57

58

59

ReadCH11-LB

ReadCH11-MB

ReadCH12-LB

ReadCH12-MB

PWM[7:0]

00000000

unused

PWM[11:8]

11 Direct PWM mode – ASL51xxyHz.

The MLC ASL51xxyHz provides the possibility of sending direct PWM data to every

channel. The microcontroller provides all the dimming curves; and the PWM duty cycle

value must be updated in every PWM period, if the duty cycle has to be changed.

Each channel needs 12 bits for the PWM duty cycle that can be updated every PWM

cycle

Full diagnosis is available in these part numbers.

Because the amount of data in the bus is greater than in the smart mode (ASL50xxyHz),

a higher baud rate may be needed. The available baud rates in the MLC are 125 Kbps,

250 Kbps, 500 Kbps and 1 Mbps. The communication interface data rate should be

selected to fulfill the system latency requirement. This latency is the time from when the

microcontroller sends the new PWM duty cycle value to the moment the MLC executes it.

The addressing of the MLC is done using the Extended-ID. The Standard-ID is used

for clock synchronization purpose with the fixed sequence/preamble equal to 555h. All

the MLCs are synchronized in every CAN massage, ensuring a good synchronization

between the different MLC ICs and a very accurate sampling clock, with an accuracy of

less than 0.25 %.

11.1 ASL51xxSHy Register MAP

Table 32.ꢀASL51xxSHy register map

Address Register

D7

D6

D5

D4

D3

D2

D1

D0

Reset

Values

0

1

2

3

4

5

6

7

8

9

A

B

C

D

E

DIRECT_CH1_LB

PWM[7:0]

00000000

DIRECT_CH1_UB

DIRECT_CH2_LB

DIRECT_CH2_UB

DIRECT_CH3_LB

DIRECT_CH3_UB

DIRECT_CH4_LB

DIRECT_CH4_UB

DIRECT_CH5_LB

DIRECT_CH5_UB

DIRECT_CH6_LB

DIRECT_CH6_UB

DIRECT_CH7_LB

DIRECT_CH7_UB

DIRECT_CH8_LB

unused

PWM[11:8]

PWM[7:0]

PWM[11:8]

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ASL5xxxyHz

Matrix LED Controller (MLC)

Address Register

D7

D6

D5

D4

D3

D2

D1

D0

Reset

Values

F

DIRECT_CH8_UB

DIRECT_CH9_LB

DIRECT_CH9_UB

DIRECT_CH10_LB

DIRECT_CH10_UB

DIRECT_CH11_LB

DIRECT_CH11_UB

DIRECT_CH12_LB

DIRECT_CH12_UB

unused

PWM[11:8]

00000000

10

11

12

13

14

15

16

17

PWM[7:0]

PWM[11:8]

PWM[7:0]

unused

18 to 2F reserved

30

31

IMMOFF 1

IMMOFF 2

IMMOFF8 IMMOFF7 IMMOFF6 IMMOFF5 IMMOFF4 IMMOFF3 IMMOFF2 IMMOFF1 00000000

unused

IMMO

FF12

IMMO

FF11

IMMO

FF10

IMMOFF9 00000000

32

33

34

START 1

START 2

CLEAR

CH8

POR

CH7

CH6

CH5

CH4

CH12

MTP_

CH3

CH11

MTP_

CH2

CH1

CH9

00000000

unused

CH10

Illegal_

MTP_

REG_

CLR_OC CLR_SC 00000000

command Locked ILLEGAL_ ILLEGAL_ ACCESS_

ACCESS ACCESS STATUS

35

36

37

38

39

3A

READ_OC1

READ_OC2

READ_SC1

READ_SC2

NTC

OC8

SC8

OC7

OC6

OC5

OC4

OC12

SC4

OC3

OC11

SC3

OC2

OC10

SC2

OC1

OC9

SC1

SC9

00000000

unused

SC7

SC6

SC5

SC12

SC11

SC10

CPFAIL

OTW_1

NTC[6:1]

NTCFAIL 00000000

ID-FAIL 00000000

ID

OTW_2

POK

LHM_

ID[3:1]

STATUS

3B

3C

Internal_Status

LHM

TXD_

Buffer_

Full

unused

00000000

BYPASS_

BINNING

LHM_EXIT[6:4]

LHM_TIMEOUT[3:1]

MTP Register Adress [6:0]

MTP_

CFG

00000000

3D

3E

3F

40

41

MTP Write Control1 unused

MTP Write D1

00000000

MTP Write Data D1 [7:0]

MTP Write Data D2 [7:0]

MTP Read Data D1 [7:0]

MTP Read Data D2 [7:0]

MTP Write D2

MTP Read D1

MTP Read D2

All cells presented in the register map are configurable by the customer. If the

microcontroller tries to write in the reserved registers, from 18h to 2Fh, the Matrix

LED controller (MLC) will raises an error flag. This means that bit 4 of register 34h,

REG_ILLEGAL_ACCESS, is set to 1. This bit can be cleared by writing a 1 on it.

12 Sleep and Wake Up

The MLC can enter in Sleep mode and drastically reduce the current consumption, giving

the possibility to make an energy efficient system.

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ASL5xxxyHz

Matrix LED Controller (MLC)

The microcontroller can put the entire Matrix LED Controller to sleep with a single

broadcast message:

• CAN message for Sleep mode (Broadcast): (Partial Networking must be deactivated)

• Command = 41

• DLC = 000 (no data in the CAN message)

This command is ignored only if the MLC is in Limp Home mode state.

All the MLCs go to sleep when they receive this broadcast message, but the CAN

controller continues watching the bus and in case any change occurs in the CAN bus, the

CAN controller wakes up the MLC immediately.

In Sleep mode, the MLC consumes less than 1.35 mA. In case the system has MLCs

in sleep and others in the same bus in wake (Partial Networking), refer to Section 13

"Partial networking for Sleep and Wake Up (message based)".

Send a message to refresh the Limp Home mode watchdog timer (register 3Ch) right

before sending the MLCs to sleep. Refreshing the timer this way avoids reaching the

timeout setting during the send-to-sleep process. During sleep mode, the watchdog

timer to enter in Limp Home mode in case of communication failure is stopped and

refresh action is not required during this mode. Any watchdog refresh action from the

microcontroller during Sleep mode wakes up the MLCs.

If the MLC wakes up due to a noise in the CAN bus, the MLC returns to sleep, in case it

does not receive any message in the period of the maximum value of the watchdog timer

(576.7 ms). In this case, the MLC does not enter the Limp Home mode state, but returns

to sleep mode. The MLC wakes up only if the microcontroller orders it to do so.

A synchronization action must be performed in the bus after waking them up. The

synchronization is done by sending three consecutive messages from the microcontroller

with no data on them (dummy-trimming message). The preamble of these messages

is used to trim the CAN clock and synchronize all the MLCs in the bus. A broadcast

trimming action is done to be sure that all the MLCs are synchronized and able to send

information to the microcontroller.

13 Partial networking for Sleep and Wake Up (message based)

In both messages, Sleep and Wake Up in partial networking, each bit of the bytes of the

data field of the CAN message is linked to an MLC. See Table 33. The partial networking

control messages, for Sleep or Wake Up, always has 4 bytes of data, the same 32 bits.

Due to the address pins (5, from A0 to A4) of the MLC, up to 32 MLCs in the same

CAN bus can connect. For that reason, the number of bits in the message fits with the

maximum number of MLCs that can be in the same Bus.

These two messages are always broadcast and the MLCs receive the messages whether

the MLCs are in normal operation or in sleep mode. These messages are ignored only if

the MLC is in Limp Home mode.

In both cases, the MLC reacts only to the bit that is linked with its address. For example,

the MLC with address 0 reacts to the first bit of the first byte of the message, or what is

the same, it reacts to the value of the MS bit of the first byte. See Table 33.

If the bit is 1, the MLC goes to sleep, in case the message is intended to send the MLC to

sleep, or wakes up the IC, in case the message is intended for this action.

Table 33 describes the distribution of the MLCs in the different bytes of the massages.

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ASL5xxxyHz

Matrix LED Controller (MLC)

Table 33.ꢀMLCs linked to the bits

Byte_0 (MSB in the CAN message)

MLC_0

MLC_1

MLC_2

MLC_10

MLC_18

MLC_26

MLC_3

MLC_4

MLC_5

MLC_13

MLC_21

MLC_29

MLC_6

MLC_14

MLC_22

MLC_30

MLC_7

MLC_15

MLC_23

MLC_31

Byte_1

MLC_8

MLC_16

MLC_24

MLC_9

MLC_11

MLC_19

MLC_12

Byte_2

MLC_17

MLC_25

MLC_20

Byte_3

MLC_27

MLC_28

Refresh the Limp Home mode watchdog timer (register 3Ch) right before sending any

MLC to sleep, to avoid reaching the timeout setting during the send-to-sleep process.

During sleep mode, the watchdog timer is stopped; a refresh action is not required during

this mode. If any refresh action is intended during sleep mode, the MLC does not take

care of it, because it waits only for a wake-up message.

13.1 CAN message configuration for Partial_Sleep and Partial_Wake

Both messages are broadcast and received by all the MLCs connected to the CAN bus.

CAN message for Partial-Sleep:

Command –> 42

DLC –> 4

Data byte_0 (MSB) –> Byte0

Data byte_1 –> Byte1

Data byte_2 –> Byte2

Data byte_3 –> Byte3

CAN message for Partial-Wake:

Command –> 43

DLC –> 4

Data byte_0 (MSB) –> Byte0

Data byte_1 –> Byte1

Data byte_2 –> Byte2

Data byte_3 –> Byte3

In case of waking any of the MLCs up, a broadcast clock trimming action must be

performed. The clock trimming is done by three consecutive messages from the

microcontroller with no data on them (dummy trimming message). The preamble of these

messages is used to trim the CAN clock and synchronize all the MLCs in the bus.

Note: When partial networking is based on message recognition, the MLC continues to

have part of the analog and CAN controller activated during sleep mode.

14 Nonvolatile Multitime Programmable Memory (MTP)

The nonvolatile Multitime Programmable Memory (MTP) is used to store:

• Predefined coefficients for the PWM dimming curves (only in ASL50xxyHz — Smart

mode)

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ASL5xxxyHz

Matrix LED Controller (MLC)

• PWM frequency selection (244 Hz or 488 Hz)

• Slew rate control per block (individual)

• Switching phase shifting sequences for the different floating blocks

• Limp Home mode sequence

• Communication baud rate

• Open-circuit detection threshold

• Single / Multiple MLCs (internal push/pull configuration)

• LED calibration / scaling factor (5-bits per channel)

• Overtemperature warning (OTW1 and OTW2) thresholds

• Standby mode (full / partial networking)

• MTP Lock Key and counter

• Short-circuit blanking time selection

• Charge pump fail-safe operation mode (CPFSO)

• Free customer data (~ 480-bit)

• Internal configuration (not accessible by user)

The MTP can be programmed at the end of the production line (once the MLC is

populated on the PCB). The CAN interface can be used to program all the values in the

registers. Table 34 shows the registers to write and read from the MTP, together with a

detailed write and read sequence.

Table 34.ꢀMTP Read/Write

Address

Register

D7

D6

D5

D4

D3

D2

D1

D0

3Dh (R/W) MTP control

3Eh (R/W) MTP Write D1

3Fh (R/W) MTP Write D2

unused

MTP Register Address

MTP Write Data D1 [7:0]

MTP Write Data D2 [7:0]

MTP Read Data D1 [7:0]

MTP Read Data D2 [7:0]

40h (R)

41h (R)

MTP Read D1

MTP Read D2

Write and read process flow charts are available in the application notes.

14.1 MTP memory map

Table 35.ꢀMTP memory map

MTP Registers (16 bits registers)^[1][2]

10

No.

Bits

Add

ress

Block

15

14

13

12

11

9

8

7

6

5

4

3

2

1

0

1

00h

01h

~

16

reserved^[3]

~

112

7

MTP Write Counter0^[4]

IC Version^[4]

07h

~

reserved

880

896

912

928

944

55

56

57

58

59

37h

38h

39h

3Ah

3Bh

A

B

C

D

Value has no impact^[5]

Curve 0 coefficients

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ASL5xxxyHz

Matrix LED Controller (MLC)

MTP Registers (16 bits registers)^[1][2]

10

No.

Add

ress

Block

Bits

15

14

13

12

11

9

8

7

6

5

4

3

2

1

0

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

A

B

C

D

960

60

61

62

63

64

65

66

67

68

69

70

71

72

73

74

75

76

77

78

79

80

81

82

83

84

85

86

87

3Ch

3Dh

3Eh

3Fh

40h

41h

42h

43h

44h

45h

46h

47h

48h

49h

4Ah

4Bh

4Ch

4Dh

4Eh

4Fh

50h

51h

52h

53h

54h

55h

56h

57h

976

Curve 1 coefficients

Curve 2 coefficients

Curve 3 coefficients

Curve 4 coefficients

Curve 5 coefficients

Curve 6 coefficients

Curve 7 coefficients

992

1008

1024

1040

1056

1072

1088

1104

1120

1136

1152

1168

1184

1200

1216

1232

1248

1264

1280

1296

1312

1328

1344

1360

1376

1392

Overtemperature

Warning 1

Overtemperature

Warning 0

1408

88

Phase1

LHM defs1–3

OC1

Slew1[3:0]

58h

1424

1440

1456

1472

1488

1504

1520

89

90

91

92

93

94

95

Phase2

Phase3

Phase4

LHM defs4–6

LHM defs7–9

LHM defs10–12

OC2

OC3

OC4

Slew2[3:0]

Slew3[3:0]

Slew4[3:0]

59h

5Ah

5Bh

5Ch

5Dh

5Eh

5Fh

Value has no impact^[5]

CPFS0

CPFS1

CPFS2

CPFS3

LED binning3

LED binning6

LED binning9

LED binning12

LED binning2

LED binning1

LED binning4

LED binning7

LED binning10

LED binning5

LED binning8

LED binning11

MTP fail

counter

Part

netw. timer

SC

Multi- PWM

MLC freq

1536

1552

96

97

MTP lock key

CAN speed

60h

61h

MTP Write Counter1^[4]

Diode_Trim_Value^[4]

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ASL5xxxyHz

Matrix LED Controller (MLC)

MTP Registers (16 bits registers)^[1][2]

10

No.

Add

ress

Block

Bits

15

14

13

12

11

9

8

7

6

5

4

3

2

1

0

1568

1584

1600

1616

1632

98

99

62h

63h

64h

65h

66h

~

100

101

102

Free space (480-bits). User definable. User can write any information in this space.

~

2016

2032

126

127

7Eh

7Fh

[1] All cells are read/write unless specified otherwise

[2] All the values stored in the MTP start from the Most Significant bit (MSb) to the Less Significant Bit (LSb).

[3] These cells are used for internal MLC configuration. If the microcontroller tries to read or write in these cells, an error flag is raised (bits 2 and 3 of register

34h).

[4] Read only. If the microcontroller writes a value in this cell, the system does not raise an error flag, but also does not write any value in the cell.

[5] Any value has no impact in the MLC configuration. Write a 0 when a write message is sent.

The internal curves' coefficients have 13 bits each, because they are signed coefficients.

If the user wants to program a negative coefficient, the first bit must be a logical 1.

Negative coefficients are fully allowed and help to have all possible curves' shapes with a

3rd grade polynomial equation.

Note: Registers from 0x38h to 0x57h (curves coefficients) will not have any effect in the

Direct PWM

14.1.1 Registers value selection criteria

Table 36.ꢀPWM frequency selection

Register

Bit D0

Frequency

244 Hz (default)

488 Hz

0

1

60h

Table 37.ꢀSlew rate selection

Register

Bit D3

Bit D2

Bit D1

Bit D0

[V/µs]

0,2

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

0,4

0,6

0,9

58h (SR1)

59h (SR2)

5Ah (SR3)

5Bh (SR4)

1,1

1,3

1,5

1,7 (default)

1,9

2,3

2,8

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ASL5xxxyHz

Matrix LED Controller (MLC)

Register

Bit D3

Bit D2

Bit D1

Bit D0

[V/µs]

3,2

1

0

1

0

1

0

1

0

1

3,8

4,5

5,5

6,8

Table 38.ꢀPhase shifting sequence in the different floating blocks

Register

Block [bits] (switches)^[1]

Block 1 [8:9] (SW0 – SW3)

Block 2 [8:9] (SW4 – SW7)

Block 3 [8:9] (SW8 – SW11)

Block 4 [8:9] (SW12 – SW15)

Conf_1

Conf_2

Default

00

X

58h (PS1)

59h (PS2)

5Ah (PS3)

5Bh (PS4)

01

10

11

Conf_1

Conf_2

Channel / Phases

1, 2 and 3

0

1

0

1

0

1

4, 5 and 6

7, 8 and 9

10, 11 and 12

[1] When blocks are in parallel configuration, the phase shifting sequence must be the same, since both switches associated

to the same light source must switch at the same time.

Table 39.ꢀLimp Home mode selection (58h, 59h, 5Ah and 5Bh)

Bits

LHx

0

Selection

LED OFF

LED ON

7 to 5

1

Table 40.ꢀShort circuit timer (blanking time after duty cycle rising edge)

Register

Bit D4

Protocol

16 µs (default)

32 µs

0

1

60h

Table 41.ꢀData rate selection

Register

Bit D3

Bit D2

Data rate

0

1

0

1

0

125 Kb/sec

250 Kb/sec

60h

500 Kb/sec (default)

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ASL5xxxyHz

Matrix LED Controller (MLC)

Register

Bit D3

Bit D2

Data rate

1

1 Mb/sec

Table 42.ꢀOpen circuit (OC) threshold selection (58h, 59h, 5Ah and 5Bh)

Bit

Bit D4

OC Threshold^[1]

0

1

6 V ±1 V

4

17 V ±1.5 V (default)

[1] When driving one LED, the default configuration should be used (6 V ±1 V), but if the switch is associated with a segment

(more than one LED), the nondefault threshold should be selected (17 V ±1.5 V)

Table 43.ꢀSystem configuration. Single / Multiple MLC

Register

Bit D1

System configuration

Single

0

1

60h

Multiple (default)

Table 44.ꢀScaling factor selection (5Ch, 5Dh, 5Eh and 5Fh)

Reduction

Bit D4

Bit D3

Bit D2

Bit D1

Bit D0

Value

Percentage (%)

0 (Default)

0.78

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

2

1.56

3

2.34

4

3.13

5

3.91

6

4.69

7

5.47

8

6.25

9

7.03

10

11

12

13

14

15

16

17

18

7.81

8.59

9.38

10.16

10.94

11.72

12.5

13.28

14.06

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Matrix LED Controller (MLC)

Reduction

Value

Bit D4

Bit D3

Bit D2

Bit D1

Bit D0

Percentage (%)

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

19

20

21

22

23

24

25

26

27

28

29

30

31

14.84

15.63

16.41

17.19

17.97

18.75

19.53

20.31

21.09

21.88

22.66

23.44

24.22

Table 45.ꢀOvertemperature warning (OTW_x) threshold selection

Register

Bits

Temperature Threshold (Defaults)

[100] - 140°C (OTW_0)

10 to 12

13 to 15

58h

[110] - 160°C (OTW_1)

Overtemperature Warning threshold selection (OTW_0 and OTW_1)

3 bit register

Tj

000

100

001

110

010

120

011

130

100

140

101

150

110

160

111

170

Unit

[°C]

Note: The overtemperature warning (OTW) measurement has an accuracy of ±10 °C.

Table 46.ꢀPartial networking selection

Register

Bit D5

ON / OFF

OFF (default)

ON

0

1

60h

15 Limiting values

Table 47.ꢀLimiting values

In accordance with the Absolute Maximum Rating System (IEC 60134)

Symbol

Parameter/Pin

Conditions

Min

Max

Unit

With respect to ground – All blocks in

series

V_max

Maximum LED string voltage

–0.2

60

V

V_block

V_D-S

Maximum block voltage

Block of 3 switches

–0.2

57

19

V

Maximum Switch drain-source voltage

At zero current and normal operation

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ASL5xxxyHz

Matrix LED Controller (MLC)

Symbol

Parameter/Pin

Conditions

Min

–0.3

–0.15

–0.2

Max

1.5

0.8

72

60

6

Unit

A

ASL5x15yHz

I_T(RMS)

Maximum RMS current per switch

ASL5x08yHz

A

V_CP

CP pin

With respect to Ground

With respect to ground

V

V_VMAX

V_TXD

V_RXD

V_NTC

V_ID

VMAX pin

Pin TXD

Pin RXD

Pin NTC

Pin ID

V

6

V

1.95

6

V

V_Ax

Pins A0 to A4

Pin VCC

V

V_Vcc

6

V

Not ground but must be connected to

ground

V_ICP

Pin ICP

–0.2

1.95

V

T_j

Junction temperature

Storage temperature

—

–40

–55

0

175

40

°C

T_stg

T_MTP

MTP programming ambient temperature MLC in MTP programming mode

—

N_cy(W)MTPMaximum MTP programming times

—

200

cycles

Programming temperature between 0

and 40 °C

HBM (at any pins)^[1]

CDM^[2]

CDM Corner pins^[3]

–2

2

KV

V

Electrostatic discharge voltage

(Component level)

–500

–750

500

750

V

ISO10605

SWx, and VCC pins with respect to GND

and 270nF/50V capacitor attached to

the pin. ID and NTC pins with respect to

GND and 10nF capacitor + 3.3 V diode

attached to the pin

–8

-6

8

6

KV

V_act(ov)ESD

System Level^[4][5]

IEC61000-4-2

SWx, and VCC pins with respect to GND

and 270nF/50V capacitor attached to

the pin. ID and NTC pins with respect to

GND and 10nF capacitor + 3.3 V diode

attached to the pin

[1] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 KΩ).

[2] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF).

[3] Only applicable for part numbers with HLQFP package.

[4] System level test at any pin that can be connected directly to ECU connector (IEC61000-4-2 & ISO10605). Switches pins and Vcc pin. Model for

IEC61000-4-2: 330 Ω / 150 pF. Model for ISO10605: 2 kΩ / 150 pF (unpowered)

[5] System level test board reference schematic can be found in the application notes

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16 Thermal characteristics

Table 48.ꢀThermal characteristics

In accordance with the Absolute Maximum Rating System (IEC 60134)

Symbol Parameter

Conditions

Typ

2.1

3.1

Unit

K/W

R_th(j-mb)

Thermal impedance junction to mounting base HVQFN36

HLQFP48

17 Static characteristics

Table 49.ꢀStatic characteristics

In accordance with the Absolute Maximum Rating System (IEC 60134)

V_CC= 4.5 V to 5.5 V; T_j= −40 °C to +175 °C; all voltages are defined with respect to ground; positive currents flow into the

IC.

Typical values are given at V_CC= 5 V; T_j= 25 °C unless otherwise specified

Symbol

R_DSon

Parameter/Pin

Rdson per switch

Conditions

ASL5x15yHz

ASL5x08yHz

Min

—

Typ

100

200

Max

200

400

Unit

mΩ

R_DSon

—

Total bond wire resistance per

individual block

R_Bond

ASL5x15yHz

ASL5x08yHz

—

100

180

mΩ

Total bond wire resistance per

individual block

MTP OC Bit = 0

MTP OC Bit = 1

—

5

6

17

1

7

V

V_{th(det)load(oc)}LED Open Circuit detection level

V_{th(det)load(sc)}LED Short Circuit detection level

15.25

0.5

18.5

1.5

Address pin (A0 to A4) pull up resistor

(weak pull up resistor)

R_PU

IO = 0

46

62

79

KΩ

f_osc(cp)

Charge pump frequency

CAN clock frequency

CAN clock time accuracy

NTC enable current

—

4.5

—

5

10

5.5

—

MHz

%

f_osc(CAN)

t_clk(CAN)

I_en(NTC)

I_NTC(oc)

N_res(ADC)

—

Message cycle < 10 ms

—

0.25

440

25

—

412

22.5

—

468

27.5

9

µA

NTC open detection current

ADC resolution

µA

—

bit

1.1 /

511

N_res(ADC-LSB)ADC LSB resolution

—

V

V_{th(det)load(oc)}

NTC open detection

25 µA

1.1

—

(NTC)

I_en(ID)

ID resistor current

—

22.5

79

25

—

27.5

160

242

320

396

µA

mV

ID = 000

ID = 001

ID = 010

ID = 011

160

242

320

ΔV_ID

ID resistor ranges

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Symbol

Parameter/Pin

Conditions

ID = 100

ID = 101

ID = 110

ID = 111

Min

396

486

603

739

Typ

—

Max

486

603

739

905

Unit

mV

—

V_{th(det)load(sc)}

ID resistor short state

ID resistor open state

—

0

—

80

mV

(ID)

V_{th(det)load(oc)}

905

1100

(ID)

Output

—

12

20

—

bits

N_res(PWM)

PWM Resolution

Internal

MTP reg. 0x60h, bits 2-3 =

00

f_data(CAN)

CAN data rate

—

125

250

500

—

Kbps

MTP reg. 0x60h, bits 2-3 =

01

MTP reg. 0x60h, bits 2-3 =

10

MTP reg. 0x60h, bits 2-3 =

11

f_data(CAN)

V_VCC

CAN data rate

—

4.5

4

1000

5

—

Kbps

V

V_CCoperational range

—

5.5

4.5

Threshold only used during

Vcc ramp up

V_{VCC(latch)reset}V_CCunder voltage threshold

—

V

I/O High level input voltage (TxD, Rxd,

A0 – A4)

0.7 x

V_CC

+ 0.5

V_IH

—

V

I/O Low level input voltage (TxD, Rxd,

A0 – A4)

0.3 x

V_CC

V_IL

–0.2

0.7

V_CC= 5 V, MLC address =

11111 (31), Tj<125 °C

I_P(sleep)

Sleep mode supply current

0.9

1.35

mA

—

C_TXD

C_RXD

I_CC

I_Cp

TXD pin capacitance

RXD pin capacitance

—

1.5

2

pF

TXD1 and TXD2^[1]

RXD1 and RXD2^[1]

Vcc = 5 V, MLC address =

11111 (31), Charge pump

idle. Tj = 150 °C

MLC supply current

—

7.8

0.3

10

mA

Current consumption of the charge

pump

Charge pump toggling with

no switching. Tj = 150 °C.

VCC = 5 V

0.36

I_CAN

Current consumption due to full CAN

communication

1

mA

IAx

Pins A0 to A4 current consumption

Under voltage Lockout level

V_CCunder voltage hysteresis

Pin grounded. Vcc = 5 V^[2]

63

3.9

30

80

4.3

100

109

4.5

µA

V

Threshold only used during

Vcc ramp down

VUVLO

V_hys(det)uv

—

120

mV

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Symbol

VVcc(start)

T_JT(acc)

Parameter/Pin

Conditions

Min

3.3

-10

Typ

Max

4.1

10

Unit

V

Vcc start up voltage (internal IPs

enable threshold)^[3]

—

3.7

Junction temperature read accuracy

Measurement triggered by

CAN command 63. MLC

returns the internal diode

voltage drop. The junction

temperature must be

°C

calculated with the formula.

See application notes.

T_OTW(acc)

Over Temperature Warning (OTW)

accuracy

Flags in register 0x3Ah (bit

6 and 7)

-10

10

°C

[1] Guaranteed by design

[2] When the address pins (A0 to A4) are grounded to get the lowest MLC addresses, each pin current consumption must be added to the normal operation

and sleep mode current.

[3] For detailed IC startup timing, check application notes "MLC Timing" section

18 Dynamic characteristics

Table 50.ꢀDynamic characteristics

In accordance with the Absolute Maximum Rating System (IEC 60134)

V_CC= 4.5 V to 5.5 V; T_j= –40 °C to +175 °C; all voltages are defined with respect to ground; positive currents flow into the

IC.

Typical values are given at V_CC= 5 V; T_j= 25 °C unless otherwise specified

Optional (must be used together with Static characteristics)

Symbol

SR

Parameter

Conditions

Min

0.2

Typ

—

Max

6.8

Unit

V/µs

Hz

Slew rate (programmable per block)

Switch PWM frequency

V_CC= 5 V

f_PWM

MTP reg. 60h, bit 0 = 0

MTP reg. 60h, bit 0 = 1

243.39

486.78

244

488

244.61

489.22

Hz

Cap. between CP and

VMAX = 22 nF

tstartup

Start-Up time

—

1.8

2

ms

Tphase

Phase shifting time

fail detection time

f_PWM= 244 Hz

SC and OC

Per line

—

5

256

100

—

400

10

µs

ns

ms

µs

%

tdet(fail)

tprog(MTP)

tread(MTP)

dPWM

MTP Erase-Program process

MTP Read time

Per line

—

0

1

—

PWM Duty Cycle

With 12-bit resolution

—

100

110

tdet(NTC)

NTC detection time

90

100

µs

tdet(NTC)(o

c)

NTC open detection time

—

90

100

110

µs

Setting 1

Setting 2

Setting 3

Setting 4

Setting 5

Setting 6

4.05

8.1

4.5

9

4.95

9.9

ms

16.2

32.4

64.9

129.8

18

19.8

39.6

79.3

158.6

tto(wd)

LHM watchdog time-out time

36

72.1

144.2

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Symbol

Parameter

Conditions

Setting 7

Min

259.5

519

Typ

Max

317.3

634.4

Unit

ms

288.4

576.7

Setting 8

ms

19 Packaging

19.1 Package mechanical dimensions

Package dimensions are provided in package drawings. To find the most current

package outline drawing, go to www.nxp.com and perform a keyword search for the

drawing’s document number.

Table 51.ꢀPackage Outline

Package

36-pin HVQFN

48-pin HLQFP

Package outline drawing number

SOT1092-4

SOT1571-1

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Figure 12.ꢀPackage outline – HVQFN package

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Figure 13.ꢀPackage outline – HLQFP package

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20 Revision history

Table 52.ꢀRevision history

Document ID

Release date

Data sheet status

Change notice

Supersedes

ASL5xxxyHN v.1.1

20180829

Product

VUVLO change from

4.1 to 3.9 V

—

V_{VCC(latch)reset}change

from 4.05 to 4 V

AEC Q006 notation

was added in general

description section

ASL5xxxyHz v.2

20180907

Product

Integrates HLQFP48

part numbers

ASL5xxxyHN v. 1.1

Includes HLQFP48

package description,

package thermal

resistance, CDM

corner pins (limiting

values) and pinning

information

ASL5xxxyHz V.2.1

20190205

Product

VMAX was updated

from 57 V to 60 V;

Vvmax pin max rating

value was updated

from 57 V to 60 V; Vcp

pin max rating value

was updated from 69 V

to 72 V

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21 Legal information

21.1 Data sheet status

Document status^[1][2]

Product status^[3]

Definition

Objective [short] data sheet

Development

This document contains data from the objective specification for product

development.

Preliminary [short] data sheet

Product [short] data sheet

Qualification

Production

This document contains data from the preliminary specification.

This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple

devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

21.2 Definitions

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes

no representation or warranty that such applications will be suitable

for the specified use without further testing or modification. Customers

are responsible for the design and operation of their applications and

products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications

and products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with

their applications and products. NXP Semiconductors does not accept any

liability related to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer is

responsible for doing all necessary testing for the customer’s applications

and products using NXP Semiconductors products in order to avoid a

default of the applications and the products or of the application or use by

customer’s third party customer(s). NXP does not accept any liability in this

respect.

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences

of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the

relevant full data sheet, which is available on request via the local NXP

Semiconductors sales office. In case of any inconsistency or conflict with the

short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product

is deemed to offer functions and qualities beyond those described in the

Product data sheet.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

21.3 Disclaimers

Limited warranty and liability — Information in this document is believed

to be accurate and reliable. However, NXP Semiconductors does not

give any representations or warranties, expressed or implied, as to the

accuracy or completeness of such information and shall have no liability

for the consequences of use of such information. NXP Semiconductors

takes no responsibility for the content in this document if provided by an

information source outside of NXP Semiconductors. In no event shall NXP

Semiconductors be liable for any indirect, incidental, punitive, special or

consequential damages (including - without limitation - lost profits, lost

savings, business interruption, costs related to the removal or replacement

of any products or rework charges) whether or not such damages are based

on tort (including negligence), warranty, breach of contract or any other

legal theory. Notwithstanding any damages that customer might incur for

any reason whatsoever, NXP Semiconductors’ aggregate and cumulative

liability towards customer for the products described herein shall be limited

in accordance with the Terms and conditions of commercial sale of NXP

Semiconductors.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or

the grant, conveyance or implication of any license under any copyrights,

patents or other industrial or intellectual property rights.

Suitability for use in automotive applications — This NXP

Semiconductors product has been qualified for use in automotive

applications. Unless otherwise agreed in writing, the product is not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

Right to make changes — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

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to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer's own

risk.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

21.4 Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

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Tables

Tab. 1.

Tab. 2.

Tab. 3.

Tab. 4.

Orderable part variations ...................................4

Tab. 23. LHM - Limp Home mode control register

(address 3Ch) bit description .......................... 30

Tab. 24. Limp Home mode deactivation sequence ....... 32

Tab. 25. Limp Home mode exit sequence messages ....32

Tab. 26. Standard-ID and the synchronization

sequence .........................................................33

Tab. 27. Extended-ID format ......................................... 33

Tab. 28. CAN and CAN-FD commands ........................ 34

Tab. 29. Number of Register fitting DLC (CAN - FD) .....36

Tab. 30. Standard–ID format in a response frame ........ 37

Tab. 31. ASL50xxyHz Register map ............................. 38

Tab. 32. ASL51xxSHy register map .............................. 40

Tab. 33. MLCs linked to the bits ................................... 43

Tab. 34. MTP Read/Write ..............................................44

Tab. 35. MTP memory map .......................................... 44

Tab. 36. PWM frequency selection ............................... 46

Tab. 37. Slew rate selection ..........................................46

Tab. 38. Phase shifting sequence in the different

floating blocks ................................................. 47

Tab. 39. Limp Home mode selection (58h, 59h, 5Ah

and 5Bh) ..........................................................47

Tab. 40. Short circuit timer (blanking time after duty

cycle rising edge) ............................................47

Tab. 41. Data rate selection ..........................................47

Tab. 42. Open circuit (OC) threshold selection (58h,

59h, 5Ah and 5Bh) ..........................................48

Tab. 43. System configuration. Single / Multiple MLC ....48

Tab. 44. Scaling factor selection (5Ch, 5Dh, 5Eh and

5Fh) ................................................................. 48

Pin description ...................................................7

Pin description ...................................................9

Curve selection, auto-bit, shift value, start/

stop positions and delay factor (Read/Write) ... 17

SHIFT values .................................................. 18

PWM-Feedback registers (only Read

registers) ..........................................................19

Immediate OFF commands. Set duty cycle

to zero (Read/Write) ........................................19

Start commands for each channel (Read/

Write) ...............................................................20

Tab. 5.

Tab. 6.

Tab. 7.

Tab. 8.

Tab. 9.

Possible

identification

resistors

for

nonoverlapping ................................................21

Tab. 10. Junction temperature warning bits (Read) .......22

Tab. 11. CLEAR - CLEAR control register (address

34h) bit allocation ............................................23

Tab. 12. CLEAR - CLEAR control register (address

34h) bit description ..........................................23

Tab. 13. Open Circuit and Short Circuit registers

(Read only) ......................................................24

Tab. 14. NTC - NTC control register (address 39h) bit

allocation ......................................................... 24

Tab. 15. NTC - NTC control register (address 39h) bit

description ....................................................... 24

Tab. 16. ID - ID control register (address 3Ah) bit

allocation ......................................................... 25

Tab. 17. ID - ID control register (address 3Ah) bit

description ....................................................... 25

Tab. 18. Internal Status - Internal status control

register (address 3Bh) bit allocation ................26

Tab. 19. Internal Status - Internal status control

register (address 3Bh) bit description ..............26

Tab. 20. External charge pump capacitor selection .......27

Tab. 21. OC threshold selection and CPFSx selection

in MTP .............................................................28

Tab. 22. LHM - Limp Home mode control register

(address 3Ch) bit allocation ............................ 30

Tab. 45. Overtemperature

warning

(OTW_x)

threshold selection .......................................... 49

Tab. 46. Partial networking selection .............................49

Tab. 47. Limiting values ................................................ 49

Tab. 48. Thermal characteristics ................................... 51

Tab. 49. Static characteristics ....................................... 51

Tab. 50. Dynamic characteristics .................................. 53

Tab. 51. Package Outline ..............................................54

Tab. 52. Revision history ...............................................65

Figures

Fig. 1.

Application diagram for the ASL5xxxyHz

family (OFF board configuration) ...................... 5

Block diagram ................................................... 6

Pin configuration for HVQFN36 .........................7

Pin configuration for LQFP48 ............................9

Single LED driving configuration application

diagram ............................................................12

Multiple strings with segment driving

configuration application diagram ....................13

Built in phase shifting sequence ......................14

Fig. 8.

Fig. 9.

Blocks of switches can be assigned to phase

shifting sequences ...........................................15

Example PWM Polynomial curves (Default

curves in MTP) ................................................16

Fig. 2.

Fig. 3.

Fig. 4.

Fig. 5.

Fig. 10. Typical NTC resistance vs. temperature in

the range 70 °C to 130 °C .............................. 21

Fig. 11. CAN Ext-ID frame ........................................... 33

Fig. 12. Package outline – HVQFN package ................55

Fig. 13. Package outline – HLQFP package ................ 60

Fig. 6.

Fig. 7.

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Contents

1

General description ............................................ 1

13.1

CAN message configuration for Partial_

2

3

4

5

6

7

7.1

7.2

7.3

7.4

8

Features ............................................................... 3

Applications .........................................................3

Orderable parts ................................................... 4

Application diagram ............................................5

Block diagram ..................................................... 6

Pinning information ............................................ 7

Pinning – HVQFN36 package ........................... 7

Pin description – HVQFN36 package ................7

Pinning – HLQFP48 package ............................9

Pin description – HLQFP48 package .................9

Functional description ......................................11

Integrated switches for single or multiple

Sleep and Partial_Wake ..................................43

14

Nonvolatile

Multitime

Programmable

Memory (MTP) ................................................... 43

MTP memory map ...........................................44

Registers value selection criteria .....................46

Limiting values ..................................................49

Thermal characteristics ....................................51

Static characteristics ........................................51

Dynamic characteristics ...................................53

Packaging .......................................................... 54

Package mechanical dimensions .................... 54

Revision history ................................................ 65

Legal information ..............................................66

14.1

14.1.1

15

16

17

18

19

19.1

20

21

8.1

LEDs dimming ................................................. 11

LED current capability and power dissipation ...13

Internal PWM dimming generator and phase

8.2

8.3

shifting ..............................................................13

Programming and execution of PWM

8.4

dimming – ASL50xxyHz .................................. 15

Channel programming registers map ...............17

Delay coefficient – ASL50xxyHz ......................20

Diagnostics ...................................................... 20

Direct NTC input ..............................................20

Direct Identification resistor input .....................21

LED fault detection .......................................... 21

Internal junction temperature warnings ............22

Undervoltage detection and protection ............ 22

Diagnosis registers map ..................................22

Register 34h - Status register ..........................22

Read diagnostic bits, from MLC to

8.4.1

8.5

8.6

8.6.1

8.6.2

8.6.3

8.6.4

8.6.5

8.6.6

8.6.6.1

8.6.6.2

microcontroller ................................................. 24

Internal oscillator 200 MHz for digital blocks ....26

Charge Pump .................................................. 27

Charge pump fail-safe operation mode

8.7

8.8

8.9

(CPFSO) .......................................................... 27

Matrix LED controller interface and

8.10

configuration .................................................... 28

External IC addressing .................................... 29

Protection against missing VCC ...................... 29

LED brightness calibration factor .....................29

Limp Home mode operation ............................ 30

Limp Home mode activation ............................31

Limp Home mode operation ............................ 31

Limp Home mode deactivation ........................ 31

Communication interface .................................32

Application protocol ......................................... 33

CAN commands ................................................ 34

ASL50xxyHz Register map ...............................38

Direct PWM mode – ASL51xxyHz. ...................40

ASL51xxSHy Register MAP ............................ 40

Sleep and Wake Up .......................................... 41

Partial networking for Sleep and Wake Up

(message based) ...............................................42

8.11

8.12

8.13

8.14

8.14.1

8.14.2

8.14.3

8.15

8.16

9

10

11

11.1

12

13

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 5 February 2019


型号：	ASL5108FHN
厂家：	NXP
描述：	Display Driver
文件：	总69页 (文件大小：4784K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ASL5108FHN [NXP]

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