BF992 [NXP]
Silicon N-channel dual gate MOS-FET; 硅N沟道双栅MOS -FET
| 型号： | BF992 |
| 厂家： | 
NXP |
| 描述： | Silicon N-channel dual gate MOS-FET |
| 文件： | 总12页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BF992
Silicon N-channel dual gate
MOS-FET
Product specification
1999 Aug 11
Supersedes data of 1996 Jul 30
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
APPLICATIONS
PINNING
• VHF applications such as VHF television tuners and FM
tuners with 12 V supply voltage. The device is also
suitable for use in professional communications
equipment.
PIN
SYMBOL
DESCRIPTION
1
2
3
4
s, b
d
source
drain
g2
g1
gate 2
gate 1
DESCRIPTION
Depletion type field-effect transistor in a plastic
micro-miniature SOT143B package with source and
substrate interconnected.
handbook, halfpage
d
4
3
The transistor is protected against excessive input voltage
surges by integrated back-to-back diodes between gates
and source.
g
2
g
1
CAUTION
1
2
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
s,b
Top view
Marking code: M92.
MAM039
Fig.1 Simplified outline (SOT143B) and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
20
UNIT
VDS
ID
drain-source voltage (DC)
drain current (DC)
−
−
−
V
40
200
−
mA
mW
mS
Ptot
Yfs
total power dissipation
forward transfer admittance
Tamb = 60 °C
f = 1 kHz; ID = 15 mA; VDS = 10 V;
VG2-S = 4 V
25
Cig1-s
Crs
F
input capacitance at gate 1
reverse transfer capacitance
noise figure
f = 1 MHz; ID = 15 mA; VDS = 10 V;
VG2-S = 4 V
4
−
pF
fF
f = 1 MHz; ID = 15 mA; VDS = 10 V;
VG2-S = 4 V
30
−
GS = 2 mS; ID = 15 mA; VDS = 10 V; 1.2
VG2-S = 4 V; f = 200 MHz
−
dB
°C
Tj
operating junction temperature
−
150
1999 Aug 11
2
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
VDS
PARAMETER
CONDITIONS
MIN.
MAX.
20
UNIT
drain-source voltage
drain current
−
−
−
−
−
V
ID
40
mA
mA
mA
mW
°C
IG1
IG2
Ptot
Tstg
Tj
gate 1 current
±10
±10
200
+150
150
gate 2 current
total power dissipation
storage temperature
operating junction temperature
T
amb ≤ 60 °C; see Fig.2; note 1
−65
−
°C
Note
1. Device mounted on a ceramic substrate, 8 mm × 10 mm × 0.7 mm.
MBL033
handbook, halfpage
200
P
tot max
(mW)
100
0
0
100
200
o
T
( C)
amb
Fig.2 Power derating curves.
1999 Aug 11
3
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
note 1
VALUE
460
UNIT
Rth j-a
thermal resistance from junction to ambient in free air
K/W
Note
1. Device mounted on a ceramic substrate, 8 mm × 10 mm × 0.7 mm.
STATIC CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
20
UNIT
±V(BR)G1-SS gate 1-source breakdown voltage
±V(BR)G2-SS gate 2-source breakdown voltage
VG2-S = VDS = 0; IG1-SS = ±10 mA
VG1-S = VDS = 0; IG2-SS = ±10 mA
VG2-S = 4 V; VDS = 10 V; ID = 20 µA
VG1-S = 0; VDS = 10 V; ID = 20 µA
VG2-S = VDS = 0; VG1-S = ±7 V
VG1-S = VDS = 0; VG2-S = ±7 V
8
8
V
20
1.3
1.1
25
V
−V(P)G1-S
−V(P)G2-S
±IG1-SS
gate 1-source cut-off voltage
gate 2-source cut-off voltage
gate 1 cut-off current
0.2
0.2
−
V
V
nA
nA
±IG2-SS
gate 2 cut-off current
−
25
DYNAMIC CHARACTERISTICS
Common source; Tamb = 25 °C; VDS = 10 V; VG2-S = 4 V; ID = 15 mA; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
20
TYP.
25
MAX.
UNIT
yfs
Cig1-s
Cig2-s
Cos
Crs
forward transfer admittance
input capacitance at gate 1
input capacitance at gate 2
output capacitance
−
mS
pF
pF
pF
fF
f = 1 MHz
−
−
−
−
−
4
−
f = 1 MHz
1.7
2
−
f = 1 MHz
−
reverse transfer capacitance
noise figure
f = 1 MHz
30
1.2
40
−
F
f = 200 MHz; GS = 2 mS
dB
1999 Aug 11
4
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
MGE797
MGE799
24
30
handbook, halfpage
handbook, halfpage
4 V
3 V
I
D
(mA)
I
V
= 5 V
2 V
D
G2-S
20
16
12
8
V
= 0.2 V
(mA)
G1-S
0.1 V
0 V
20
1 V
−0.1 V
−0.2 V
−0.3 V
10
0 V
−0.4 V
−0.5 V
−0.6 V
4
0
0
−1
0
2
4
6
8
10
(V)
12
0
1
V
(V)
G1-S
V
DS
VG2-S = 4 V; Tj = 25 °C.
VDS = 10 V; Tj = 25 °C.
Fig.3 Output characteristics; typical values.
Fig.4 Transfer characteristics; typical values.
MGE798
MGE800
30
30
handbook, halfpage
handbook, halfpage
5 V
4 V
3 V
Y
|y
|
fs
(mS)
V
=
G2-S
fs
(mS)
5 V
4 V
2 V
20
20
3 V
2 V
10
10
1 V
V
= 0 V
G2-S
1 V
0 V
0
0
−1
0
10
20
0
1
I
(mA)
V
(V)
D
G1-S
VDS = 10 V; Tj = 25 °C.
VDS = 10 V; Tj = 25 °C.
Fig.5 Forward transfer admittance as a function
of drain current; typical values.
Fig.6 Forward transfer admittance as a function
of gate 1-source voltage; typical values.
1999 Aug 11
5
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
MGE794
MGE793
2
10
10
handbook, halfpage
handbook, halfpage
y
is
y
os
(mS)
b
(mS)
os
10
b
1
is
1
g
g
os
is
−1
10
−1
10
−2
−2
10
10
2
3
2
3
10
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C.
VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C.
Fig.7 Input admittance as a function of frequency;
typical values.
Fig.8 Output admittance as a function of
frequency; typical values.
MGE796
MGE795
120
25
handbook, halfpage
handbook, halfpage
g
fs
Y
fs
(mS)
20
y
rs
(µS)
80
15
10
−b
rs
−b
fs
40
5
0
g
rs
0
2
3
2
3
10
10
10
10
10
10
f (MHz)
f (MHz)
VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C.
VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C.
Fig.9 Forward transfer admittance as a function
of frequency; typical values.
Fig.10 Reverse transfer admittance as a function
of frequency; typical values.
1999 Aug 11
6
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
PACKAGE OUTLINE
Plastic surface mounted package; 4 leads
SOT143B
D
B
E
A
X
y
H
v
M
A
E
e
b
w
M
B
p
4
3
Q
A
A
1
c
1
2
L
p
b
1
e
1
detail X
0
1
2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
1
max
UNIT
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
E
1.1
0.9
0.48
0.38
0.88
0.78
0.15
0.09
3.0
2.8
1.4
1.2
2.5
2.1
0.45
0.15
0.55
0.45
0.1
mm
1.9
1.7
0.2
0.1
0.1
REFERENCES
JEDEC
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
EIAJ
97-02-28
SOT143B
1999 Aug 11
7
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
DEFINITIONS
Data Sheet Status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Aug 11
8
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
NOTES
1999 Aug 11
9
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
NOTES
1999 Aug 11
10
Philips Semiconductors
Product specification
Silicon N-channel dual gate MOS-FET
BF992
NOTES
1999 Aug 11
11
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© Philips Electronics N.V. 1999
SCA67
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Printed in The Netherlands
125004/03/pp12
Date of release: 1999 Aug 11
Document order number: 9397 750 06013
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