BLF1049 [NXP]

Base station LDMOS transistor; 基站LDMOS晶体管
BLF1049
型号: BLF1049
厂家: NXP    NXP
描述:

Base station LDMOS transistor
基站LDMOS晶体管

晶体 晶体管
文件: 总12页 (文件大小:112K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DISCRETE SEMICONDUCTORS  
DATA SHEET  
dbook, halfpage  
BLF1049  
Base station LDMOS transistor  
Product specification  
2003 May 14  
Supersedes data of 2001 Dec 05  
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
FEATURES  
DESCRIPTION  
Typical performance at a supply voltage of 27 V:  
– 1-tone CW; IDQ = 1000 mA  
– Output power = 125 W  
125 W LDMOS power transistor for base station  
applications at frequencies from 800 MHz to 1000 MHz.  
PINNING - SOT502A  
– Gain = 16.5 dB  
– Efficiency = 54%  
PIN  
DESCRIPTION  
– EDGE output power = 45 W (AV)  
1
2
3
drain  
gate  
– ACPR400 = 64 dBc at 400 kHz  
(EDGE; IDQ = 750 mA)  
source; connected to flange  
– EVM = 2% rms (AV)  
(EDGE; IDQ = 750 mA)  
Easy power control  
handbook, halfpage  
1
Excellent ruggedness  
High power gain  
Excellent thermal stability  
3
2
Designed for broadband operation (800 to 1000 MHz)  
Internally matched for ease of use.  
Top view  
MBK394  
APPLICATIONS  
Fig.1 Simplified outline SOT502A .  
RF power amplifier for GSM, EDGE and CDMA base  
stations and multicarrier applications in the  
800 to 1000 MHz frequency range.  
QUICK REFERENCE DATA  
Typical RF performance at Th = 25 °C in a common source test circuit.  
EVM  
% rms  
(AV)  
f
PL  
(W)  
Gp  
(dB)  
ηD  
(%)  
d3  
(dBc)  
ACPR 400  
(dBc)  
MODE OF OPERATION  
(MHz)  
2-tone  
125 (PEP)  
125  
15.5  
16.5  
15  
37  
54  
32  
32  
2
1-tone CW  
GSM EDGE  
920  
45 (AV)  
64  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
SYMBOL PARAMETER  
VDS  
MIN.  
MAX.  
UNIT  
drain-source voltage  
gate-source voltage  
storage temperature  
junction temperature  
75  
V
V
VGS  
Tstg  
Tj  
±15  
150  
200  
65  
°C  
°C  
2003 May 14  
2
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
CONDITIONS  
VALUE  
UNIT  
K/W  
K/W  
Rth j-c  
Rth j-h  
thermal resistance from junction to case  
Th = 25 °C, PL = 35 W (AV), note 1  
0.42  
0.62  
thermal resistance from junction to heatsink Th = 25 °C, PL = 35 W (AV), note 2  
Notes  
1. Thermal resistance is determined under RF operating conditions.  
2. Depending on mounting condition in application.  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
VGS = 0; ID = 3 mA  
MIN.  
75  
TYP. MAX. UNIT  
V(BR)DSS  
VGSth  
IDSS  
drain-source breakdown voltage  
gate-source threshold voltage  
drain-source leakage current  
on-state drain current  
5
3
1
V
VDS = 10 V; ID = 300 mA  
VGS = 0; VDS = 36 V  
4
V
µA  
A
IDSX  
VGS = VGSth + 9 V; VDS = 10 V  
VGS = ±20 V; VDS = 0  
VDS = 10 V; ID = 10 A  
VGS = 9 V; ID = 10 A  
45  
IGSS  
gate leakage current  
µA  
S
gfs  
forward transconductance  
drain-source on-state resistance  
9
RDSon  
60  
mΩ  
APPLICATION INFORMATION  
RF performance in a common source class-AB circuit; VDS = 27 V; Th = 25 °C; unless otherwise specified.  
Mode of operation: 2-tone CW, 100 kHz spacing; IDQ = 1130 mA; f = 890 MHz  
SYMBOL  
Gp  
PARAMETER  
gain power  
CONDITIONS  
PL = 125 W (PEP)  
MIN.  
14.6  
33  
TYP. MAX. UNIT  
15.5  
37  
dB  
%
ηD  
IRL  
d3  
drain efficiency  
input return loss  
12  
32  
6  
25  
dB  
dBc  
third order inter modulation  
distortion  
Mode of operation: GSM EDGE; IDQ = 750 mA; f = 920 MHz  
SYMBOL PARAMETER CONDITIONS  
Gp gain power PL = 45 W (AV)  
MIN.  
TYP. MAX. UNIT  
15  
32  
64  
2
dB  
%
ηD  
drain efficiency  
ACPR 400  
EVM (AV)  
EVM peak  
adjacent channel power ratio  
EVM rms average signal distortion  
EVM rms peak signal distortion  
dBc  
%
2.2  
%
Mode of operation: 1-tone CW; IDQ = 1000 mA; f = 920 MHz  
SYMBOL  
Gp  
PARAMETER  
gain power  
drain efficiency  
CONDITIONS  
MIN.  
TYP. MAX. UNIT  
PL = PL 1 dB = 125 W  
16.5  
54  
dB  
%
ηD  
2003 May 14  
3
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
MLE061  
MLE062  
16  
62  
40  
2
handbook, halfpage  
handbook, halfpage  
ACPR  
400  
EVM  
rms  
(AV)  
(%)  
G
p
(dB)  
η
D
(%)  
G
p
(dBc)  
15  
64  
30  
1.5  
η
D
EVM  
14  
13  
12  
66  
68  
20  
10  
0
1
ACPR400  
0.5  
0
70  
0
10  
20  
30  
40  
P
50  
0
10  
20  
30  
40  
P
50  
(AV)(W)  
(AV)(W)  
L
L
VDS = 27 V; f = 920 MHz; IDQ = 750 mA; Th 25 °C.  
VDS = 27 V; f = 920 MHz; IDQ = 750 mA; Th 25 °C.  
Fig.3 GSM EDGE ACPR400 and EVM as  
functions of average load power; typical  
values.  
Fig.2 GSM EDGE power gain and efficiency as  
functions of load power; typical values.  
MLE064  
50  
17  
handbook, halfpage  
gain  
(dB)  
η
(4)  
MLE063  
(%)  
18  
60  
handbook, halfpage  
16.5  
40  
30  
20  
10  
η
D
η
G
p
(dB)  
η(1,2,3)  
D
(%)  
16  
(5)  
17  
40  
15.5  
15  
G
p
(6)  
16  
20  
14.5  
14  
0
0
50  
100  
150  
(PEP) (W)  
P
L
15  
0
0
150  
50  
100  
P
(AV) (W)  
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz.  
L
(1) η at Th = 40 °C.  
(2) η at Th = 20 °C.  
(3) η at Th = 80 °C.  
(4) gain at Th = 40 °C.  
(5) gain at Th = 20 °C.  
(6) gain at Th = 80 °C.  
VDS = 27 V; f = 920 MHz; IDQ = 1000 mA;  
Fig.5 2-tone power gain and efficiency as  
functions of load power at different  
temperatures.  
Fig.4 1-tone CW power gain and efficiency as  
functions of load power; typical values.  
2003 May 14  
4
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
MLE065  
MLE066  
20  
30  
handbook, halfpage  
handbook, halfpage  
d
d
3
5
(dBc)  
(dBc)  
(3)  
30  
40  
(1) (2)  
40  
50  
60  
(1)  
(2)  
50  
(3)  
60  
70  
0
50  
100  
150  
(PEP) (W)  
0
50  
100  
150  
P
P (PEP) (W)  
L
L
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz.  
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz; f2 = 920.1 MHz.  
(1) Th = 40 °C.  
(2) Th = 20 °C.  
(3) Th = 80 °C.  
(1) Th = 40 °C.  
(2) Th = 20 °C.  
(3) Th = 80 °C.  
Fig.6 Third order intermodulation distortion as a  
function of load power at different  
temperatures.  
Fig.7 Fifth order intermodulation distortion as a  
function of load power at different  
temperatures.  
MLE067  
MLE068  
40  
20  
40  
handbook, halfpage  
handbook, halfpage  
η
(%)  
gain  
(dB)  
D
d
(3)  
(2)  
7
(2)  
(1)  
(dBc)  
15  
10  
5
30  
50  
(1)  
(3)  
(4)  
20  
10  
0
60  
70  
0
0
0
50  
100  
150  
(PEP) (W)  
50  
100  
150  
P
(PEP) (W)  
P
L
L
VDS = 27 V; f1 = 920.0 MHz; f2 = 920.1 MHz.  
VDS = 27 V; IDQ = 1.1 A; f1 = 920.0 MHz;  
(3) IDQ = 1 A.  
(1)  
IDQ = 1 A.  
(1) Th = 40 °C.  
(2) Th = 20 °C.  
(3) Th = 80 °C.  
(4) IDQ = 1.45 A.  
(2) IDQ = 1.45 A.  
Fig.8 Seventh order intermodulation distortion as  
a function of load power at different  
temperatures.  
Fig.9 Power gain and drain efficiency as functions  
of peak envelope load power;  
typical values.  
2003 May 14  
5
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
MLE070  
MLE069  
0
2
handbook, halfpage  
handbook, halfpage  
Z
i
d
im  
()  
(dBc)  
1.5  
r
i
20  
1
0.5  
0
(2)  
(1)  
(5)  
40  
(4)  
(6)  
(3)  
x
i
60  
0.5  
1  
0.85  
80  
0
50  
100  
150  
(PEP) (W)  
0.9  
0.95  
1
f (GHz)  
P
L
VDS = 27 V; f1 = 920.0 MHz; f2 = 920.1 MHz.  
(1) d3; IDQ = 1 A.  
(2) d5; IDQ = 1 A.  
(3) d7; IDQ = 1 A.  
(5) d5; IDQ = 1.3 A.  
(6) d7; IDQ = 1.3 A.  
Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W.  
Values comprised for different parameters.  
(4) d3; IDQ = 1.3 A.  
Fig.10 Intermodulation distortion as a function of  
peak envelope load power; typical values.  
Fig.11 Input impedance as a function of frequency  
(series components); typical values.  
MLE071  
2
handbook, halfpage  
Z
L
()  
1.5  
1
R
L
0.5  
0
drain  
Z
handbook, halfpage  
L
X
L
gate  
0.5  
Z
IN  
MGS998  
1  
0.85  
0.9  
0.95  
1
f (GHz)  
Class-AB operation; VDS = 27 V; IDQ = 1125 mA; PL = 35 W.  
Values comprised for different parameters.  
Fig.12 Input impedance as a function of frequency  
(series components); typical values.  
Fig.13 Definition of transistor impedance.  
2003 May 14  
6
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
C15  
C2  
C3  
Q1  
L12  
C4  
C6  
Vbias  
L9  
C17  
C9  
R1  
L2  
L10  
C7  
Vsupply  
L5  
L4  
C10  
L7  
L3  
Q2  
L11  
C1  
L14  
C13  
L1  
L15  
L16  
C18  
L6  
RF in  
RF out  
C5  
C11  
C12  
C16  
L8  
C8  
L13  
C14  
MDB168  
Fig.14 Test circuit for 860 to 900 MHz.  
2003 May 14  
7
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
PHILIPS  
Input Rev C  
PHILIPS  
Output Rev C  
Vbias in  
C15  
C17  
L12  
C2  
Q1  
C4  
C6  
L9  
C9  
Vd  
in  
C3  
C10  
L5  
C5  
R1  
L3  
C7  
C18  
LL1144  
L1 C1 L2  
L6  
L7 L8  
L10  
L11  
L4  
C13  
L15  
L16  
C8  
C11  
C12  
C16  
C14  
L13  
PHILIPS  
Input Rev C  
PHILIPS  
Output Rev C  
60  
60  
40  
40  
MLE073  
Dimensions in mm.  
The components are situated on one side of the copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 25 mm.  
The other side is unetched and serves as a ground plane.  
Fig.15 Component layout for 860 to 900 MHz test circuit.  
2003 May 14  
8
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
List of components (see Figs 14 and 15)  
COMPONENT  
DESCRIPTION  
VALUE  
68 pF  
DIMENSIONS  
C1, C6, C13, C14, C15,  
C16, C17  
multilayer ceramic chip capacitor; note 1  
C2  
multilayer ceramic chip capacitor; note 1  
multilayer ceramic chip capacitor; note 1  
tantalum capacitor  
air trimmer capacitor  
multilayer ceramic chip capacitor  
potentiometer  
330 nF  
100 nF  
10 µF  
5 pF  
C3  
C4, C9, C10, C11, C12  
C5, C18  
C7, C8  
R1  
8.2 pF  
1 kΩ  
Q1  
7808 voltage regulator  
BLF1049 LDMOS transistor  
stripline; note 2  
Q2  
L1  
5.22 × 0.92 mm  
6.47 × 0.92 mm  
5.38 × 4.8 mm  
2.4 × 0.92 mm  
L2  
stripline; note 2  
L3  
stripline; note 2  
L4  
stripline; note 2  
L5  
ferroxcube  
L6  
stripline; note 2  
9.73 × 0.92 mm  
1.82 × 9.3 mm  
8.15 × 17.9 mm  
44 × 0.92 mm  
L7  
stripline; note 2  
L8  
stripline; note 2  
L9  
stripline; note 2  
L10  
L11  
L12, L13  
L14  
L15, L16  
stripline; note 2  
18.45 × 28.3 mm  
9.95 × 5.38 mm  
37.6 × 3.35 mm  
2.36 × 0.92 mm  
4.22 × 0.92 mm  
stripline; note 2  
stripline; note 2  
stripline; note 2  
stripline; note 2  
Notes  
1. American Technical Ceramics type 100A or capacitor of same quality.  
2. The striplines are on a double copper-clad Rogers 6006 printed-circuit board (εr = 6.15); thickness = 0.64 mm.  
2003 May 14  
9
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
PACKAGE OUTLINE  
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads  
SOT502A  
D
A
F
3
D
1
U
1
B
q
c
C
1
L
p
E
E
H
U
1
2
w
M
M
M
B
A
1
A
2
w
5
b
M
M
C
Q
2
0
10 mm  
scale  
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)  
c
A
b
D
D
E
E
F
H
L
p
Q
q
U
U
w
w
2
UNIT  
1
1
1
2
1
12.83  
12.57  
4.72  
3.43  
20.02 19.96 9.50  
19.61 19.66 9.30  
9.53  
9.25  
1.14 19.94 5.33  
0.89 18.92 4.32  
3.38  
3.12  
1.70  
1.45  
34.16 9.91  
33.91 9.65  
0.15  
0.08  
27.94  
1.100  
0.25  
0.01  
0.51  
0.02  
mm  
0.505  
0.495  
0.186  
0.135  
0.788 0.786 0.374 0.375 0.045 0.785 0.210 0.133 0.067  
0.772 0.774 0.366 0.364 0.035 0.745 0.170 0.123 0.057  
1.345 0.390  
1.335 0.380  
0.006  
0.003  
inches  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
JEITA  
99-12-28  
03-01-10  
SOT502A  
2003 May 14  
10  
Philips Semiconductors  
Product specification  
Base station LDMOS transistor  
BLF1049  
DATA SHEET STATUS  
DATA SHEET  
STATUS(1)  
PRODUCT  
STATUS(2)(3)  
LEVEL  
DEFINITION  
I
Objective data  
Development This data sheet contains data from the objective specification for product  
development. Philips Semiconductors reserves the right to change the  
specification in any manner without notice.  
II  
Preliminary data Qualification  
This data sheet contains data from the preliminary specification.  
Supplementary data will be published at a later date. Philips  
Semiconductors reserves the right to change the specification without  
notice, in order to improve the design and supply the best possible  
product.  
III  
Product data  
Production  
This data sheet contains data from the product specification. Philips  
Semiconductors reserves the right to make changes at any time in order  
to improve the design, manufacturing and supply. Relevant changes will  
be communicated via a Customer Product/Process Change Notification  
(CPCN).  
Notes  
1. Please consult the most recently issued data sheet before initiating or completing a design.  
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was  
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.  
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.  
DEFINITIONS  
DISCLAIMERS  
Short-form specification  
The data in a short-form  
Life support applications  
These products are not  
specification is extracted from a full data sheet with the  
same type number and title. For detailed information see  
the relevant data sheet or data handbook.  
designed for use in life support appliances, devices, or  
systems where malfunction of these products can  
reasonably be expected to result in personal injury. Philips  
Semiconductors customers using or selling these products  
for use in such applications do so at their own risk and  
agree to fully indemnify Philips Semiconductors for any  
damages resulting from such application.  
Limiting values definition Limiting values given are in  
accordance with the Absolute Maximum Rating System  
(IEC 60134). Stress above one or more of the limiting  
values may cause permanent damage to the device.  
These are stress ratings only and operation of the device  
at these or at any other conditions above those given in the  
Characteristics sections of the specification is not implied.  
Exposure to limiting values for extended periods may  
affect device reliability.  
Right to make changes  
Philips Semiconductors  
reserves the right to make changes in the products -  
including circuits, standard cells, and/or software -  
described or contained herein in order to improve design  
and/or performance. When the product is in full production  
(status ‘Production’), relevant changes will be  
Application information  
Applications that are  
communicated via a Customer Product/Process Change  
Notification (CPCN). Philips Semiconductors assumes no  
responsibility or liability for the use of any of these  
products, conveys no licence or title under any patent,  
copyright, or mask work right to these products, and  
makes no representations or warranties that these  
products are free from patent, copyright, or mask work  
right infringement, unless otherwise specified.  
described herein for any of these products are for  
illustrative purposes only. Philips Semiconductors make  
no representation or warranty that such applications will be  
suitable for the specified use without further testing or  
modification.  
2003 May 14  
11  
Philips Semiconductors – a worldwide company  
Contact information  
For additional information please visit http://www.semiconductors.philips.com.  
Fax: +31 40 27 24825  
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.  
© Koninklijke Philips Electronics N.V. 2003  
SCA75  
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.  
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed  
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license  
under patent- or other industrial or intellectual property rights.  
Printed in The Netherlands  
613524/03/pp12  
Date of release: 2003 May 14  
Document order number: 9397 750 11123  

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