BLF8G10L-160,112 [NXP]
BLF8G10L-160;型号: | BLF8G10L-160,112 |
厂家: | NXP |
描述: | BLF8G10L-160 局域网 放大器 CD 晶体管 |
文件: | 总13页 (文件大小:678K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BLF8G10L-160;
BLF8G10LS-160
Power LDMOS transistor
Rev. 3 — 16 February 2012
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS power transistor for base station applications at frequencies from
920 MHz to 960 MHz.
Table 1.
Typical performance
Typical RF performance at Tcase = 25 C in a common source class-AB production test circuit.
Test signal
f
IDq
VDS
(V)
30
PL(AV)
(W)
Gp
D
ACPR
(dBc)
38 [1]
(MHz)
(mA)
1100
(dB)
19.7
(%)
29
2-carrier W-CDMA
920 to 960
35
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier.
Carrier spacing 5 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low Rth providing excellent thermal stability
Designed for broadband operation (920 MHz to 960 MHz)
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power amplifiers for W-CDMA base stations and multi carrier applications in the
920 MHz to 960 MHz frequency range
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
Pinning
Description
Simplified outline
Graphic symbol
BLF8G10L-160 (SOT502A)
1
2
3
drain
gate
1
1
3
[1]
source
2
2
3
sym112
BLF8G10LS-160 (SOT502B)
1
2
3
drain
gate
1
1
2
3
[1]
source
2
3
sym112
[1] Connected to flange
3. Ordering information
Table 3.
Ordering information
Type number
Package
Name Description
Version
BLF8G10L-160
BLF8G10LS-160
-
flanged LDMOST ceramic package; 2 mounting holes;
2 leads
SOT502A
-
earless flanged LDMOST ceramic package; 2 leads
SOT502B
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
VDS
Parameter
Conditions
Min
Max
65
Unit
V
drain-source voltage
gate-source voltage
storage temperature
junction temperature
-
VGS
Tstg
0.5 +13
V
65
+150 C
Tj
-
200
C
5. Thermal characteristics
Table 5.
Thermal characteristics
Symbol Parameter
Conditions
Typ Unit
Rth(j-c)
thermal resistance from junction to case
Tcase = 80 C; PL = 35 W;
0.50 K/W
VDS = 30 V; IDq = 1100 mA
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
2 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
6. Characteristics
Table 6.
Characteristics
Tj = 25 C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ
Max Unit
V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 2.2 mA
65
VDS = 10 V; ID = 220 mA 1.5
-
-
V
VGS(th)
IDSS
gate-source threshold voltage
drain leakage current
2.0
-
2.3
5
V
VGS = 0 V; VDS = 28 V
-
-
A
A
IDSX
drain cut-off current
VGS = VGS(th) + 3.75 V;
VDS = 10 V
37.0
-
IGSS
gfs
gate leakage current
VGS = 11 V; VDS = 0 V
VDS = 10 V; ID = 7.7 A
-
-
-
-
0.5
A
S
forward transconductance
14.6
86
-
-
RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V;
ID = 7.7 A
m
7. Test information
Table 7.
Functional test information
Test signal: 2-carrier W-CDMA; PAR = 7.5 dB at 0.01 % probability on the CCDF;
3GPP test model 1; 64 DPCH; f1 = 920 MHz; f2 = 925 MHz; f3 = 955 MHz; f4 = 960 MHz;
RF performance at VDS = 30 V; IDq = 1100 mA; Tcase = 25 C; unless otherwise specified; in a
class-AB production test circuit.
Symbol
Gp
Parameter
Conditions
Min Typ
Max Unit
power gain
PL(AV) = 35 W
PL(AV) = 35 W
PL(AV) = 35 W
PL(AV) = 35 W
19
-
19.7
15
29
-
dB
dB
%
RLin
input return loss
drain efficiency
adjacent channel power ratio
10
-
D
27
-
ACPR
38
34
dBc
7.1 Ruggedness in class-AB operation
The BLF8G10L-160 and BLF8G10LS-160 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
V
DS = 30 V; IDq = 1100 mA; PL = 130 W (CW); f = 920 MHz to 960 MHz.
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
3 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical impedance information
IDq = 1100 mA; main transistor VDS = 30 V.
ZS and ZL defined in Figure 1.
f
ZS
ZL
(MHz)
925
942
960
()
()
4.0 j3.8
4.4 j4.2
4.6 j4.1
1.7 j2.5
1.5 j2.2
1.4 j2.3
drain
Z
L
gate
Z
S
001aaf059
Fig 1. Definition of transistor impedance
7.3 CW pulse
aaa-001287
aaa-001288
21
70
60
50
40
30
20
10
21
70
60
50
40
30
20
10
G
p
η
G
p
η
D
(%)
D
G
p
(dB)
(dB)
(%)
G
p
19
19
(1)
(1)
η
D
(2)
(3)
(2)
(3)
η
D
17
15
17
15
44
46
48
50
52
54
(dBm)
0
50
100
150
200
250
P (W)
L
P
L
VDS = 30 V; IDq = 1100 mA.
VDS = 30 V; IDq = 1100 mA.
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 2. Power gain and drain efficiency as function of
output power; typical values
Fig 3. Power gain and drain efficiency as function of
output power; typical values
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
4 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
aaa-001289
-10
in
RL
(dB)
-13
(3)
(2)
(1)
-16
-19
-22
-25
44
46
48
50
52
54
(dBm)
P
L
VDS = 30 V; IDq = 1100 mA.
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 4. Input return loss as a function of output power; typical values
7.4 2-Carrier W-CDMA
aaa-001290
aaa-001291
21
60
50
40
30
20
10
0
21
60
50
40
30
20
10
0
G
p
η
G
p
η
D
(%)
D
(dB)
20
(dB)
20
(%)
G
G
p
p
(1) (2) (3)
(1) (2) (3)
19
18
17
16
15
19
18
17
16
15
η
D
η
D
38
42
46
50
0
20
40
60
80
100
P (W)
L
P
L
(dBm)
VDS = 30 V; IDq = 1100 mA.
VDS = 30 V; IDq = 1100 mA.
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 5. Power gain and drain efficiency as function of
output power; typical values
Fig 6. Power gain and drain efficiency as function of
output power; typical values
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
5 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
aaa-001292
aaa-001293
-10
-20
RL
in
ACPR
(dBc)
(dB)
ACPR
5M
-14
-30
-40
-50
-60
(3)
-18
-22
-26
(2)
(1)
ACPR
10M
(1) (2) (3)
38
42
46
50
38
42
46
50
P
(dBm)
P (dBm)
L
L
VDS = 30 V; IDq = 1100 mA.
VDS = 30 V; IDq = 1100 mA.
(1) f = 920 MHz
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 7. Input return loss as a function of
output power; typical values
Fig 8. Adjacent channel power ratio (5 MHz and
10 MHz) as function of output power; typical
values
aaa-001294
9
PAR
(dB)
8
7
6
(1)
(2)
(3)
5
38
42
46
50
P
(dBm)
L
VDS = 30 V; IDq = 1100 mA.
(1) f = 920 MHz
(2) f = 940 MHz
(3) f = 960 MHz
Fig 9. Peak-to-average ratio as a function of output power; typical values
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
6 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
7.5 Circuit
Power LDMOS transistor
C11
C12
C5
C15
C8
C2
C7
C1
C4
C9 C10
C3
C6
C13
C14
C16
aaa-001295
Printed-Circuit Board (PCB): Rogers RO4350; r = 3.5 F/m; thickness = 0.762 mm; thickness copper plating = 35 m.
The vias can be used as a reference to place components.
The above layout shows the test circuit used to measure the devices in production. A more appropriate application
demonstration for specific customer needs can be provided.
See Table 9 for list of components.
Fig 10. Component layout
Table 9.
List of components
See Figure 10 for component layout.
Component
Description
Value
Remarks
ATC 800B
Murata
C1, C2, C3, C4, C5, C6
C7, C9, C12, C14
C8, C10, C11, C13
C15, C16
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
82 pF
10 F
1 F
Murata
470 F; 63 V
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
7 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
8. Package outline
Flanged LDMOST ceramic package; 2 mounting holes; 2 leads
SOT502A
D
A
F
3
D
1
U
1
B
q
c
C
1
L
p
E
E
H
U
1
2
w
M
M
M
B
A
1
A
2
w
5
b
M
M
C
Q
2
0
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
c
A
b
D
D
E
E
F
H
L
p
Q
q
U
U
w
w
2
UNIT
1
1
1
2
1
12.83
12.57
3.38
3.12
1.70
1.45
4.72
3.43
20.02 19.96 9.50
19.61 19.66 9.30
9.53
9.25
1.14 19.94 5.33
0.89 18.92 4.32
34.16 9.91
33.91 9.65
0.15
0.08
27.94
1.100
0.25
0.01
0.51
0.02
mm
0.505
0.495
0.133 0.067
0.123 0.057
0.186
0.135
0.788 0.786 0.374 0.375 0.045 0.785 0.210
0.772 0.774 0.366 0.364 0.035 0.745 0.170
1.345 0.390
1.335 0.380
0.006
0.003
inches
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
JEITA
99-12-28
03-01-10
SOT502A
Fig 11. Package outline SOT502A
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
8 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
Earless flanged LDMOST ceramic package; 2 leads
SOT502B
D
A
F
3
D
D
1
c
U
1
1
L
E
E
H
U
1
2
2
w
5
b
M
M
D
Q
2
0
10 mm
scale
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)
c
A
b
D
D
E
E
F
H
L
Q
U
U
w
UNIT
1
1
1
2
2
12.83
12.57
1.70
1.45
4.72
3.43
20.02 19.96 9.50
19.61 19.66 9.30
9.53
9.25
1.14 19.94 5.33
0.89 18.92 4.32
20.70 9.91
20.45 9.65
0.15
0.08
0.25
mm
0.505
0.495
0.067
0.057
0.186
0.135
0.788 0.786 0.374 0.375 0.045 0.785 0.210
0.772 0.774 0.366 0.364 0.035 0.745 0.170
0.815 0.390
0.805 0.380
0.006
0.003
0.010
inches
REFERENCES
EUROPEAN
PROJECTION
OUTLINE
VERSION
ISSUE DATE
IEC
JEDEC
JEITA
03-01-10
07-05-09
SOT502B
Fig 12. Package outline SOT502B
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
9 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
9. Abbreviations
Table 10. Abbreviations
Acronym
3GPP
CCDF
CW
Description
Third Generation Partnership Project
Complementary Cumulative Distribution Function
Continuous Wave
DPCH
ESD
Dedicated Physical CHannel
ElectroStatic Discharge
LDMOS
LDMOST
PAR
Laterally Diffused Metal Oxide Semiconductor
Laterally Diffused Metal Oxide Semiconductor Transistor
Peak-to-Average power Ratio
Radio Frequency
RF
VSWR
W-CDMA
Voltage Standing Wave Ratio
Wideband Code Division Multiple Access
10. Revision history
Table 11. Revision history
Document ID
Release
date
Data sheet status
Change notice Supersedes
BLF8G10L-160_8G10LS-160 v.3 20120216
Product data sheet
BLF8G10L-160_8G10LS-160
v.2
Modifications:
• The status of this data sheet has been changed to Product data sheet
• Table 6 on page 3: ID value changed to 2.2 mA at conditions of V(BR)DSS
• Table 8 on page 4: values rounded off to one decimal place
BLF8G10L-160_8G10LS-160 v.2 20111121
Preliminary data sheet
BLF8G10L-160_8G10LS-160
v.1
BLF8G10L-160_8G10LS-160 v.1 20110519
Objective data sheet
-
-
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
10 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
11. Legal information
11.1 Data sheet status
Document status[1][2]
Product status[3]
Development
Definition
Objective [short] data sheet
This document contains data from the objective specification for product development.
This document contains data from the preliminary specification.
This document contains the product specification.
Preliminary [short] data sheet Qualification
Product [short] data sheet Production
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term ‘short data sheet’ is explained in section “Definitions”.
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
Suitability for use — NXP Semiconductors products are not designed,
11.2 Definitions
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer’s own
risk.
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
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Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
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full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
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full data sheet shall prevail.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
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products planned, as well as for the planned application and use of
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Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
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shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
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11.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
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products are sold subject to the general terms and conditions of commercial
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agreed in a valid written individual agreement. In case an individual
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agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
11 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards, customer
(a) shall use the product without NXP Semiconductors’ warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific NXP Semiconductors product is automotive qualified,
the product is not suitable for automotive use. It is neither qualified nor tested
in accordance with automotive testing or application requirements. NXP
Semiconductors accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
11.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
12. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
BLF8G10L-160_8G10LS-160
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 3 — 16 February 2012
12 of 13
BLF8G10L-160; BLF8G10LS-160
NXP Semiconductors
Power LDMOS transistor
13. Contents
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1
General description . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits. . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
1.2
1.3
2
3
4
5
6
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
Ordering information. . . . . . . . . . . . . . . . . . . . . 2
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
Thermal characteristics . . . . . . . . . . . . . . . . . . 2
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3
7
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 3
Ruggedness in class-AB operation . . . . . . . . . 3
Impedance information. . . . . . . . . . . . . . . . . . . 4
CW pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 5
Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
7.1
7.2
7.3
7.4
7.5
8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history. . . . . . . . . . . . . . . . . . . . . . . . 10
9
10
11
Legal information. . . . . . . . . . . . . . . . . . . . . . . 11
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
11.1
11.2
11.3
11.4
12
13
Contact information. . . . . . . . . . . . . . . . . . . . . 12
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2012.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 February 2012
Document identifier: BLF8G10L-160_8G10LS-160
相关型号:
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