BLF8G10LS-270GVJ [NXP]

BLF8G10LS-270GV;
BLF8G10LS-270GVJ
型号: BLF8G10LS-270GVJ
厂家: NXP    NXP
描述:

BLF8G10LS-270GV

文件: 总12页 (文件大小:231K)
中文:  中文翻译
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BLF8G10LS-270  
Power LDMOS transistor  
Rev. 1 — 17 August 2012  
Product data sheet  
1. Product profile  
1.1 General description  
270 W LDMOS power transistor for base station applications at frequencies from  
820 MHz to 960 MHz.  
Table 1.  
Typical performance  
Typical RF performance at Tcase = 25 C in a common source class-AB production test circuit, tested  
on straight lead device.  
Test signal  
f
IDq  
VDS  
(V)  
28  
PL(AV)  
(W)  
Gp  
D  
(%) (dBc)  
33  
35[1]  
ACPR5M  
(MHz)  
(mA)  
2000  
(dB)  
18.5  
2-carrier W-CDMA  
920 to 960  
67  
[1] 3GPP test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF; 10 MHz spacing.  
1.2 Features and benefits  
Excellent ruggedness  
High efficiency  
Low Rth providing excellent thermal stability  
Designed for broadband operation (820 MHz to 960 MHz)  
Lower output capacitance for improved performance in Doherty applications  
Designed for low memory effects providing excellent pre-distortability  
Internally matched for ease of use  
Integrated ESD protection  
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances  
(RoHS)  
1.3 Applications  
RF power amplifiers for W-CDMA base stations and multi carrier applications in the  
820 MHz to 960 MHz frequency range  
 
 
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
2. Pinning information  
Table 2.  
Pinning  
Pin  
1
Description  
drain  
Simplified outline  
Graphic symbol  
1
1
2
2
gate  
3
[1]  
3
source  
2
3
sym112  
[1] Connected to flange.  
3. Ordering information  
Table 3.  
Ordering information  
Type number  
Package  
Name Description  
Version  
BLF8G10LS-270  
-
earless flanged ceramic package; 2 leads  
SOT502B  
4. Limiting values  
Table 4.  
Limiting values  
In accordance with the Absolute Maximum Rating System (IEC 60134).  
Symbol  
VDS  
Parameter  
Conditions  
Min  
Max  
Unit  
V
drain-source voltage  
gate-source voltage  
storage temperature  
junction temperature  
-
65  
VGS  
Tstg  
0.5 +11  
V
65  
+150 C  
Tj  
-
225  
C  
5. Thermal characteristics  
Table 5.  
Thermal characteristics  
Symbol Parameter  
Conditions  
Typ  
Unit  
Rth(j-c)  
thermal resistance from junction to case Tcase = 80 C; PL = 67 W (CW) 0.264 K/W  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
2 of 12  
 
 
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
6. Characteristics  
Table 6.  
DC characteristics  
Tj = 25 C; per section unless otherwise specified.  
Symbol Parameter  
Conditions  
Min Typ  
65  
1.5 1.8  
Max Unit  
V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 4.5 mA  
-
-
V
V
VGS(th)  
gate-source threshold voltage  
VDS = 10 V; ID = 450  
mA  
2.3  
IDSS  
IDSX  
drain leakage current  
drain cut-off current  
VGS = 0 V; VDS = 28 V  
-
-
-
4.2  
-
A  
VGS = VGS(th) + 3.75 V;  
81.3  
A
VDS = 10 V  
IGSS  
gfs  
gate leakage current  
VGS = 11 V; VDS = 0 V  
-
-
-
420 nA  
forward transconductance  
VDS = 10 V;  
ID = 450 mA  
3.91  
-
S
RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V;  
ID = 15.75 A  
-
0.0418 -  
Table 7.  
RF characteristics  
Test signal: 2-carrier W-CDMA; PAR = 8.4 dB at 0.01 % probability on the CCDF; carrier spacing  
10 MHz; 3GPP test model 1; 1-64 DPCH; f1 = 922.5 MHz; f2 = 932.5 MHz; f3 = 947.5 MHz;  
f4 = 957.5 MHz; RF performance at VDS = 28 V; IDq = 2000 mA; Tcase = 25 C; unless otherwise  
specified; in a class-AB production test circuit.  
Symbol Parameter  
Conditions  
Min  
17.3 18.5  
14 10  
28.0 33  
35 30  
Typ Max Unit  
Gp  
power gain  
PL(AV) = 67 W  
PL(AV) = 67 W  
PL(AV) = 67 W  
PL(AV) = 67 W  
-
dB  
dB  
%
RLin  
D  
input return loss  
drain efficiency  
-
-
ACPR5M adjacent channel power ratio (5 MHz)  
-
dBc  
7. Test information  
7.1 Ruggedness in class-AB operation  
The BLF8G10LS-270 is capable to withstand a load mismatch corresponding to  
VSWR = 10 : 1 through all phases under the following conditions: VDS = 28 V;  
IDq = 2000 mA; PL = 270 W; f = 820 MHz; f = 869 MHz; f = 920 MHz; f = 960 MHz.  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
3 of 12  
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
7.2 Impedance information  
Table 8.  
Typical impedance  
IDq = 2700 mA; main transistor VDS = 28 V.  
[1]  
[1]  
f
ZS  
ZL  
(MHz)  
820  
869  
881  
894  
920  
940  
960  
()  
()  
1.58 j1.96  
1.84 j2.70  
1.78 j2.94  
1.90 j3.08  
2.06 j2.50  
2.10 j2.90  
2.56 j2.65  
1.29 j1.95  
1.12 j1.83  
1.12 j1.84  
1.12 j1.84  
1.04 j1.13  
1.04 j1.13  
1.00 j1.22  
[1] ZS and ZL defined in Figure 1.  
drain  
Z
L
gate  
Z
S
001aaf059  
Fig 1. Definition of transistor impedance  
7.3 Test circuit information  
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Printed-Circuit Board (PCB): Rogers 4350B; r = 3.66; thickness = 0.765 mm;  
thickness copper plating = 35 m.  
See Table 9 for a list of components.  
Fig 2. Component layout for class-AB production test circuit  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
4 of 12  
 
 
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
Table 9.  
List of components  
For test circuit see Figure 2.  
Component  
Description  
Value  
multilayer ceramic chip capacitor 47 pF  
multilayer ceramic chip capacitor 45 pF  
multilayer ceramic chip capacitor 0.01 F  
multilayer ceramic chip capacitor 0.1 F  
multilayer ceramic chip capacitor 1 F  
multilayer ceramic chip capacitor 4.7 F  
Remarks  
ATC100B  
ATC100B  
Murata  
[1]  
[1]  
[2]  
[2]  
[2]  
[2]  
C1, C4  
C2, C3, C5, C6  
C7, C11, C15, C19  
C8, C12, C16, C20  
C9, C13, C17, C21  
C10, C14, C18, C22  
C23, C24  
Murata  
Murata  
Murata  
electrolytic capacitor  
chip resistor  
470 F, 63 V  
9.1   
[3]  
R1, R2  
Vishay Dale 0805  
[1] American Technical Ceramics type 100B or capacitor of same quality.  
[2] Murata or capacitor of same quality.  
[3] Vishay Dale resistor of same quality.  
7.4 Graphical data  
7.4.1 CW  
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VDS = 28 V; IDq = 2000 mA  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
Fig 3. Power gain and drain efficiency as function of load power; typical values  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
5 of 12  
 
 
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
7.4.2 CW pulsed  
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VDS = 28 V; IDq = 2000 mA  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
Fig 4. Power gain and drain efficiency as function of load power; typical values  
7.4.3 1-Carrier W-CDMA  
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VDS = 28 V; IDq = 2000 mA  
VDS = 28 V; IDq = 2000 mA  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
Fig 5. Power gain and drain efficiency as function of  
load power; typical values  
Fig 6. Adjacent channel power ratio (5 MHz) as a  
function of load power; typical values  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
6 of 12  
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
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VDS = 28 V; IDq = 2000 mA  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
Fig 7. Peak to average ratio as a function of load power; typical values  
7.4.4 2-Carrier W-CDMA  
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VDS = 28 V; IDq = 2000 mA  
VDS = 28 V; IDq = 2000 mA  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
(1) f = 920 MHz  
(2) f = 940 MHz  
(3) f = 960 MHz  
Fig 8. Power gain and drain efficiency as function of  
load power; typical values  
Fig 9. Adjacent channel power ratio (5 MHz) as a  
function of load power; typical values  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
7 of 12  
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
8. Package outline  
Earless flanged ceramic package; 2 leads  
SOT502B  
D
A
F
3
D
D
1
c
U
1
1
L
E
E
H
U
1
2
2
w
5
b
M
M
D
Q
2
0
10 mm  
scale  
DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)  
c
A
b
D
D
E
E
F
H
L
Q
U
U
w
2
UNIT  
1
1
1
2
12.83  
12.57  
1.70  
1.45  
4.72  
3.43  
20.02 19.96 9.50  
19.61 19.66 9.30  
9.53  
9.25  
1.14 19.94 5.33  
0.89 18.92 4.32  
20.70 9.91  
20.45 9.65  
0.15  
0.08  
0.25  
mm  
0.505  
0.495  
0.067  
0.057  
0.186  
0.135  
0.788 0.786 0.374 0.375 0.045 0.785 0.210  
0.772 0.774 0.366 0.364 0.035 0.745 0.170  
0.815 0.390  
0.805 0.380  
0.006  
0.003  
0.010  
inches  
REFERENCES  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
JEDEC  
JEITA  
07-05-09  
12-05-02  
SOT502B  
Fig 10. Package outline SOT502B  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
8 of 12  
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
9. Handling information  
CAUTION  
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling  
electrostatic sensitive devices.  
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or  
equivalent standards.  
10. Abbreviations  
Table 10. Abbreviations  
Acronym  
3GPP  
CCDF  
CW  
Description  
3rd Generation Partnership Project  
Complementary Cumulative Distribution Function  
Continuous Wave  
DPCH  
ESD  
Dedicated Physical Channel  
ElectroStatic Discharge  
LDMOS  
PAR  
Laterally Diffused Metal Oxide Semiconductor  
Peak-to-Average Ratio  
VSWR  
W-CDMA  
Voltage Standing Wave Ratio  
Wideband Code Division Multiple Access  
11. Revision history  
Table 11. Revision history  
Document ID  
Release date Data sheet status  
20120817 Product data sheet  
Change notice Supersedes  
BLF8G10LS-270 v.1  
-
-
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
9 of 12  
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
12. Legal information  
12.1 Data sheet status  
Document status[1][2]  
Product status[3]  
Development  
Definition  
Objective [short] data sheet  
This document contains data from the objective specification for product development.  
This document contains data from the preliminary specification.  
This document contains the product specification.  
Preliminary [short] data sheet Qualification  
Product [short] data sheet Production  
[1]  
[2]  
[3]  
Please consult the most recently issued document before initiating or completing a design.  
The term ‘short data sheet’ is explained in section “Definitions”.  
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status  
information is available on the Internet at URL http://www.nxp.com.  
Suitability for use — NXP Semiconductors products are not designed,  
12.2 Definitions  
authorized or warranted to be suitable for use in life support, life-critical or  
safety-critical systems or equipment, nor in applications where failure or  
malfunction of an NXP Semiconductors product can reasonably be expected  
to result in personal injury, death or severe property or environmental  
damage. NXP Semiconductors and its suppliers accept no liability for  
inclusion and/or use of NXP Semiconductors products in such equipment or  
applications and therefore such inclusion and/or use is at the customer’s own  
risk.  
Draft — The document is a draft version only. The content is still under  
internal review and subject to formal approval, which may result in  
modifications or additions. NXP Semiconductors does not give any  
representations or warranties as to the accuracy or completeness of  
information included herein and shall have no liability for the consequences of  
use of such information.  
Short data sheet — A short data sheet is an extract from a full data sheet  
with the same product type number(s) and title. A short data sheet is intended  
for quick reference only and should not be relied upon to contain detailed and  
full information. For detailed and full information see the relevant full data  
sheet, which is available on request via the local NXP Semiconductors sales  
office. In case of any inconsistency or conflict with the short data sheet, the  
full data sheet shall prevail.  
Applications — Applications that are described herein for any of these  
products are for illustrative purposes only. NXP Semiconductors makes no  
representation or warranty that such applications will be suitable for the  
specified use without further testing or modification.  
Customers are responsible for the design and operation of their applications  
and products using NXP Semiconductors products, and NXP Semiconductors  
accepts no liability for any assistance with applications or customer product  
design. It is customer’s sole responsibility to determine whether the NXP  
Semiconductors product is suitable and fit for the customer’s applications and  
products planned, as well as for the planned application and use of  
customer’s third party customer(s). Customers should provide appropriate  
design and operating safeguards to minimize the risks associated with their  
applications and products.  
Product specification — The information and data provided in a Product  
data sheet shall define the specification of the product as agreed between  
NXP Semiconductors and its customer, unless NXP Semiconductors and  
customer have explicitly agreed otherwise in writing. In no event however,  
shall an agreement be valid in which the NXP Semiconductors product is  
deemed to offer functions and qualities beyond those described in the  
Product data sheet.  
NXP Semiconductors does not accept any liability related to any default,  
damage, costs or problem which is based on any weakness or default in the  
customer’s applications or products, or the application or use by customer’s  
third party customer(s). Customer is responsible for doing all necessary  
testing for the customer’s applications and products using NXP  
Semiconductors products in order to avoid a default of the applications and  
the products or of the application or use by customer’s third party  
customer(s). NXP does not accept any liability in this respect.  
12.3 Disclaimers  
Limited warranty and liability — Information in this document is believed to  
be accurate and reliable. However, NXP Semiconductors does not give any  
representations or warranties, expressed or implied, as to the accuracy or  
completeness of such information and shall have no liability for the  
consequences of use of such information. NXP Semiconductors takes no  
responsibility for the content in this document if provided by an information  
source outside of NXP Semiconductors.  
Limiting values — Stress above one or more limiting values (as defined in  
the Absolute Maximum Ratings System of IEC 60134) will cause permanent  
damage to the device. Limiting values are stress ratings only and (proper)  
operation of the device at these or any other conditions above those given in  
the Recommended operating conditions section (if present) or the  
Characteristics sections of this document is not warranted. Constant or  
repeated exposure to limiting values will permanently and irreversibly affect  
the quality and reliability of the device.  
In no event shall NXP Semiconductors be liable for any indirect, incidental,  
punitive, special or consequential damages (including - without limitation - lost  
profits, lost savings, business interruption, costs related to the removal or  
replacement of any products or rework charges) whether or not such  
damages are based on tort (including negligence), warranty, breach of  
contract or any other legal theory.  
Terms and conditions of commercial sale — NXP Semiconductors  
products are sold subject to the general terms and conditions of commercial  
sale, as published at http://www.nxp.com/profile/terms, unless otherwise  
agreed in a valid written individual agreement. In case an individual  
agreement is concluded only the terms and conditions of the respective  
agreement shall apply. NXP Semiconductors hereby expressly objects to  
applying the customer’s general terms and conditions with regard to the  
purchase of NXP Semiconductors products by customer.  
Notwithstanding any damages that customer might incur for any reason  
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards  
customer for the products described herein shall be limited in accordance  
with the Terms and conditions of commercial sale of NXP Semiconductors.  
Right to make changes — NXP Semiconductors reserves the right to make  
changes to information published in this document, including without  
limitation specifications and product descriptions, at any time and without  
notice. This document supersedes and replaces all information supplied prior  
to the publication hereof.  
No offer to sell or license — Nothing in this document may be interpreted or  
construed as an offer to sell products that is open for acceptance or the grant,  
conveyance or implication of any license under any copyrights, patents or  
other industrial or intellectual property rights.  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
10 of 12  
 
 
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
Export control — This document as well as the item(s) described herein  
may be subject to export control regulations. Export might require a prior  
authorization from competent authorities.  
NXP Semiconductors’ specifications such use shall be solely at customer’s  
own risk, and (c) customer fully indemnifies NXP Semiconductors for any  
liability, damages or failed product claims resulting from customer design and  
use of the product for automotive applications beyond NXP Semiconductors’  
standard warranty and NXP Semiconductors’ product specifications.  
Non-automotive qualified products — Unless this data sheet expressly  
states that this specific NXP Semiconductors product is automotive qualified,  
the product is not suitable for automotive use. It is neither qualified nor tested  
in accordance with automotive testing or application requirements. NXP  
Semiconductors accepts no liability for inclusion and/or use of  
Translations — A non-English (translated) version of a document is for  
reference only. The English version shall prevail in case of any discrepancy  
between the translated and English versions.  
non-automotive qualified products in automotive equipment or applications.  
In the event that customer uses the product for design-in and use in  
automotive applications to automotive specifications and standards, customer  
(a) shall use the product without NXP Semiconductors’ warranty of the  
product for such automotive applications, use and specifications, and (b)  
whenever customer uses the product for automotive applications beyond  
12.4 Trademarks  
Notice: All referenced brands, product names, service names and trademarks  
are the property of their respective owners.  
13. Contact information  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
BLF8G10LS-270  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2012. All rights reserved.  
Product data sheet  
Rev. 1 — 17 August 2012  
11 of 12  
 
 
BLF8G10LS-270  
NXP Semiconductors  
Power LDMOS transistor  
14. Contents  
1
Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
1.1  
1.2  
1.3  
General description . . . . . . . . . . . . . . . . . . . . . 1  
Features and benefits. . . . . . . . . . . . . . . . . . . . 1  
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
2
3
4
5
6
Pinning information. . . . . . . . . . . . . . . . . . . . . . 2  
Ordering information. . . . . . . . . . . . . . . . . . . . . 2  
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2  
Thermal characteristics . . . . . . . . . . . . . . . . . . 2  
Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 3  
7
7.1  
7.2  
7.3  
Test information. . . . . . . . . . . . . . . . . . . . . . . . . 3  
Ruggedness in class-AB operation . . . . . . . . . 3  
Impedance information. . . . . . . . . . . . . . . . . . . 4  
Test circuit information . . . . . . . . . . . . . . . . . . . 4  
Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 5  
CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
CW pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
1-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 6  
2-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 7  
7.4  
7.4.1  
7.4.2  
7.4.3  
7.4.4  
8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Handling information. . . . . . . . . . . . . . . . . . . . . 9  
Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9  
9
10  
11  
12  
Legal information. . . . . . . . . . . . . . . . . . . . . . . 10  
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 10  
Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 11  
12.1  
12.2  
12.3  
12.4  
13  
14  
Contact information. . . . . . . . . . . . . . . . . . . . . 11  
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Please be aware that important notices concerning this document and the product(s)  
described herein, have been included in section ‘Legal information’.  
© NXP B.V. 2012.  
All rights reserved.  
For more information, please visit: http://www.nxp.com  
For sales office addresses, please send an email to: salesaddresses@nxp.com  
Date of release: 17 August 2012  
Document identifier: BLF8G10LS-270  
 

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