BS107 [NXP]
N-channel enhancement mode vertical D-MOS transistor; N沟道增强型垂直的D- MOS晶体管型号: | BS107 |
厂家: | NXP |
描述: | N-channel enhancement mode vertical D-MOS transistor |
文件: | 总12页 (文件大小:67K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DISCRETE SEMICONDUCTORS
DATA SHEET
BS107
N-channel enhancement mode
vertical D-MOS transistor
April 1995
Product specification
File under Discrete Semiconductors, SC13b
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
FEATURES
QUICK REFERENCE DATA
• Direct interface to C-MOS, TTL,
etc.
SYMBOL
PARAMETER
MAX.
200
UNIT
VDS
VGSth
ID
drain-source voltage (DC)
gate-source threshold voltage
drain current (DC)
V
V
• High-speed switching
2.4
150
28
• No secondary breakdown.
mA
RDSon
drain-source on-state resistance
Ω
DESCRIPTION
N-channel enhancement mode
vertical D-MOS transistor in a TO-92
variant envelope. Intended for use as
a line current interruptor in telephone
sets and for applications in relay,
high-speed and line transformer
drivers.
d
handbook, halfpage
1
2
3
g
PINNING - TO-92 variant
s
MAM146
PIN
1
DESCRIPTION
source
2
gate
Fig.1 Simplified outline and symbol.
3
drain
April 1995
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
LIMITING VALUES
In accordance with the Absolute Maximum System (IEC 134).
SYMBOL
VDS
PARAMETER
drain-source voltage
CONDITIONS
MIN.
MAX.
200
UNIT
−
−
−
−
−
V
V
±VGSO
ID
gate-source voltage
drain current
open drain
20
DC
150
300
830
150
150
mA
mA
mW
°C
IDM
Ptot
Tstg
Tj
drain current
peak
total power dissipation
storage temperature range
operating junction temperature
up to Tamb = 25 °C
−65
−
°C
THERMAL RESISTANCE
SYMBOL
PARAMETER
MAX.
UNIT
K/W
Rth j-a
from junction to ambient
150
April 1995
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
V(BR)DSS
PARAMETER
CONDITIONS
VGS = 0
ID = 10 µA
MIN.
200
TYP.
MAX.
UNIT
drain-source breakdown
voltage
−
−
V
IDSS
drain-source leakage current VDS = 130 V
VGS = 0
−
−
30
1
nA
µA
nA
V
IDSX
drain-source leakage current VDS = 70 V
VGS = 0.2 V
−
−
±IGSS
VGS(th)
RDS(on)
RDS(on)
Yfs
gate-source leakage current ±VGS = 15 V
−
−
10
VDS = 0
gate threshold voltage
drain-source on-resistance
drain-source on-resistance
transfer admittance
ID = 1 mA
VDS = VGS
0.8
−
−
2.4
28
−
ID = 20 mA
20
14
Ω
V
GS = 2.6 V
ID = 150 mA
VGS = 10 V
−
Ω
ID = 250 mA
VDS = 15 V
90
−
180
50
−
mS
pF
Ciss
input capacitance
VDS = 10 V
VGS = 0
65
f = 1 MHz
Coss
output capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
−
−
16
4
25
10
pF
pF
Crss
feedback capacitance
VDS = 10 V
VGS = 0
f = 1 MHz
Switching times (see Figs 2 and 3)
ton
switching-on time
ID = 250 mA
VDD = 50 V
VGS = 0 to 10 V
−
−
2
4
10
20
ns
ns
toff
switching-off time
ID = 250 mA
VDD = 50 V
VGS = 0 to 10 V
April 1995
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
V
= 50 V
handbook, halfpage
INPUT
handbook, halfpage
90 %
DD
10 %
90 %
10 V
0 V
OUTPUT
I
D
50 Ω
10 %
MSA631
t
t
off
on
MBB692
Fig.2 Switching time test circuit.
Fig.3 Input and output waveforms.
MDA701
MDA700
400
400
handbook, halfpage
handbook, halfpage
I
I
D
D
(mA)
(mA)
300
300
V
= 10 V
5 V
4 V
GS
3 V
200
100
200
100
0
0
0
0
1
2
3
4
4
8
12
16
V
(V)
V
(V)
GS
DS
Fig.4 Typical output characteristics; Tj = 25 °C.
Fig.5 Typical transfer characteristic; VDS = 10 V;
Tj = 25 °C.
April 1995
5
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
MDA702
MDA703
30
60
handbook, halfpage
handbook, halfpage
R
DSon
C
(pF)
(Ω)
4 V
V
= 3 V
GS
26
5 V
40
20
22
10 V
C
iss
18
14
10
C
oss
C
rss
0
0
3
2
10
20
30
1
10
10
10
V
(V)
I
(mA)
DS
D
Fig.6 Typical on-resistance as a function of drain
Fig.7 Typical capacitances as a function of
drain-source voltage; VGS = 0; f = 1 MHz;
Tj = 25 °C.
current; Tj = 25 °C.
MDA704
MDA705
2.8
1.2
handbook, halfpage
k
k
2.4
1.1
2
(1)
(2)
1
1.6
0.9
1.2
0.8
0.8
0.7
0.4
−50
0
50
100
150
−50
0
50
100
150
T (°C)
j
T (°C)
j
(1) ID = 150 mA; VGS = 10 V
(2) ID = 20 mA; VGS = 2.6 V
Fig.9 Temperature coefficient of gate-source
threshold voltage;
Fig.8 Temperature coefficient of drain-source
RDS (on) at Tj
---------------------------------------------
on-resistance; k =
;
V
at Tj
----------G----S----(--t--h---)-------------------
RDS (on) at 25 °C
typical RDS(on) at 150 mA/10 V
k =
; typical VGS(th) at 1 mA.
VGS (th) at 25 °C
April 1995
6
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
MDA690
1
handbook,
P
tot
(W)
0.8
0.6
0.4
0.2
0
0
50
100
150
200
(°C)
T
amb
Fig.10 Power derating curve.
April 1995
7
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
PACKAGE OUTLINE
Plastic single-ended leaded (through hole) package; 3 leads (on-circle)
SOT54 variant
c
L
2
E
d
A
L
b
1
2
e
1
e
D
3
b
1
L
1
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
(1)
L
L
2
1
UNIT
mm
A
b
b
c
D
d
E
e
e
L
1
1
max
max
5.2
5.0
0.48
0.40
0.66
0.56
0.45
0.40
4.8
4.4
1.7
1.4
4.2
3.6
14.5
12.7
2.54
1.27
2.5
2.5
Notes
1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
REFERENCES
OUTLINE
EUROPEAN
PROJECTION
ISSUE DATE
VERSION
IEC
JEDEC
EIAJ
97-04-14
SOT54 variant
TO-92
SC-43
April 1995
8
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
DEFINITIONS
Data sheet status
Objective specification
Preliminary specification
Product specification
This data sheet contains target or goal specifications for product development.
This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
April 1995
9
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
NOTES
April 1995
10
Philips Semiconductors
Product specification
N-channel enhancement mode vertical
D-MOS transistor
BS107
NOTES
April 1995
11
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/01/pp12
Date of release: April 1995
Document order number: 9397 750 02443
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