BSP255T/R [NXP]

TRANSISTOR 0.325 A, 300 V, 17 ohm, P-CHANNEL, Si, POWER, MOSFET, FET General Purpose Power;
BSP255T/R
型号: BSP255T/R
厂家: NXP    NXP
描述:

TRANSISTOR 0.325 A, 300 V, 17 ohm, P-CHANNEL, Si, POWER, MOSFET, FET General Purpose Power

晶体 晶体管 功率场效应晶体管
文件: 总10页 (文件大小:68K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DISCRETE SEMICONDUCTORS  
DATA SHEET  
BSP255  
P-channel enhancement mode  
vertical D-MOS transistor  
1996 Aug 05  
Product specification  
Supersedes data of 1996 Jun 13  
File under Discrete Semiconductors, SC07  
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
FEATURES  
PINNING - SOT223  
Direct interface to C-MOS, TTL etc  
Low threshold voltage  
PIN  
SYMBOL  
DESCRIPTION  
1
2
3
4
g
d
s
d
gate  
High speed switching  
drain  
No secondary breakdown.  
source  
drain  
APPLICATIONS  
Line current interrupter in telephone sets  
Relay, high speed and line transformer drivers.  
handbook, halfpage  
4
d
s
DESCRIPTION  
P-channel enhancement mode vertical D-MOS transistor  
in a 4-pin plastic SOT223 SMD package.  
g
1
2
3
CAUTION  
Top view  
MAM121  
The device is supplied in an antistatic package. The  
gate-source input must be protected against static  
discharge during transport or handling.  
Fig.1 Simplified outline and symbol.  
QUICK REFERENCE DATA  
SYMBOL  
VDS  
PARAMETER  
drain-source voltage (DC)  
source-drain diode forward voltage  
gate-source voltage (DC)  
gate-source threshold voltage  
drain current (DC)  
CONDITIONS  
MIN.  
MAX.  
300  
UNIT  
V
V
V
V
VSD  
VGS  
VGSth  
ID  
IS = 0.5 A  
1.8  
±20  
2  
ID = 1 mA; VDS = VGS  
Ts = 100 °C  
0.8  
325  
17  
mA  
RDSon  
Ptot  
drain-source on-state resistance  
total power dissipation  
ID = 160 mA; VGS = 10 V  
Ts = 100 °C  
4
W
1996 Aug 05  
2
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
LIMITING VALUES  
In accordance with the Absolute Maximum Rating System (IEC 134).  
SYMBOL  
PARAMETER  
drain-source voltage (DC)  
CONDITIONS  
MIN.  
MAX.  
300  
UNIT  
VDS  
VGS  
ID  
V
V
gate-source voltage (DC)  
drain current (DC)  
±20  
325  
1.3  
4
Ts = 100 °C; note 1  
note 2  
mA  
A
IDM  
Ptot  
Tstg  
Tj  
peak drain current  
total power dissipation  
storage temperature  
Ts = 100 °C  
W
65  
65  
+150  
+150  
°C  
°C  
operating junction temperature  
Source-drain diode  
IS  
source current (DC)  
peak pulsed source current  
Ts = 100 °C  
0.5  
2  
A
A
ISM  
note 2  
Notes  
1. Ts is the temperature at the soldering point of the drain lead.  
2. Pulse width and duty cycle limited by maximum junction temperature.  
MBH446  
MBH445  
10  
10  
handbook, halfpage  
handbook, halfpage  
P
tot  
(W)  
I
D
(A)  
8
1  
(1)  
t
=
p
10 µs  
6
4
2
100 µs  
1  
10  
1 ms  
t
10 ms  
p
DC  
P
=
δ
T
2  
10  
t
t
p
T
3  
0
0
10  
2
3
50  
100  
150  
200  
1  
10  
10  
10  
o
T
( C)  
V
(V)  
s
DS  
δ = 0.01; TS = 100 °C.  
(1) RDSon limitation  
.
Fig.2 Power derating curve.  
Fig.3 DC SOAR.  
1996 Aug 05  
3
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
THERMAL CHARACTERISTICS  
SYMBOL  
PARAMETER  
thermal resistance from junction to soldering point  
VALUE  
UNIT  
Rth j-s  
12  
K/W  
MBH444  
2
10  
R
th j-s  
(K/W)  
δ =  
0.75  
10  
0.5  
0.33  
0.2  
0.1  
1
t
p
0.05  
P
=
δ
T
0.02  
0.01  
0
t
t
p
T
1  
10  
6  
5  
4  
3  
2  
1  
10  
10  
10  
10  
10  
10  
1
t
(s)  
p
Fig.4 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.  
1996 Aug 05  
4
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
CHARACTERISTICS  
Tj = 25 °C unless otherwise specified.  
SYMBOL  
PARAMETER  
CONDITIONS  
VGS = 0; ID = 10 µA  
MIN.  
TYP.  
MAX. UNIT  
V(BR)DSS drain-source breakdown voltage  
300  
V
VGSth  
IDSS  
gate-source threshold voltage  
drain-source leakage current  
gate leakage current  
VGS = VDS; ID = 1 mA  
VGS = 0; VDS = 240 V  
VGS = ±20 V; VDS = 0  
VGS = 10 V; ID = 160 mA  
0.8  
2  
100  
±100  
17  
20  
25  
V
nA  
nA  
IGSS  
RDSon  
drain-source on-state resistance  
VGS = 4.5 V; ID = 80 mA  
VGS = 2.8 V; ID = 50 mA  
Ciss  
Coss  
Crss  
Qg  
input capacitance  
VGS = 0; VDS = 50 V; f = 1 MHz  
VGS = 0; VDS = 50 V; f = 1 MHz  
VGS = 0; VDS = 50 V; f = 1 MHz  
45  
15  
3
pF  
pF  
pF  
nC  
output capacitance  
reverse transfer capacitance  
total gate charge  
VGS = 10 V; VDD = 50 V;  
ID = 160 mA; Tamb = 25 °C  
2.3  
Qgs  
Qgd  
gate-source charge  
gate-drain charge  
VGS = 10 V; VDD = 50 V;  
ID = 160 mA; Tamb = 25 °C  
0.1  
0.7  
nC  
nC  
VGS = 10 V; VDD = 50 V;  
ID = 160 mA; Tamb = 25 °C  
Switching times (see Fig.11)  
td(on)  
tr  
turn-on delay time  
rise time  
VGS = 0 to 10 V; VDD = 50 V;  
ID = 160 mA; Rgen = 50 Ω  
2.4  
1.6  
4
ns  
ns  
ns  
ns  
ns  
ns  
ton  
turn-on switching time  
turn-off delay time  
fall time  
td(off)  
tf  
VGS = 10 to 0 V; VDD = 50 V;  
ID = 160 mA; Rgen = 50 Ω  
13  
12  
25  
toff  
turn-off switching time  
Source-drain diode  
VSD  
source-drain forward voltage  
VGD = 0; IS = 0.5 A  
1.8  
V
1996 Aug 05  
5
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
MBH441  
MBH443  
10  
800  
handbook, halfpage  
handbook, halfpage  
V
GS  
(V)  
I
V
= 10 V  
D
GS  
(mA)  
8  
600  
4.5 V  
4.0 V  
6  
400  
200  
3.5 V  
3.0 V  
4  
2  
2.5 V  
2.0 V  
0
0
0
0
0.5  
1.0  
1.5  
2.0  
Q
2.5  
(nC)  
2  
4  
6  
8  
10  
V
12  
(V)  
g
DS  
VDD = 50 V: ID = 180 mA.  
Tj = 25 °C.  
Fig.5 Gate-source voltage as a function of  
total gate charge; typical values.  
Fig.6 Output characteristics; typical values.  
MBH440  
MBH436  
800  
2.5  
handbook, halfpage  
handbook, halfpage  
I
I
SD  
D
(A)  
(mA)  
2.0  
600  
1.5  
400  
200  
1.0  
0.5  
(3)  
(1) (2)  
0
0
0
0
0.4  
0.8  
1.2  
1.6  
2.0  
(V)  
2  
4  
6  
8  
V
10  
(V)  
V
GS  
SD  
VGD = 0.  
(1) Tj = 150 °C.  
(2) Tj = 25 °C.  
(3) Tj = 65 °C.  
Fig.8 Source-drain current as a function of  
source-drain diode forward voltage;  
typical values.  
VDS = 10 V; Tj = 25 °C.  
Fig.7 Transfer characteristics; typical values.  
1996 Aug 05  
6
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
handbook, halfpage  
MBH437  
MBH442  
2
160  
10  
handbook, halfpage  
C
(pF)  
R
DSon  
()  
120  
80  
(1)  
(2)  
(3)  
(4)  
(5)  
C
iss  
40  
C
oss  
C
rss  
10  
0
0
0
2  
4  
6  
8  
V
10  
(V)  
10  
20  
30  
40  
50  
(V)  
V
GS  
DS  
(3) ID = 80 mA.  
(4) ID = 160 mA.  
(5) ID = 325 mA.  
V
DS ID × RDSon; Tj = 25 °C.  
(1) ID = 10 mA.  
(2) ID = 50 mA.  
VGS = 0; f = 1 MHz; Tj = 25 °C.  
Fig.9 Drain source on-state resistance as a function  
of gate-source voltage; typical values.  
Fig.10 Capacitance as a function of drain-source  
voltage; typical values.  
0
10 %  
V  
DD  
V
in  
90 %  
R
L
V
0
out  
10 %  
10 %  
V
out  
V
in  
90 %  
90 %  
t
t
d(on)  
t
d(off)  
t
t
t
f
r
MGD391  
on  
off  
Fig.11 Switching time test circuit and input and output waveforms.  
7
1996 Aug 05  
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
MBH438  
MBH439  
1.4  
2.4  
handbook, halfpage  
handbook, halfpage  
k
k
2.0  
(2)  
(1)  
1.2  
1.6  
1.2  
0.8  
1.0  
0.8  
0.6  
0.4  
75  
75  
25  
25  
75  
125  
175  
25  
25  
75  
125  
175  
T (°C)  
T (°C)  
j
j
RDSon at Tj  
k =  
-----------------------------------------  
VGSth at Tj  
RDSon at 25 °C  
k =  
--------------------------------------  
VGSth at 25°C  
(1) VGS = 4.5 V; ID = 80 mA.  
(2) VGS = 2.8 V; ID = 50 mA.  
VGSth at VDS =VGS ; ID = 1 mA.  
Fig.12 Temperature coefficient of gate-source  
threshold voltage as a function of  
Fig.13 Temperature coefficient of drain-source  
on-state resistance as a function of  
junction temperature; typical values.  
junction temperature; typical values.  
1996 Aug 05  
8
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
PACKAGE OUTLINE  
Plastic surface mounted package; collector pad for good heat transfer; 4 leads  
SOT223  
D
B
E
A
X
c
y
H
v
M
A
E
b
1
4
Q
A
A
1
L
1
2
3
p
e
b
p
w
M
B
detail X  
1
e
0
2
4 mm  
scale  
DIMENSIONS (mm are the original dimensions)  
A
UNIT  
A
b
b
c
D
E
e
e
H
L
p
Q
v
w
y
p
1
1
1
E
1.8  
1.5  
0.10 0.80  
0.01 0.60  
3.1  
2.9  
0.32  
0.22  
6.7  
6.3  
3.7  
3.3  
7.3  
6.7  
1.1  
0.7  
0.95  
0.85  
mm  
4.6  
2.3  
0.2  
0.1  
0.1  
REFERENCES  
JEDEC  
EUROPEAN  
PROJECTION  
OUTLINE  
VERSION  
ISSUE DATE  
IEC  
EIAJ  
96-11-11  
97-02-28  
SOT223  
1996 Aug 05  
9
Philips Semiconductors  
Product specification  
P-channel enhancement mode  
vertical D-MOS transistor  
BSP255  
DEFINITIONS  
Data Sheet Status  
Objective specification  
Preliminary specification  
Product specification  
This data sheet contains target or goal specifications for product development.  
This data sheet contains preliminary data; supplementary data may be published later.  
This data sheet contains final product specifications.  
Limiting values  
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or  
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation  
of the device at these or at any other conditions above those given in the Characteristics sections of the specification  
is not implied. Exposure to limiting values for extended periods may affect device reliability.  
Application information  
Where application information is given, it is advisory and does not form part of the specification.  
LIFE SUPPORT APPLICATIONS  
These products are not designed for use in life support appliances, devices, or systems where malfunction of these  
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for  
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such  
improper use or sale.  
1996 Aug 05  
10  

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